CN107809107A - Inductive for static discharge - Google Patents
Inductive for static discharge Download PDFInfo
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- CN107809107A CN107809107A CN201710806592.XA CN201710806592A CN107809107A CN 107809107 A CN107809107 A CN 107809107A CN 201710806592 A CN201710806592 A CN 201710806592A CN 107809107 A CN107809107 A CN 107809107A
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- 230000001939 inductive effect Effects 0.000 title claims abstract description 36
- 230000003068 static effect Effects 0.000 title claims abstract description 20
- 238000000034 method Methods 0.000 claims abstract description 14
- 230000004224 protection Effects 0.000 claims description 82
- 230000008878 coupling Effects 0.000 claims description 20
- 238000010168 coupling process Methods 0.000 claims description 20
- 238000005859 coupling reaction Methods 0.000 claims description 20
- 230000005611 electricity Effects 0.000 claims description 14
- 230000005540 biological transmission Effects 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 4
- 230000001629 suppression Effects 0.000 claims description 4
- 229920000642 polymer Polymers 0.000 claims description 3
- 230000006378 damage Effects 0.000 description 12
- 230000006698 induction Effects 0.000 description 12
- 208000027418 Wounds and injury Diseases 0.000 description 10
- 208000014674 injury Diseases 0.000 description 10
- 230000000875 corresponding effect Effects 0.000 description 9
- 238000010586 diagram Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 8
- 239000000758 substrate Substances 0.000 description 7
- 230000009467 reduction Effects 0.000 description 6
- 238000004804 winding Methods 0.000 description 6
- 239000004020 conductor Substances 0.000 description 5
- 239000011162 core material Substances 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 238000010276 construction Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 230000005284 excitation Effects 0.000 description 3
- 230000000670 limiting effect Effects 0.000 description 3
- JPOPEORRMSDUIP-UHFFFAOYSA-N 1,2,4,5-tetrachloro-3-(2,3,5,6-tetrachlorophenyl)benzene Chemical compound ClC1=CC(Cl)=C(Cl)C(C=2C(=C(Cl)C=C(Cl)C=2Cl)Cl)=C1Cl JPOPEORRMSDUIP-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 230000002238 attenuated effect Effects 0.000 description 2
- 238000013016 damping Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 230000005389 magnetism Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 230000002829 reductive effect Effects 0.000 description 2
- 230000011664 signaling Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000004069 differentiation Effects 0.000 description 1
- 230000003028 elevating effect Effects 0.000 description 1
- 239000002105 nanoparticle Substances 0.000 description 1
- 230000035699 permeability Effects 0.000 description 1
- 229920006389 polyphenyl polymer Polymers 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000010421 standard material Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
- H02H9/045—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere
- H02H9/046—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere responsive to excess voltage appearing at terminals of integrated circuits
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F19/00—Fixed transformers or mutual inductances of the signal type
- H01F19/04—Transformers or mutual inductances suitable for handling frequencies considerably beyond the audio range
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F2017/0093—Common mode choke coil
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Multimedia (AREA)
- Semiconductor Integrated Circuits (AREA)
- Emergency Protection Circuit Devices (AREA)
Abstract
Present disclose provides the inductive for static discharge, and provide a kind of equipment and a kind of method.The equipment includes the first inductance component, and the first signal wire of itself and differential signal path is connected in series and is configured to suppress the current spike of static discharge (ESD) remained on the first signal wire by using the first effective inductance.Second inductance component is connected to the secondary signal line of differential signal path and is configured to suppress the ESD current spikes remained on the secondary signal line of differential signal path by using the second effective inductance.First inductance component and the second inductance component are configured to by using the inductive between the first inductance component and the second inductance component to provide the 3rd effective inductance to be delivered in the differential signal in differential signal path.
Description
Technical field
The signal wire that each side of various embodiments is directed to use with inductive carrys out protection circuit system from static discharge
(ESD) injury of event.
Background technology
Esd event can cause the badly damaged of circuit block and can cause the final failure of circuit.Some technologies
It is progressive, such as the increase of the data speed of input and output circuit system, may be such that protected circuit system be more prone to by
To the injury of esd event.In addition, the increase of data signaling rate can cause to the operational attribute of esd protection circuit system more
Strict requirements.
For various applications, realization of these and other problems to esd protection circuit proposes challenge.
The content of the invention
Various exemplary embodiments be related to such as those described above and/or other the problem of, these problems can be from ShiShimonoseki
It is made apparent from the disclosure protected using the ESD of inductive.
In some of the exemplary embodiments, each side of the disclosure is related to a kind of equipment, and it includes the first inductance component, its
It is connected in series with the first signal wire of differential signal path and is configured to suppress first by using the first effective inductance
Static discharge (ESD) electric current on signal wire.Second inductance component is connected to the secondary signal line of differential signal path, and
And it is configured to suppress the ESD electric currents on the secondary signal line of differential signal path by using the second effective inductance.First
Inductance component and the second inductance component are configured to by using the inductance coupling between the first inductance component and the second inductance component
Close to provide the 3rd effective inductance to transmit the differential signal in differential signal path.
According to various embodiments, there is provided a kind of method, this method include：Reception is formed on the signal wire of differential signal path
Static discharge (ESD) event；Suppress ESD things using the effective inductance of the inductance component offer by being connected in series with signal wire
The frequency component higher than cut-off frequency of part；Receive the differential signal formed on the signal wire of differential signal path；And pass through
Using the inductive between inductance component to reduce the effective inductance provided by inductance component, to transmit being higher than for differential signal
The frequency component of cut-off frequency.
Discussed above/general introduction is not intended to each embodiment of the description disclosure or each embodiment.Following accompanying drawing and
It is described in detail also exemplified with various embodiments.
Brief description of the drawings
In view of the detailed description below in conjunction with accompanying drawing, various example embodiments can be more fully understood, in the accompanying drawings：
Fig. 1 be in accordance with an embodiment of the present disclosure have be designed to attenuation common-mode electric current inductive circuit system or set
Standby block diagram；
Fig. 2 is in accordance with an embodiment of the present disclosure including being combined with being designed to the inductive circuit of attenuation common-mode electric current
The block diagram of the system of esd protection circuit；
Fig. 3 is in accordance with an embodiment of the present disclosure including being combined with being designed to the inductive circuit of attenuation common-mode electric current
The block diagram of the system of two esd protection circuits；
Fig. 4 is in accordance with an embodiment of the present disclosure including being combined with being designed to the inductive circuit of attenuation common-mode electric current
The block diagram of the system of three esd protection circuits；
Fig. 5 depicts the pattern that inductor in accordance with an embodiment of the present disclosure is arranged with form concentric spirals；
Fig. 6 depicts the sectional view of Fig. 5 of the interceptions of A-A along the line in accordance with an embodiment of the present disclosure conductor pattern；
Fig. 7 depicts the pattern that inductor tracks in accordance with an embodiment of the present disclosure are arranged with concentric quadrangle patterns；
Fig. 8 depicts the sectional view of Fig. 7 of the interceptions of A-A along the line in accordance with an embodiment of the present disclosure conductor pattern；
Fig. 9 depicts the pattern that inductor tracks in accordance with an embodiment of the present disclosure are arranged with the quadrangle patterns stacked；
Figure 10 depicts the sectional view of Fig. 9 of the interceptions of A-A along the line in accordance with an embodiment of the present disclosure inductor；
The inductor tracks that Figure 11 is depicted in accordance with an embodiment of the present disclosure are arranged as the pattern of the spiral with straight line；
Figure 12 depicts the sectional view of Figure 11 of the interceptions of A-A along the line in accordance with an embodiment of the present disclosure inductor；And
The use that Figure 13 is depicted in accordance with an embodiment of the present disclosure has the electricity for the influence for being designed as being protected from ESD electric currents
The flow chart of the system or equipment of inductive circuit.
Although various embodiments discussed herein is suitable to modification and alternative form, by the example in accompanying drawing
Its each side is shown, and will be described in detail.It will be appreciated, however, that the intent of the present invention is not to be limited to the disclosure
Described specific embodiment.On the contrary, the invention is intended to cover to fall the sheet of each side limited in including claim
All modifications, equivalent and alternative solution in scope of disclosure.In addition, the term " example " used in this application is only
As illustrating and noting limit.
Embodiment
The each side of the disclosure be deemed applicable to be related to the various types of equipment of esd protection circuit, system and
Method.In some embodiments, it has been shown that each side of the disclosure is when in the integrated circuit using high-speed differential signal
(IC) it is beneficial when being used in the environment of the ESD protections of chip.In certain embodiments, the inductor of coupling is placed on difference
On each signal path of signal pair.While not necessarily so restriction, by below to using the unrestricted of exemplary environments
The discussion of property example is appreciated that various aspects.
Therefore, in the following description, various details are elaborated to describe specific example given herein.However,
It will be apparent to one skilled in the art that this can be put into practice in the case of no all details given below
One or more other example and/or variant of a little examples.In other cases, well-known feature is not described in detail,
In order to avoid make the description of embodiment herein become unclear.For convenience of description, in various figures using identical accompanying drawing
Mark to represent the additional example of identical element or similar elements.Moreover, although in some cases can be in single accompanying drawing
Described in each side and feature, but it is to be understood that the feature of a figure or embodiment can be with another figure or embodiment
Combinations of features, even if the combination is described as combining with not shown or defined clearly.
The various embodiments of the disclosure are related to a kind of inductive circuit, and the inductive circuit is passed in transmission using high-speed differential signal
While the communication sent or data-signal, there is provided protect the injury against residual esd event electric current.In particular implementation
In, inductive circuit reduces the effective inductance of differential-mode current using the inductive between two inductance traces or coil, so as to
Reduce effective impedance (or reactance).The signal received as a part for esd event is typically the form of common mode current, because
This its decayed by inductive circuit
According to various embodiments, it has been recognized that inductive circuit can be designed in this way：Which allows to decline
Subtract the high fdrequency component of the common mode current from esd event, while also transmit the similar height of the differential-mode current from data-signal
Frequency component.For example, inductive circuit can include two inductance components with respective winding or trace, it is designed specifically to
Close coupling under correlated frequency.By this way, the magnetic field as caused by the differential-mode current in inductance coil is cancelled out each other or mutually taken
Disappear.Because the inductance of inductor is the result of the change of induced field, so the inductance seen by differential-mode current is (and thus
Caused impedance) reduce.Therefore, ESD common mode currents are subjected to considerably higher impedance and respective attenuation.It is partly due to common mode electricity
The difference of stream and the effective inductance of differential-mode current, the single inductance value of each inductance component could be arranged to be enough to provide ESD electricity
Value of the significant decay of stream without significantly affecting data-signal.
The particular aspects of the disclosed embodiments use magnetic core not between the inductor of inductive circuit.People have recognized
Arrive, saturation effect is may suffer from for high frequency electric/signal magnetic core.Saturation effect can reduce inductive circuit and believe for correlation
Number high fdrequency component validity.Various embodiments be related to mainly due to its physics and geometric similarity degree and with to high frequency (including
Extend to the frequency of GHz range) the magnetic-coupled coil of effective manner.
Some embodiments are related to the additional esd protection circuit of the one or more combined with inductive circuit as described herein
Use.As an example, inductive circuit may be used to provide the input/output to the part as integrated circuit (IC) chip
(I/O) protection of circuit.IC chip includes integrated esd protection circuit system (such as the electricity on chip for corresponding I/O lines
Road system).Integrated esd protection circuit system can be designed to (such as connect most of ESD current distributings to reference voltage
Ground), while inductive circuit decay residual, high frequency ESD electric currents.As discussed herein, because esd protection circuit system carries
The inductance of the discharge path of confession, the ESD electric currents of some residuals will not be suppressed.Because inductance increases with frequency, work as ESD
When high fdrequency component (such as fast rise time) in event be present, the ESD electric currents of residual may be especially high.Using being placed on ESD
Series reactor between event source and esd protection circuit system can be before residual current reaches protected circuit system
It is decayed.
It has been realised that with advances in technology, circuit system is generally become easier to by by exposure to short
Damaged caused by the ESD electric currents of duration.For example, device is designed to have the gate oxide of more and more thinner, this can make
It must be more prone to be damaged by esd event.For the circuit system for being designed as being used together with high-speed data signal, this
Individual problem is probably especially difficult.The scrambling for example, the esd protection circuit system of shunting high frequency E SD electric currents may hop to it
Rate approaches or overlapping data-signal.Therefore, various embodiments are related to first (relatively low) being designed to protect from ESD electric currents
Influence of the esd protection circuit system of the influence of frequency with being designed to protect second (higher) frequency from ESD electric currents
The combination of the inductive circuit of the second frequency of differential mode data signals is transmitted simultaneously.
Turning now to accompanying drawing, Fig. 1 is in accordance with an embodiment of the present disclosure with the inductance electricity for being designed to decay ESD electric currents
The system on road or the block diagram of device.The device described includes the circuit 104 to be protected from esd event injury.According to each
Kind embodiment, circuit 104 can be located in IC chip, and pass through I/O pins, pad or other external electrical connections (referred to as " I/
O ") it is exposed to esd event.The protection is not limited to be used together with the circuit system in IC chip, however, for the ease of begging for
By often with reference to IC chip.
Circuit 104 may be constructed such that using the differential signal being present on two different conductive signal wires 106 and 108
Come communicated (reception, transmitting or both).The use of differential signal is especially universal for high data rate, for example, with it is general
The associated data transfer rate of universal serial bus (USB) 3.1, USB (USB) 3.1 are mentioned as providing Gbit/s scopes
The non-limiting example of the signaling protocol of message transmission rate.
Fig. 1 shows esd event source 102, and it represents that appointing for esd event can be produced on differential signal line 106 and 108
The structure for quantity of anticipating.In the presence of any number of different possible structure (example that is enough the electric charge for producing esd event can be accumulated
Such as, human body, each several part and other neighbouring objects of whole system).Some standards have been developed to come to from difference coming
Source is emulated with the esd event under different condition.For example, caused by manikin (HBM) trial pair and human body electrical contact
Esd event emulated；Charge device model (CDM) is attempted to pass through the straight of friction effect or electrostatic induction to protected device
Connect or charge indirectly and emulated；Machine mould (MM) is attempted to being imitated by the machine electric discharge to ground of protected device
Very.The electric discharge that IEC 61000-4-2 standards attempt to the human body by a variety of different discharge curves emulates.HBM and IEC
Difference between the discharge curve of 61000-4-2 standards includes covering with high peak current level, fast rise time and short
The quick inceptive impulse in pulse duration.The each side of the disclosure aims to provide these sides with IEC 61000-4-2 standards
The protection of the consistent injury for preventing esd event in face, while transmit the differential signal with similar or overlapping frequency component.
IEC 61000-4-2 standards define 1ns or shorter inceptive impulse rise time (from the 10% to 90% of signal peak), more
Especially define 600ps rise time.
According to embodiment, the first inductance component 110 can be used to provide ESD protections, the first inductance component 110 be illustrated as with
First signal wire 106 for differential signal path is connected in series.Inductance component 110 is configured to suppress the first signal wire
Residual static discharge (ESD) current spike on 106.Second inductance component 112 is connected to the second of differential signal path
Signal wire 108.What the second inductance component 112 was also structured to based on the common mode current in differential signal path corresponding second has
The common-mode signal for including ESD current spikes that effect inductance comes on the secondary signal line 108 of attenuated differential signals.Carried by inductance component
The suppression of confession is the result of the effective inductance of the common-mode signal received on Difference signal pair.
For example, realize esd protection circuit system using the multistage network of esd protection circuit sometimes.ESD stress is in multistage
Between distribute, it is allowed to esd protection circuit has different attributes, and (for example, the relatively low clamp voltage of esd protection circuit, the ESD is protected
The ESD electric currents that protection circuit receives are less than another esd protection circuit).When esd protection circuit is by esd event current discharge or shunting
During to reference voltage, the natural inductance of discharge path can prevent the correct electric discharge of high fdrequency component.Result is probably the ESD electricity of residual
Stream is possible to the sensitive circuit system of damage.Inductance component 110,112 can provide high resistant by providing to high frequency component signal
Anti- series inductance is come the ESD electric currents for the residual that decays.
According to embodiment, the first inductance component and the second inductance component are configured to by using the first inductance component and
Inductive between two inductance components transmits the differential signal in differential signal path.Coupling causes relative to collective signal
The 3rd effective inductance.3rd effective inductance is the first effective inductance and the second effective inductance relative to common mode ESD electric currents
The inductance of reduction.Especially, the magnetic coupling between two inductance components reduces the magnetic field as caused by given difference current,
Cause the corresponding reduction of the effective impedance of inductor and the given change of electric current.
According to various embodiments, it is first effective to be configured to have identical value for the first inductance component and the second inductance component
Inductance and the second effective inductance so that decay is identical for each line of differential signal.For actually, due to various
Factor, such as the fine difference of coil layout and manufacture are changed, and these values will be slightly different.
According to various embodiments, using the respective inductance coil in common substrate come realize inductance component 110,
112.Inductance coil can inductively be coupled each other by and being geometrically arranged in adjacent place by the part physical of coil.
Inductance coil is also arranged in so that their own magnetic field is phase for the signal with same current direction (common mode current)
(in same direction) added.In certain embodiments, inductance coil can be planar coil, and they are for each of which path
Sizable part for connect up in parallel with each other so that produced in the equal and electric current of opposite direction (differential-mode current) opposite
The magnetic field in direction.The amount reduced for the field of differential-mode current is the direct result of the stiffness of coupling between inductor, sometimes referred to as
Coupling factor.Various embodiments are related to the inductance coil with concentric or spiral pattern arrangement to provide enough couplings and inductance,
However, other patterns are possible.
According to some embodiments, allow to produce effective inductance in high frequency using the planar spiral winding of appropriate size,
Including corresponding those frequencies of the stress pulse with being constituted a threat to Modern High-Speed I/O circuit systems (for example, it may be possible to and IEC
61000-4-2 standards are consistent).For example, planar spiral winding can be designed as width be about spacing between 5 μm, coil about
For 10 μm, to realize at least 0.9 coupling factor, and it can also include 0.94 or higher coupling factor.
Fig. 2 is the sensing included with being designed to be protected from residual ESD electric current injuries in accordance with an embodiment of the present disclosure
The block diagram of the system for the esd protection circuit that circuit is combined.Multistage protection scheme protection circuit system 220 is from passing through difference
The injury for the esd event that signal wire 210 and 212 receives from ESD sources 208.The first order is provided by esd protection circuit system 218
Protection.Esd protection circuit system 218 may be constructed such that ESD current distributings to reference voltage (for example, ground connection).According to each
Kind embodiment, can use the general ESD guard block consistent with the specific IC manufacturing technologies being used, be realized on chip
Esd protection circuit system 218.Esd protection circuit system, which may be constructed such that, shunts big transient state electricity when detecting esd event
Stream.However, esd protection circuit system may be not enough to shunting from (for example, due to the natural inductance in discharge path and) tool
There is the electric current of the initial ESD spikes of fast rise time and shortest pulse duration.This may cause the ESD electric currents of residual to have can
Circuit system 220 can be damaged.
Induction structure 204 include being configured to the inductor components 214 that are worked together with esd protection circuit system 218 and
216, ESD electric currents can be remained as caused by the high fdrequency component of esd event with decay.Therefore, inductor components 214 and 216 can be with
The energy of the frequency component of stop and the generation residual ESD electric currents from esd event of decaying, otherwise, residual ESD electric currents will reach
IC chip 206.According to the various embodiments of the disclosure, inductor components 214 and 216 are designed to suppression residual ESD electric currents and arrived
Up to IC chip 206, while also (synchronization) transmits the difference mode signal of identical frequency.This is by the way that inductor original paper 214 and 216 is constructed
The effective impedance of difference mode signal is significantly greater than to realize for the effective impedance of its common-mode signal.According to specific embodiment, decay
Residual current and 30A and the esd pulse that the duration is 1ns be consistent, and also with being worked under 1-5GHz (even more high)
Data-signal is consistent.Other embodiment considers that with 60A and duration be the consistent frequency components of 600ps.Therefore, decay can
To be arranged to appropriate value (for example, decay can be selected in the range of 1/20 to 1/30).
IC chip 206 is shown on printed circuit board (PCB) (PCB) 202.For example, IC chip can be in a different manner
Connection (for example, welding), this depend on specific encapsulation format that IC chip uses (for example, surface mounted package, ball grid array,
Chip carrier packages, small outline packages, pin grid array or flat package).
In certain embodiments, induction structure 204 and corresponding inductor components 214 and 216 are located at and can also be placed on
In single IC chip on PCB 202.For example, four pin packages that induction structure 204, which can be inductance coil, to be located therein
Part (two signal inputs and two signal outputs).Inductance coil, which can be designed to have, to be generally enough to provide desired decline
Subtract the inductance value and coupling factor with signal transmission capacity.
According to various embodiments, induction structure 204 can be directly integrated into PCB 202.For example, inductor components 214
It can be made up of with 216 the conductive trace with sufficient size, to produce desired inductance and coupling.
Some embodiments, which are related to, is placed on induction structure 204 and the protected identical IC chip 206 of circuit system 220
In encapsulation.For example, inductor components 214 and 216 can be designed to package substrate, the semiconductor chip of IC chip is placed on envelope
On fitted lining bottom.
Fig. 3 is the inductive circuit included with being designed to be protected from the injury of ESD electric currents in accordance with an embodiment of the present disclosure
The block diagram of the system of two esd protection circuits of combination.Similar with Fig. 2 discussion, Fig. 3 system includes PCB 302, and it includes
Esd protection circuit system 320 and induction structure 304 in circuit system 322, IC chip 306, piece under ESD protections.By ESD
The esd event that source 308 provides further is protected by esd protection circuit system 310.Esd protection circuit system 310 and ESD is protected
The cooperating of circuit system 320 is to provide two layers of protection.The effective impedance of coil 316 and 318 is based in part on, ESD electric currents exist
Distributed between two esd protection circuits 310 and 320.Therefore, esd protection circuit 310 can help to shunt by coil 316 and 318
The residual ESD electric currents of decay.For example, when effective impedance is high, on-chip protection circuit 320 will shunt relatively few in total current
Amount, and esd protection circuit 310 will shunt most total current.Lower current levels at on-chip protection circuit 320 can have
Help on-chip protection circuit 320 and use relatively low clamp voltage, so as to relative to being designed to handle the single of all ESD electric currents
Extra protection is provided for esd protection circuit.
According to various embodiments, the natural inductance of on-chip protection circuit 320 can (inadvertently) prevent some ESD electric current quilts
Ground is diverted to, especially for high fdrequency component.As a result can be that residual ESD electric currents may damage circuit system 322.Coil 316,
318 can be directed to this high fdrequency component and suppress ESD electric currents, and it has the effect for suppressing or decaying residual ESD electric currents, otherwise electric
Road system 322 may can be appreciated that residual ESD electric currents.Electricity between on-chip protection circuit 320 and coil 316 and 318 can be set
Feel than come the residual current amount that controls given esd event to be retained.According to some embodiments, the He of esd protection circuit system 310
320 inductance and the effective inductance of coil 316 and 318 are further used for effectively decaying together may be by the height of residual impulse
Residual current caused by frequency part.Result is due to that stress caused by the high fdrequency component of esd event is less, and this can be improved entirely
Overall robustness of the system to esd event.
In certain embodiments, inductor components 316 and 318 are located in the IC chip separated with IC chip 306.At some
In embodiment, the single chip can also include esd protection circuit system 310.For example, individually chip can be implemented as
With two inputs, two outputs and five pin packages of ground wire or low reference pin.In other embodiments, ESD protections electricity
Road system 310 is not on single chip.For example, esd protection circuit system 310 can be one of another IC chip
Divide, or all parts (for example, diode) by being welded direct to pcb board are formed.
According to embodiment, as discussed with Figure 2, inductor components 316 and 318 can be real directly in PCB 302
It is existing.
Fig. 4 is the inductive circuit group included with being designed to be protected from the injury of ESD electric currents according to disclosed embodiment
The block diagram of the system of three esd protection circuits closed.The system is configured similarly to combine the construction that Fig. 3 is discussed, has and puts
Put the additional esd protection circuit 412 between esd protection circuit 414 on inductor 410 and piece.Additional esd protection circuit
412 can be particularly useful in compensation (for example, due to caused by signal route in pcb board 402) first esd protection circuit
Spurious impedance between 408 and inner ESD protective circuit 414.Especially, high plate impedance may be such that more electric currents by more
The first esd protection circuit 408 close to esd event source 406 shunts.This can be that circuit system 416 provides extra protection.
Various parts in induction structure 403 can be located at different positions according to desired embodiment.For example,
Esd protection circuit 408 and 412 can put one as the single IC chip different with IC chip 404 altogether from inductor 410
Point.Alternatively, one or two in esd protection circuit 408 and 412 can use additional IC chip or using direct
The all parts or its combination for being attached to PCB are realized.
Fig. 5 to Figure 12 depicts the different views of film inductor layout patterns in accordance with an embodiment of the present disclosure.As
Example provides specified arrangement, is not intended to inductance component being limited to any specific construction or pattern.In special example
In, inductor is located at the top of substrate and using various polymer (for example, polyimides (PI) and polyphenyl and dislike Zo (PBO))
It is electrically isolated from one.Inductive patterns are made up of the conductive material of such as copper or copper alloy.
The inductor that Fig. 5 is depicted in accordance with an embodiment of the present disclosure is arranged to the pattern of form concentric spirals.Can according to
Instruct consistent desired inductance, coupling factor and differential impedance that trace thickness, spacing and length are set herein.Internally
Point 502 can connect the inductor to difference (relatively low) layer of substrate using through hole, and through hole allows to route to signal on substrate
Elsewhere.
Fig. 6 depicts the sectional view of the conductor pattern of Fig. 5 along line A-A interceptions in accordance with an embodiment of the present disclosure.
For each sectional view here, circle and cross indicate respectively the direction of current flow into page-out.It also show produced
Magnetic direction.The direction of current flow and magnetic field described are corresponding with common-mode signal, wherein respective magnetic field is relevant
Either it is added.For difference mode signal, the sense of current of one of coil will be opposite.Therefore, caused magnetic field Jiang Chu
In opposite direction and cancel out each other.
Fig. 7 depicts the pattern that inductor tracks in accordance with an embodiment of the present disclosure are arranged with concentric quadrangle patterns.Edge
Every side (part) of pattern, two inductor tracks are parallel to each other and closely spaced to provide good magnetic coupling
Close.
Fig. 8 depicts the sectional view of the conductor pattern of Fig. 7 along line A-A interceptions in accordance with an embodiment of the present disclosure.
Fig. 8 also illustrates the sense of current and magnetic direction of common mode excitation.Encouraged for common mode, the sense of current of the inductor pair of coupling
It is identical.Result, which is, to be relevant from the magnetic field of each coil and produces corresponding inductance.For difference mode signal, each coil
Magnetic field will cancel each other out, cause effective inductance to reduce, the wherein reduction is seen relative to the common-mode signal with identical frequency
The reduction of the inductance arrived.
Fig. 9 depicts the pattern that inductor tracks in accordance with an embodiment of the present disclosure are arranged with the quadrangle patterns stacked.
In the example that Figure 10 describes, coil 2 is located on relatively low wiring layer relative to coil 1.This construction is for reducing with more
The amount of the surface area consumed on the substrate of individual wiring layer is particularly useful.Although Fig. 9 shows square pattern, other shapes
Can be in a similar way (for example, the spiral pattern consistent with Fig. 6, or not explicitly depicted pattern, such as octagon pattern)
Stack.
Figure 10 depicts the sectional view of the inductor of Fig. 9 along line A-A interceptions in accordance with an embodiment of the present disclosure.Figure 10
Also illustrate the sense of current and magnetic direction of common mode excitation.For difference mode signal, magnetic field will cancel out each other, and cause effective inductance
(relative to common-mode signal) reduces.
The inductor tracks that Figure 11 is depicted in accordance with an embodiment of the present disclosure are arranged to the pattern of the spiral with straight line.
Each part quadrangle is formed with centroid.The trace 1002 of pattern-free represents the wiring on the different layers of substrate.
Figure 12 depicts the sectional view of the inductor of Figure 11 along line A-A interceptions in accordance with an embodiment of the present disclosure.Figure
12 also illustrate the sense of current and magnetic direction of common mode excitation.For difference mode signal, magnetic field will cancel out each other, and cause effective electricity
Sense reduces (relative to common-mode signal).
The induction structure and its variant that Fig. 5 describes into Figure 12 can be configured to be applied in various frequencies and frequency model
The difference mode signal enclosed.The data rate of specific Difference signal pair can be using equation below come for determining corresponding data signal
First harmonic or fundamental frequency (f0)：f0=1/2 data rate.In order to improve the signal quality of the difference mode signal of transmission, it is also contemplated that
One or more additional harmonics.
As particular example, high-speed transitions are defined as both 5GBit/s and 10GBit/s by USB 3.1.Caused one
Subharmonic is 2.5GHz and 5GHz.Caused second harmonic is 5GHz and 10GHz.Therefore, the bandwidth of system can be designed
Into equal to or more than these values.
Except providing enough bandwidth for difference mode signal, inductor can be configured to common-mode signal and provide enough decline
Subtract, signal particularly consistent with esd event.Make non-limiting example, esd event source and by the string between protection circuit system
Connection inductance can be designed as enough damping of the offer to first (quick) current peak of esd discharge (for example, such as
IEC61000-4-2 is defined).Effective inductance that can be based on series inductance and the guarantor positioned at protected circuit arrangement adjacent
The ratio of the effective inductance of protection circuit system come roughly to damping be modeled.Based on the ratio, the energy from common-mode signal
Amount is shared between two inductance, and its effect is the electric current for suppressing otherwise to reach protected circuit system.There is this to manage
Solution, series inductance can be designed to provide enough suppression based on the knowledge of the inductance to protection circuit system, this be because
For under given frequency, the reactance of inductor is directly proportional to inductance.
Using USB 3.1 as an example, chip is usually designed to the electric current for bearing about 2A, without extra guarantor
Shield.Assuming that 60A 15KV electric discharges, for the frequency component of correlation, inductance is set to make 60A decay to about 2A.Specific
In non-limiting example, the inductance of protection circuit system is about 1nH.Therefore, 30nH inductor can be and IEC61000-4-
2 consistent initial current pulses provide enough decay.Specific inductance value can according to the specific frequency being attenuated with
And in system the characteristic (for example, inductance of circuit system) of miscellaneous part and change.
Assuming that 30nH coils (Lnom) and 0.94 (or bigger) the known coefficient of coup (k) to ESD suppress be it is enough, this
Cause the effective inductance (L of difference mode signaleff) for 1.8nH when higher (or k even more small)：Leff=Lnom-(k*Lnom)。
F can be passed throughg=1/ (2*Pi*sqr (Leff*Csys) calculate differential signal bandwidth or cut-off frequency (fg).Assuming that
CsysIt is about 0.5pF, then can causes 5.31GHz bandwidth.Here, Csys(the example provided by the various parts in system is provided
Such as, I/O circuit systems, PCB or other sources on esd protection circuit system, piece) electric capacity sum.
The each side of the disclosure is based on following understanding：Common-mode filter with ceramic core may be not enough to transmission with
The signal of high data rate, because coupling is limited at high-frequency.The coupling of reduction and the magnetic dependent on crystallite dimension
Loss during reversion is relevant.The time correlation reversal of magnetism causes the reduction of bandwidth.Standard material works in MHz range.Very
Only there is very high coupling in up to GHz scope to nano-particle material.Various embodiments, which are related to, is not having high magnetic permeability material
The coil coupled in the case of material, such as air windings, therefore do not show this saturation effect at higher frequencies.Therefore, line
Circle can be separated by polymer, and it is not shown and lost caused by the reversal of magnetism of core material.
The use that Figure 13 depicts in accordance with an embodiment of the present disclosure has the electricity being designed to protect from the injury of ESD electric currents
The flow chart of the system or equipment of inductive circuit.By frame 1202, flow starts from the reception of the signal on differential signal line.Receive
Signal can include common-mode signal (it can come from esd event), difference mode signal (it can come from data-signal) or both.Should
System includes the induction structure of two inductors with inductive.Therefore, induction structure is configured to different by providing
Respective effective impedance impliedly distinguish common-mode signal and difference mode signal.The differentiation is represented by frame 1204.Due to this area
Point implicit property, it is possible in frame 1204 to determine it is not exclusive.In other words, can be wrapped in any given time, signal
Containing both common-mode signal and difference mode signal, and each corresponding path can be followed simultaneously.It is each due to structure by frame 1206
Coupling between individual inductor, induction structure have the effective inductance reduced, so allowing difference mode signal to be passed.
By frame 1208, in the degree that the signal received includes the common-mode signal consistent with static discharge (ESD) event,
Inductance component is by the high fdrequency component of attenuation common-mode signal.By frame 1210, esd protection circuit system detectio esd event (for example, by
Triggering).As response, by frame 1212, esd protection circuit is activated and starts shunt current.As discussed herein and with
IEC61000-4-2 standards are consistent, and esd event can have initial current spike, and its amplitude is big, the duration is short.This may
Cause the ESD electric currents of a large amount of residuals not being split due to the natural inductance of esd protection circuit.In this case, come from
The decay of frame 1208 can be with otherwise by reach protected circuit system residual ESD electric currents it is suitable.Recognize decay and electricity
The order of flow point stream is substantially not necessarily successive.If for example, the common-mode signal received signal initial part not
Including enough high fdrequency components, then esd protection circuit system can be activated in the case where (a lot) decay do not occur.This
Outside, no matter whether esd protection circuit system starts, and high frequency common-mode signals component can be received and decayed at any point.
By frame 1214, once esd event terminates, the process can restart.
In the exemplary embodiment, esd protection circuit system can use diode, transistor or silicon controlled rectifier
(SCR) avalanche breakdown caused by ionization by collision in carrys out shunt ESD current.Other ESD protection solutions are also possible.
For some solutions by with different conductings and cutoff threshold, it corresponds respectively to decision box 1210 and 1214.
Such as up/down, left/right, the term of orientation-indicating of top/bottom and above/below can serve to indicate that herein
The relative position of element as depicted.It should be appreciated that when the convenience for mark uses term, disclosed structure
Pointing to can be different with sensing to that indicated in the drawings.
For this paper purpose, following term and definition is applicable：" signal elevating time " refers to signal in peak signal value
Two percentages between time for changing, especially for the 10% to 90% of the peak signal value of this paper purposes；" planar inductor
Device " refers to the inductor of the trace that has positioned at flat surfaces on opposite with helix windings (for example, surrounding magnetic core) or winding.
This specification is described and/or shown by various circuits or circuit system to realize invention claimed
Aspect, these circuits or circuit system can use such as block, module, device, system, unit, controller, comparator and other
The description of circuit types discusses.These circuits or circuit system are discussed in the case where connecting other parts, to explain
How some embodiments can be implemented.For example, in above-mentioned some embodiments, the project shown in one or more of context
Expression is constructed and arranged to realizing the circuit of disclosed operation/activity (for example, discrete analog(ue) or logic circuit or (partly)
Programmable circuit), can as shown in scheming in a manner of implement.
Based on discussed above and explanation, it will be readily appreciated by those skilled in the art that can be carried out to various embodiments
Various variations and modifications, without following strictly exemplary embodiment shown and described herein and application.For example, with reference to accompanying drawing
Described method can be related to the step of implementing in various orders, wherein retain the one or more aspects of embodiment, or
The step of less or more can be related to.These modifications are each without departing from the disclosure of the aspect including being illustrated in claim
The true spirit and scope of individual aspect.
Claims (19)
1. a kind of equipment, including：
First inductance component, the first signal wire of itself and differential signal path is connected in series, and is configured to by using
One effective inductance suppresses the static discharge current spike on the first signal wire；And
Second inductance component, it is connected to the secondary signal line of the differential signal path, and is configured to by making
Suppress the static discharge current spike on the secondary signal line of the differential signal path with the second effective inductance,
First inductance component and second inductance component are configured to by using first inductance component and described
Inductive between second inductance component is to provide the 3rd effective inductance, to transmit the letter of the difference in the differential signal path
Number.
2. equipment according to claim 1, wherein, first inductance component and second inductance component are configured to
Static discharge current spike of the decay with the 1ns or shorter rise time.
3. equipment according to claim 2, wherein, first inductance component and second inductance component are configured to
Transmit the differential signal with the 1ns or shorter rise time.
4. equipment according to claim 1, wherein, first inductance component and second inductance component include having
The first inductance coil and the second inductance coil of path sections are laid out, wherein each path is substantially parallel to another path.
5. equipment according to claim 1, in addition to ESD protection circuit, it is configured to by by static discharge
Event current distributing provides electrostatic discharge (ESD) protection to reference voltage to be connected to the circuit system of the signal wire.
6. equipment according to claim 5, wherein, first inductance component and second inductance component are configured to
Suppress the frequency component as caused by the initial electrostatic discharge current spike of the electrostatic discharge event, and the static discharge is protected
Protection circuit is configured to the static discharge thing that will be split as a part for the initial electrostatic discharge current spike
Part current distributing is to the reference voltage.
7. equipment according to claim 5, wherein, first inductance component and second inductance component are positioned at printing
On circuit board, and wherein described circuit system is the IC chip on the printed circuit board (PCB).
8. equipment according to claim 5, wherein, the circuit system is the first integrated circuit on a printed circuit
Chip, and wherein described first inductance component and second inductance component be located on the printed circuit board (PCB) it is second integrated
On circuit chip.
9. equipment according to claim 1, wherein, without using first inductance component and second inductance component
Magnetic core in the case of the inductive between first inductance component and second inductance component is provided.
10. equipment according to claim 9, wherein, first inductance component and second inductance component by from
At least one material for being selected in the group being made up of air and polymer is isolated from each other.
11. equipment according to claim 10, wherein, each inductance component include being enough to provide at least 0.9 coupling because
The conductive trace of the close placement of son.
12. a kind of method, including step：
Receive the electrostatic discharge event formed on the signal wire of differential signal path；
The static discharge current from electrostatic discharge event is shunted using ESD protection circuit；
The effective inductance provided using the inductance component by being connected to the signal wire suppresses to put from the electrostatic
The residual static discharge current of electric event；
Receive the differential signal formed on the signal wire of the differential signal path；And
By using the inductive between the inductance component to reduce the effective inductance provided by the inductance component,
To transmit the differential signal.
13. according to the method for claim 12, wherein, the suppression includes following decay：It is enough with least 20
Multiple is no more than at least 30A of 1 nanosecond with the duration come the static discharge frequency component that decays, the static discharge frequency component
Pulse it is corresponding.
14. according to the method for claim 13, wherein, the decay is at least 30 times.
15. according to the method for claim 14, wherein, the differential signal has 600ps or shorter rise time.
16. according to the method for claim 12, wherein, the residual current is from between 25MHz to 1.0GHz
The frequency component of frequency.
17. the method according to claim 11, wherein, by using the frequency component of the differential signal of inductive transmission
Including the frequency between 25MHz to 1.0GHz.
18. the method according to claim 11, in addition to step：Shunted using another ESD protection circuit quiet
The part corresponding with the static discharge current of decay in discharge of electricity electric current.
19. according to the method for claim 12, wherein, the electricity is provided using the non-magnetic core between the inductance component
Feel the inductive between part.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/259,415 US20180069396A1 (en) | 2016-09-08 | 2016-09-08 | Inductive coupling for electrostatic discharge |
| US15/259,415 | 2016-09-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107809107A true CN107809107A (en) | 2018-03-16 |
Family
ID=59239864
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710806592.XA Pending CN107809107A (en) | 2016-09-08 | 2017-09-08 | Inductive for static discharge |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US20180069396A1 (en) |
| EP (1) | EP3293742A1 (en) |
| CN (1) | CN107809107A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113284696A (en) * | 2020-02-04 | 2021-08-20 | 株式会社村田制作所 | Common mode choke coil |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20210057404A1 (en) * | 2019-08-22 | 2021-02-25 | Qualcomm Incorporated | On-die electrostatic discharge protection |
| JP7115517B2 (en) * | 2020-06-26 | 2022-08-09 | 株式会社オートネットワーク技術研究所 | receiver |
| CN112098891B (en) * | 2020-09-17 | 2023-06-30 | 国网新源控股有限公司北京十三陵蓄能电厂 | Repeated pulse parameter optimization method and device for generator rotor turn-to-turn short circuit diagnosis |
| US11418026B1 (en) * | 2021-03-22 | 2022-08-16 | International Business Machines Corporation | Electrostatic protection device |
| EP4187599A1 (en) * | 2021-11-25 | 2023-05-31 | Nexperia B.V. | Esd protection device |
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| CN1716467A (en) * | 2004-07-01 | 2006-01-04 | Tdk株式会社 | Thin film coil, method of manufacturing the same, coil structure, and method of manufacturing the same |
| WO2009001312A2 (en) * | 2007-06-28 | 2008-12-31 | Nxp B.V. | Packaged device for common mode filtering and esd protection |
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| US8422190B2 (en) * | 2008-09-30 | 2013-04-16 | Tdk Corporation | Composite electronic device, manufacturing method thereof, and connection structure of composite electronic device |
| JP4749482B2 (en) * | 2009-07-08 | 2011-08-17 | Ｔｄｋ株式会社 | Composite electronic components |
| JP5617829B2 (en) * | 2011-05-31 | 2014-11-05 | 株式会社村田製作所 | Common mode choke coil and high frequency components |
| US8755158B2 (en) * | 2012-05-01 | 2014-06-17 | Texas Instruments Incorporated | ESD protection system optimized at board level |
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2016
- 2016-09-08 US US15/259,415 patent/US20180069396A1/en not_active Abandoned
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- 2017-09-08 CN CN201710806592.XA patent/CN107809107A/en active Pending
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| CN1716467A (en) * | 2004-07-01 | 2006-01-04 | Tdk株式会社 | Thin film coil, method of manufacturing the same, coil structure, and method of manufacturing the same |
| WO2009001312A2 (en) * | 2007-06-28 | 2008-12-31 | Nxp B.V. | Packaged device for common mode filtering and esd protection |
| CN102301831A (en) * | 2009-01-29 | 2011-12-28 | 松下电器产业株式会社 | Differential transmission circuit and electronic device provided with the same |
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| CN113284696A (en) * | 2020-02-04 | 2021-08-20 | 株式会社村田制作所 | Common mode choke coil |
Also Published As
| Publication number | Publication date |
|---|---|
| EP3293742A1 (en) | 2018-03-14 |
| US20180069396A1 (en) | 2018-03-08 |
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Application publication date: 20180316 |