CN107783027A - A kind of Integrity Testing of high-speed differential signal - Google Patents
A kind of Integrity Testing of high-speed differential signal Download PDFInfo
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- CN107783027A CN107783027A CN201710952081.9A CN201710952081A CN107783027A CN 107783027 A CN107783027 A CN 107783027A CN 201710952081 A CN201710952081 A CN 201710952081A CN 107783027 A CN107783027 A CN 107783027A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
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- Testing Electric Properties And Detecting Electric Faults (AREA)
Abstract
The invention discloses a kind of Integrity Testing of high-speed differential signal, the Length discrepancy that need to be introduced by calculating high-speed differential signal, again Length discrepancy is introduced by adjusting PCB welding, so that test eye pattern Outboard Sections turn into invalid pickup area, only center section is effective pickup area, eye pattern narrows, by artificially deteriorating the sampling retention time, whether carry out test signal has enough retention times to ensure that hardware chip can correctly recover normal signal, relative to tradition by eye pattern come the method for test signal quality, it is low very more that the method that the present invention uses implements cost, and can the accurate signal quality for reacting current design.
Description
Technical field：
The invention belongs to high speed signal technical field, more particularly to a kind of Integrity Testing of high-speed differential signal.
Background technology：
In electronic product, the signal transmission of high speed is often used between chip internal, chip and chip, if corresponding letter
Number quality is bad, and the unstable of equipment, function will be caused to perform mistake, or even failure；And judge the signal quality of these signals
Whether satisfaction requires, test eye pattern is then that most directly intuitively method, eye pattern can show the transmission quality of data signal, is passed through
It is usually used in the test and checking of high-speed digital signal.For 10G and the differential signal of the above, it is necessary to bandwidth 20G even more highs
Oscillograph, for this oscillograph price more than million, this is that general company is difficult to bear.For more accurate test signal quality
And so big cost need not be spent, the Integrity Testing for the high-speed differential signal being mentioned above has been invented in research.
The content of the invention：
In view of the above-mentioned problems, the technical problem to be solved in the present invention is to provide a kind of integrity test of high-speed differential signal
Method.
A kind of Integrity Testing of high-speed differential signal of the present invention, comprises the following steps：
A. normal physical link is carried out：Pcb board is welded, 4 pins are set in pcb board, set respectively at left and right sides of upside
No. 1 pin and No. 2 pins are put, No. 3 pins and No. 4 pins are set respectively at left and right sides of downside, between No. 1 pin and No. 2 pins
A electric capacity is welded, high-speed differential signal transmitting terminal reaches receiving terminal by A electric capacity；
B. the parameters of high-speed differential signal are adjusted；
C. apply big flow and beat current test：According to practical application scene, big flow is applied to high-speed differential signal to be measured and beaten
Current test；
D. wrong bag is judged whether：Whether wrong read packet receiving statistics in MAC ends corresponding to high-speed differential signal to be measured
Contract for fixed output quotas life, such as wrong bag, then repeatedly B-C steps until no longer wrong life of contracting for fixed output quotas, does not have mistake bag such as, then enter in next step；
E. the Length discrepancy that high-speed differential signal need to introduce is calculated：According to the frequency of high-speed differential signal and test high-speed-differential
The index of signal quality, contrast eye pattern calculates the cycle delay that need to be introduced, further according to high-speed differential signal in the TOP faces of pcb board
Or the transmission speed in BOT faces calculates Length discrepancy distance corresponding to the cycle delay of required introducing；
F. qualified Length discrepancy is introduced：Length discrepancy is introduced by adjusting PCB welding, in No. 1 pin and No. 3 pins
Between weld B electric capacity, C resistance is welded between No. 2 pins and No. 4 pins, the Length discrepancy of corresponding length is converted into according to the encapsulation of C resistance
Afterwards Length discrepancy required in addition is introduced further according to needing to change the solid line length between B electric capacity and C resistance；
G. apply big flow again and beat current test：Big flow is applied to high-speed differential signal to be measured again and beats current test；
H. wrong bag is judged whether again：MAC ends packet receiving corresponding to high-speed differential signal to be measured is again read off to count
Whether wrong life of contracting for fixed output quotas, such as wrong bag, then repeatedly B-G steps until no longer wrong life of contracting for fixed output quotas, do not have mistake bag such as, then into next
Step；
I. record and preserve the parameter after commissioning determines as final configuration.
Preferably, the parameters of high-speed differential signal are adjusted in the step B, the parameter includes preemphasis, goes to add
Weight and equalizing signal.
Preferably, the A electric capacity, B electric capacity and C resistance are 0402 encapsulation.
Beneficial effect of the present invention：The present invention is by introducing Length discrepancy so that eye pattern Outboard Sections turn into invalid collection
Region, only center section are effective pickup area, and eye pattern narrows, and by artificially deteriorating the sampling retention time, carry out test signal
Whether there are enough retention times to ensure that hardware chip can correctly recover normal signal, pass through eye pattern relative to tradition
Carry out the method for test signal quality, it is low very more that the method that the present invention uses implements cost, and can it is accurate instead
Answer the signal quality of current design.
Brief description of the drawings：
For ease of explanation, the present invention is described in detail by following specific implementations and accompanying drawing.
Fig. 1 is preferable signal eye diagram schematic diagram；
Fig. 2 is eye pattern schematic diagram after introducing Length discrepancy；
Fig. 3 is traditional pcb board welding manner schematic diagram；
Fig. 4 is present invention introduces the pcb board welding manner schematic diagram of Length discrepancy.
Embodiment：
It is specific below by what is shown in accompanying drawing to make the object, technical solutions and advantages of the present invention of greater clarity
Embodiment describes the present invention.However, it should be understood that these descriptions are merely illustrative, and it is not intended to limit the model of the present invention
Enclose.In addition, in the following description, the description to known features and technology is eliminated, to avoid unnecessarily obscuring the present invention's
Concept.
As Figure 1-4, the Integrity Testing of a kind of high-speed differential signal of the present embodiment, comprises the following steps：
A. normal physical link is carried out：As Fig. 3 welds pcb board, pcb board 4 pins of interior setting, the upside left and right sides point
Not She Zhi No. 1 pin and No. 2 pins, No. 3 pins and No. 4 pins are set at left and right sides of downside respectively, drawn in No. 1 pin and No. 2
A electric capacity is welded between pin, high-speed differential signal transmitting terminal reaches receiving terminal by A electric capacity；
B. the parameters of high-speed differential signal are adjusted, parameter includes preemphasis, postemphasises and the signal such as equilibrium；
C. apply big flow and beat current test：According to practical application scene, big flow is applied to high-speed differential signal to be measured and beaten
Current test；
D. wrong bag is judged whether：Whether wrong read packet receiving statistics in MAC ends corresponding to high-speed differential signal to be measured
Contract for fixed output quotas life, such as wrong bag, then repeatedly B-C steps until no longer wrong life of contracting for fixed output quotas, does not have mistake bag such as, then enter in next step；
E. the Length discrepancy that high-speed differential signal need to introduce is calculated：According to the frequency of high-speed differential signal and test high-speed-differential
The index of signal quality, contrast eye pattern calculates the cycle delay that need to be introduced, further according to high-speed differential signal in the TOP faces of pcb board
Or the transmission speed in BOT faces calculates Length discrepancy distance corresponding to the cycle delay of required introducing；
Specifically, the high-speed differential signal now using embodiment as 10G illustrates, for test eye pattern, we can do a letter
Change, such as Fig. 1 (preferable signal eye diagram), A points are earliest sampling instants, and B points are sampling instants the latest, when C points are optimum samplings
Carve.For 10G signal, Fig. 1 is half period, when a length of 50ps, for a preferable signal of signal quality, optimum sampling
There is the retention time of abundance around moment.
Transmission speed of the 10G high-speed differential signal in the TOP faces of pcb board or BOT faces be：Transmitting 1000mil needs
Time be 0.17ns, speed Vsig=(1000/170) (mil/ps), the delay Tsig=17ps of introducing, introduce Length discrepancy away from
From S=Vsig*Tsig=100mil=2.54mm.
That is unit conversion：The Length discrepancy distance that 1mil=0.0254mm, 10G high-speed differential signal need to introduce is
2.54mm。
F. qualified Length discrepancy is introduced：As Fig. 4 by adjusting PCB welding introduces Length discrepancy, in No. 1 pin and 3
B electric capacity is welded between number pin, C resistance is welded between No. 2 pins and No. 4 pins, corresponding length is converted into according to the encapsulation of C resistance
After Length discrepancy Length discrepancy required in addition is introduced further according to needing to change the solid line length between B electric capacity and C resistance；
Specifically, introducing 2.54mm Length discrepancy distance is now illustrated how：A electric capacity, B electric capacity and C resistance are 0402 envelope
Dress, 0402 package dimension is 1mm*0.5mm, i.e. C resistance is encapsulated as 1.0*0.5mm, Length discrepancy of this part equivalent to 1mm, is needed
Other 1.54mm Length discrepancy is introduced by changing the solid line length between B and C again, by PCB layout, drawn at No. 1
Pin and No. 3 pin welding B electric capacity, No. 2 pins and No. 4 pin welding C resistance, when the solid line length between B electric capacity and C resistance is
PCB trace part track lengths are 60.77mil, and conversion is exactly 1.543mm, thus introduces qualified Length discrepancy, He Jiyin
Enter 2.54mm Length discrepancies.
After introducing Length discrepancy, such as Fig. 2, eye pattern black portions turn into invalid pickup area, and only center section is to have
Pickup area is imitated, eye pattern narrows.
G. apply big flow again and beat current test：Big flow is applied to high-speed differential signal to be measured again and beats current test；
H. wrong bag is judged whether again：MAC ends packet receiving corresponding to high-speed differential signal to be measured is again read off to count
Whether wrong life of contracting for fixed output quotas, such as wrong bag, then repeatedly B-G steps until no longer wrong life of contracting for fixed output quotas, do not have mistake bag such as, then into next
Step；
I. record and preserve the parameter after commissioning determines as final configuration.
The present invention is by introducing Length discrepancy so that eye pattern Outboard Sections turn into invalid pickup area, only pars intermedia
It is divided into effective pickup area, eye pattern narrows, and by artificially deteriorating the sampling retention time, comes whether test signal there are enough holdings
Time ensures that hardware chip can correctly recover normal signal, relative to tradition by eye pattern come test signal quality
Method, the method that uses of the present invention implement that cost is low very more, and can the accurate signal for reacting current design
Quality.
The general principle and principal character and advantages of the present invention of the present invention has been shown and described above.The technology of the industry
Personnel are it should be appreciated that the present invention is not limited to the above embodiments, and the simply explanation described in above-described embodiment and specification is originally
The principle of invention, without departing from the spirit and scope of the present invention, various changes and modifications of the present invention are possible, these changes
Change and improvement all fall within the protetion scope of the claimed invention.The claimed scope of the invention by appended claims and its
Equivalent thereof.
Claims (3)
- A kind of 1. Integrity Testing of high-speed differential signal, it is characterised in that：Comprise the following steps：A. normal physical link is carried out：Pcb board is welded, 4 pins are set in pcb board, No. 1 is set respectively at left and right sides of upside Pin and No. 2 pins, the downside left and right sides set No. 3 pins and No. 4 pins, A are welded between No. 1 pin and No. 2 pins respectively Electric capacity, high-speed differential signal transmitting terminal reach receiving terminal by A electric capacity；B. the parameters of high-speed differential signal are adjusted；C. apply big flow and beat current test：According to practical application scene, apply big flow to high-speed differential signal to be measured and play stream survey Examination；D. wrong bag is judged whether：Read corresponding to high-speed differential signal to be measured whether packet receiving statistics in MAC ends is wrong to be contracted for fixed output quotas Raw, such as wrong bag, then repeatedly B-C steps up to no longer wrong life of contracting for fixed output quotas, do not have mistake bag such as, then entered in next step；E. the Length discrepancy that high-speed differential signal need to introduce is calculated：According to the frequency of high-speed differential signal and test high-speed differential signal The index of quality, contrast eye pattern calculates the figure delay that need to be introduced, further according to high-speed differential signal in the TOP faces of pcb board or BOT faces Transmission speed calculate needed for introducing cycle delay corresponding to Length discrepancy distance；F. qualified Length discrepancy is introduced：Length discrepancy is introduced by adjusting PCB welding, is welded between No. 1 pin and No. 3 pins B electric capacity is connect, C resistance is welded between No. 2 pins and No. 4 pins, is converted into according to the encapsulation of C resistance after the Length discrepancy of corresponding length again The solid line length between B electric capacity and C resistance is changed as needed to introduce Length discrepancy required in addition；G. apply big flow again and beat current test：Big flow is applied to high-speed differential signal to be measured again and beats current test；H. wrong bag is judged whether again：Whether again read off packet receiving statistics in MAC ends corresponding to high-speed differential signal to be measured Wrong life of contracting for fixed output quotas, such as wrong bag, then repeatedly B-G steps up to no longer wrong life of contracting for fixed output quotas, do not have mistake bag such as, then entered in next step；I. record and preserve the parameter after commissioning determines as final configuration.
- A kind of 2. Integrity Testing of high-speed differential signal according to claim 1, it is characterised in that：The step The parameters of high-speed differential signal are adjusted in B, the parameter includes preemphasis, postemphasised and equalizing signal.
- A kind of 3. Integrity Testing of high-speed differential signal according to claim 1, it is characterised in that：The A electricity Hold, B electric capacity and C resistance are 0402 encapsulation.
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| CN201710952081.9A CN107783027B (en) | 2017-10-13 | 2017-10-13 | A kind of Integrity Testing of high-speed differential signal |
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| CN201710952081.9A CN107783027B (en) | 2017-10-13 | 2017-10-13 | A kind of Integrity Testing of high-speed differential signal |
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| CN107783027B CN107783027B (en) | 2019-10-18 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115065429A (en) * | 2022-06-10 | 2022-09-16 | 电子科技大学(深圳)高等研究院 | High-speed signal frequency testing method based on eye pattern |
| CN115291075A (en) * | 2022-06-24 | 2022-11-04 | 杭州未名信科科技有限公司 | High-speed signal quality testing method and testing device |
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| US20110075761A1 (en) * | 2009-09-28 | 2011-03-31 | Fujitsu Limited | Differential signal transmission system and method |
| CN104969506A (en) * | 2012-12-19 | 2015-10-07 | 戴尔产品有限公司 | Systems and methods for differential pair in-pair skew determination and compensation |
| CN105338732A (en) * | 2015-12-09 | 2016-02-17 | 浪潮电子信息产业股份有限公司 | Wire winding method for improving high speed differential signals |
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| US20110075761A1 (en) * | 2009-09-28 | 2011-03-31 | Fujitsu Limited | Differential signal transmission system and method |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115065429A (en) * | 2022-06-10 | 2022-09-16 | 电子科技大学(深圳)高等研究院 | High-speed signal frequency testing method based on eye pattern |
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Denomination of invention: A method of integrity test for high-speed differential signal Effective date of registration: 20230208 Granted publication date: 20191018 Pledgee: Industrial Bank Limited by Share Ltd. Fuzhou branch Pledgor: FUZHOU CHUANGSHI XUNLIAN INFORMATION TECHNOLOGY CO.,LTD. Registration number: Y2023350000039 |
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