CN107770913B - Protection circuit for preventing MOS tube from overloading - Google Patents

Protection circuit for preventing MOS tube from overloading Download PDF

Info

Publication number
CN107770913B
CN107770913B CN201711067439.6A CN201711067439A CN107770913B CN 107770913 B CN107770913 B CN 107770913B CN 201711067439 A CN201711067439 A CN 201711067439A CN 107770913 B CN107770913 B CN 107770913B
Authority
CN
China
Prior art keywords
switch
capacitor
time
voltage
protection circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201711067439.6A
Other languages
Chinese (zh)
Other versions
CN107770913A (en
Inventor
罗杰
鲁华祥
李文昌
王彦虎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Institute of Semiconductors of CAS
University of Chinese Academy of Sciences
Original Assignee
Institute of Semiconductors of CAS
University of Chinese Academy of Sciences
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Institute of Semiconductors of CAS, University of Chinese Academy of Sciences filed Critical Institute of Semiconductors of CAS
Priority to CN201711067439.6A priority Critical patent/CN107770913B/en
Publication of CN107770913A publication Critical patent/CN107770913A/en
Application granted granted Critical
Publication of CN107770913B publication Critical patent/CN107770913B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/50Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/30Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/40Control techniques providing energy savings, e.g. smart controller or presence detection

Abstract

The disclosure provides a protection circuit for preventing an MOS transistor from being overloaded, wherein a first input end of the protection circuit is used for inputting a first voltage, and a second input end of the protection circuit is used for inputting a reference voltage; the time required for changing the first voltage from zero to the reference voltage value is first time, the protection circuit has preset conduction time, and the preset conduction time is a first multiple of the first time; the time required for changing the first voltage from zero to the peak voltage is a second time, the second time is a second multiple of the first time, when the second multiple is smaller than the first multiple, the output end is turned over after the second time, and when the second multiple is larger than the first multiple, the output end is turned over after the preset conduction time.

Description

Protection circuit for preventing MOS tube from overloading
Technical Field
The disclosure relates to the field of integrated circuits, in particular to a protection circuit for preventing an MOS (metal oxide semiconductor) tube from being overloaded.
Background
In recent years, switching power supplies are increasingly widely used, and among them, LED driving power supplies are more widely used. The power MOS is widely applied in the field of power supply, taking LED driving as an example, in LED driving, a method for realizing constant current output in a peak current control mode is widely adopted, and a schematic circuit diagram of the power MOS is shown in fig. 1 and is a typical application circuit of a BUCK circuit in the prior art. The circuit comprises a rectifier bridge formed by diodes D1-D4, an input capacitor Cin, a load LED lamp bead, a dummy load R1, an output capacitor Cout, an inductor L, a freewheeling diode D5, a sampling resistor Rcs and a controller in a dashed frame, wherein a power MOS Q1 is integrated in the controller; the hv end of the controller is connected with the inductor, the voltage sampling end is connected with the sampling resistor Rcs, and the vcc end is connected with the Cvcc.
The circuit principle described above: after the power switch tube Q1 is turned on, neglecting the conduction voltage drop of the power switch tube and the voltage drop of the Rcs, the voltage at the two ends of the inductor L is the difference value Vin-Vout between the input voltage Vin and the output voltage Vout, which makes the inductance current increase linearly with the slope (Vin-Vout)/L, the current flows through the sampling resistor Rcs, makes the voltage of the Vcs increase gradually, when the voltage of the Vcs reaches the internal reference voltage Vref, the comparator CMP1 outputs and controls the RS trigger to turn off the power tube; after the power tube is turned off, the freewheeling diode D5 is turned on because the inductive current cannot change suddenly, the voltage at two ends of the inductor is about Vout, the inductive current gradually decreases with the slope of Vout/L, when the inductive current decreases to 0, the demagnetization of the inductor is finished, and at this time, the demagnetization detection module in the controller controls the RS trigger to restart the power tube for a complete switching period.
In the circuit shown in fig. 1, in order to prevent the current flowing through the MOS transistor and the inductor from being too large, an overcurrent protection comparator is provided, and the comparator functions to output a MOS turn-off signal when the sampling voltage Vcs is greater than the internal Vref, so as to turn off the MOS, thereby avoiding the MOS current from being too large. The peak value of the flowing power MOS is equal to Vref/Rcs, if the resistance value of the sampling resistor Rcs is small, the peak current Ipk is large, the saturation tube voltage drop of the MOS transistor Q1 is set to Vdsat, the on-resistance of the linear region is Rdson, and if Ipk is equal to Rdson > Vdsat, the power MOS transistor Q1 enters the saturation region.
After the MOS transistor enters the saturation region, the drain-source voltage of the MOS transistor will rise rapidly, which will cause the voltage drop across the inductor L to decrease during Ton, resulting in an increase in the conduction time, even reaching the internally set maximum conduction time Tonmax; the increase of the conduction time can lead to the increase of the time that the power MOS is in a saturation region, the power consumption of the MOS is increased rapidly, and finally the MOS is burnt out and the system explodes.
BRIEF SUMMARY OF THE PRESENT DISCLOSURE
Technical problem to be solved
The utility model provides a prevent overload protection circuit of MOS pipe can control power MOS pipe and in time turn-off in the saturation region, avoids MOS pipe burnout and system to explode the machine, increases the reliability of system.
(II) technical scheme
The utility model provides a prevent MOS pipe overload's protection circuit includes: the circuit comprises a first input end, a second input end and an output end, wherein the first input end is used for inputting a first voltage, and the second input end is used for inputting a reference voltage; the time required for changing the first voltage from zero to a reference voltage value is first time, the protection circuit has preset on-time, and the preset on-time is a first multiple of the first time; the time required for changing the first voltage from zero to the peak voltage is a second time, the second time is a second multiple of the first time, when the second multiple is smaller than the first multiple, the output end is turned over after the second time, and when the second multiple is larger than the first multiple, the output end is turned over after the preset conduction time.
In some embodiments of the present disclosure, further comprising: the circuit comprises a comparator, a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a first capacitor, a second capacitor, a third capacitor, an operational amplifier and a current source; the non-inverting input end of the comparator is a first input end and is connected with the source electrode of the MOS tube, the inverting input end of the comparator is a second input end, and the output end of the comparator controls the on-off of the switch; the non-inverting input end of the operational amplifier is connected with the current source, the first end of the second capacitor and the first end of the second switch, the inverting input end of the operational amplifier is connected with the first end of the third capacitor, the first end of the third switch and the first end of the fourth switch, and the output end of the operational amplifier is connected with the second end of the fourth switch and the first end of the fifth switch; the first end of the first switch is connected with the second end of the second switch and the first end of the first capacitor; the second end of the first switch, the second end of the first capacitor, the second end of the second capacitor, the second end of the third switch and the second end of the sixth switch are grounded; and the second end of the fifth switch is connected with the first end and is used as the output end of the protection circuit to output an overload protection signal.
In some embodiments of the disclosure, a ratio of capacitance values of the first capacitor, the second capacitor, and the third capacitor is (K-2):1, and the first multiple is K.
In some embodiments of the present disclosure, the peak voltage is M times the reference voltage, and the second multiple is M.
In some embodiments of the disclosure, after the MOS transistor is turned on and does not reach the first time, the output terminal of the comparator outputs 0, the first switch, the fourth switch, and the sixth switch are turned on, the second switch, the third switch, and the fifth switch are turned off, the current source charges the second capacitor, the third capacitor is also charged, and the overload protection signal is 0.
In some embodiments of the present disclosure, when the first time is reached, the output terminal of the comparator outputs the signal 1, the second switch and the fifth switch are turned on, and the first switch, the third switch, the fourth switch and the sixth switch are turned off.
In some embodiments of the disclosure, after the second time or the preset on-time elapses, the first switch, the second switch, the third switch, the fourth switch, and the sixth switch are turned on, the fifth switch is turned off, and the overload protection signal is 1.
The present disclosure also provides a controller, comprising: the protection circuit, the MOS tube, the RS trigger, the drive circuit and the demagnetization detection circuit; the source electrode of the MOS tube is connected with the non-inverting input end of the comparator; the RS trigger has S end connected to the output of the protecting circuit, Q end connected to the grid of the MOS transistor via the driving circuit, and R end connected to the grid of the MOS transistor via the demagnetization detecting circuit.
The present disclosure also provides an LED protection circuit, including: the device comprises the controller, a rectifier bridge, an input capacitor, a dummy load, an output capacitor, an inductor, a freewheeling diode and a sampling resistor.
In some embodiments of the present disclosure, the rectifier bridge generates an input voltage; the first end of the input capacitor is connected with input voltage, and the second end of the input capacitor is grounded; the negative pole of the freewheeling diode is connected with the input voltage, and the positive pole is connected with the first end of the inductor; the output capacitor and the dummy load are connected in parallel with the input voltage and the second end of the inductor, and the second end of the sampling resistor is grounded.
(III) advantageous effects
According to the technical scheme, the working state of the MOS tube can be dynamically detected, when the MOS tube enters the saturation region due to overlarge current, the drain-source voltage of the MOS tube is enlarged to influence the internal peak detection, so that the required time for peak detection is longer than that required during normal working, the MOS tube is turned off through the overload protection of the MOS tube, and the phenomenon that the MOS tube works in the saturation region for a long time to cause explosion is avoided.
Drawings
FIG. 1 is a prior art LED driver circuit diagram;
fig. 2 is a circuit diagram of a protection circuit for preventing an MOS transistor from being overloaded according to an embodiment of the present disclosure;
FIG. 3 is a timing waveform diagram of the protection circuit during normal operation of the system;
fig. 4 is a timing waveform diagram of the system triggering MOS transistor overload protection.
Fig. 5 is a circuit diagram of an LED driving circuit to which the protection circuit of the embodiment of the present disclosure is applied.
Detailed Description
The technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the embodiments and the drawings in the embodiments. It is to be understood that the described embodiments are merely illustrative of some, and not restrictive, of the embodiments of the disclosure. All other embodiments, which can be derived by a person skilled in the art from the embodiments disclosed herein without making any creative effort, shall fall within the protection scope of the present disclosure.
An embodiment of the present disclosure provides a protection circuit for preventing an MOS transistor from being overloaded, as shown in fig. 2, including: comparator CMP2, logic circuit, switches K1, K2, K3, K4, K5, K6, capacitors C1, C2, C3, operational amplifier a1, and current source Ic.
The output end of the comparator CMP2 is connected with a logic circuit, the logic circuit also receives a swon signal, the swon signal is a control signal for finally controlling the MOS tube switch, and the output end of the logic circuit is a K1-K6 control logic bus which comprises 6control signals for respectively controlling K1-K6. CSH and swon output by the output end of the comparator CMP2 are processed by a logic circuit to generate a time sequence signal for controlling the switches K1-K6 to be switched on or off, and the switches can be realized by transmission gates.
The non-inverting input of the operational amplifier A1 is connected to the current source Ic, the first end of the capacitor C2, the first end of the switch K2, the inverting input thereof is connected to the first end of the capacitor C3, the first end of the capacitor K3 and the first end of the capacitor K4, and the output thereof is connected to the second end of the capacitor K4 and the first end of the capacitor K5.
The first end of the switch K1 is connected with the second end of the K2 and the first end of the capacitor C1; the second end of the switch K1 is grounded; the second end of the capacitor C1 is grounded; the second end of the capacitor C2 is grounded; the second end of the capacitor C3 is grounded; the second end of the switch K3 is grounded; the second end of the switch K5 is connected with the first end of the K6; the second terminal of the switch K6 is connected to ground.
The protection circuit of the present embodiment is an integral part of the controller. The controller further includes: MOS pipe Q1, RS flip-flop, drive circuit DRV, comparator CMP1, demagnetization detection circuit Tdem _ det. The protection circuit is used for preventing the MOS transistor Q1 from being overloaded. The non-inverting input end of the protection circuit comparator CMP2 is connected with the source electrode of the MOS tube Q1 and serves as the voltage sampling end cs of the controller; the inverting input of the comparator CMP2 is connected to the reference voltage Vref 1; a second end of the switch K5 is used as an output end of the protection circuit to output the overload protection signal OLP, the output end of the protection circuit and the output end of the comparator CMP1 are connected into an OR (OR) circuit, and the output end of the OR circuit is connected with the S end of the RS trigger; the Q end of the RS trigger is connected with the grid electrode of a MOS tube Q1 through a driving circuit DRV, the R end of the RS trigger is connected with the grid electrode of a MOS tube Q1 through a demagnetization detection circuit Tdem _ det, the source electrode of the MOS tube Q1 is used as a voltage sampling end cs of the controller, and the drain electrode of the MOS tube Q1 is used as a high-voltage power supply end (hv end) of the controller.
The controller is a component of the LED protection circuit, see fig. 5, which further includes: the LED lamp comprises a rectifier bridge, an input capacitor Cin, a load LED lamp bead, a dummy load R1, an output capacitor Cout, an inductor L, a freewheeling diode D5 and a sampling resistor Rcs.
The hv end of the controller is connected with the first end of the inductor L, the voltage sampling end of the controller is connected with the first end of the sampling resistor Rcs, and the power supply end (vcc end) is connected with the first end of the capacitor Cvcc. The rectifier bridge comprises four diodes D1, D2, D3, D4, which convert the Ac voltage Ac into a dc input voltage Vin. The input capacitor Cin has a first terminal connected to the input voltage Vin and a second terminal connected to ground. The freewheeling diode D5 has a cathode connected to the input voltage Vin and an anode connected to the first terminal of the inductor L. Output capacitor Cout, dummy load R1, load LED lamp pearl are parallelly connected in input voltage Vin and the second end of inductance L, load LED lamp pearl both ends output voltage Vout. The second terminal of the sampling resistor Rcs and the second terminal of the capacitor Cvcc are grounded.
In the protection circuit for preventing the MOS transistor from being overloaded according to this embodiment, after the MOS transistor Q1 is turned on, the voltage Vcs at the voltage sampling terminal cs increases from 0. Until the voltage Vcs reaches the reference voltage Vref1, the output signal CSH of the comparator CMP2 is 0, at which time K1 is on, K2 is off, K3 is off, K4 is on, K5 is off, and K6 is on. The current source Ic charges the capacitor C2, the operational amplifier a1 acts as a follower, the capacitor C3 is charged, the voltage of the capacitor C2 is followed, and the output overload protection signal OLP is 0.
When the voltage Vcs reaches the reference voltage Vref1 at time t1, the output signal CSH of the comparator CMP2 flips to 1, and at this time, the pilot goes on K2, then goes off K1, K3 goes off, K4 goes off, K5 goes on, and K6 goes off.
At time t1, the voltages at the non-inverting input terminal A and the inverting input terminal B of the operational amplifier A1 are both ic*t1/c2,icIs the current value of the current source Ic, c2Is the capacitance value of the capacitor C2. The operational amplifier a1 acts as a comparator, the voltage across the capacitor C3 remains constant, the capacitors C1 and C2 are connected in parallel, the voltages of the two are reset to zero, and the current source Ic charges the parallel capacitors C1 and C2.
After the on-time t2, the MOS tube is turned off, at this time, K1 is turned on, K2 is turned on, K3 is turned on, K4 is turned on, K5 is turned off, K6 is turned on, and all capacitance states are cleared.
In this embodiment, the ratio C of the capacitance values of the capacitors C1, C2 and C31∶c2∶c3This makes the ratio of the voltage rising slope of the capacitor C2 before and after the inversion of the comparator output signal CMP to (K-1) to 1, so that the on-time of the MOS transistor (i.e., the time when the output signal OLP of the operational amplifier a1 is inverted from 0 to 1) t2 is t1+ (K-1) t1 is K t 1.
The value of the reference voltage Vref1 of the protection circuit of the present embodiment can be set to be small, so that it can be considered approximately that the MOS transistor operates in the linear region before the voltage Vcs reaches Vref 1. Meanwhile, the peak voltage Vref of the voltage sampling terminal cs where the system normally works is set to M × Vref1, and M is less than K. When the controller and the LED protection circuit normally operate, the MOS transistor always operates in a linear region, at this time, the on-time t3 required for the voltage Vcs to reach the peak voltage Vref is M × t1, and since M is less than K, t3 is less than t2, so that the MOS transistor is turned off by the limitation of the peak voltage inside the controller under the normal operation condition, that is, the MOS transistor is turned off after the on-time t3, and the MOS overload protection is not triggered. If the corresponding state of the switch is 1 when the switch is turned on and 0 when the switch is turned off, the timing diagram of the protection circuit in normal operation is shown in fig. 3.
If the resistance of the sampling resistor Rcs is very small, and the peak current Ipk, the saturation tube voltage Vdsat of the MOS transistor Q1 and the on-resistance Rdson in the linear region satisfy Ipk + Rdson > Vdsat, then during the conduction period of the MOS transistor, the MOS transistor will enter the saturation region, the voltage Vds across the drain and the source will rapidly increase, and the voltage difference V across the inductor L will result in the voltage difference VL=Vin-Vout-Vds,VLIt will drop rapidly, which results in the current rising slope K1-V of the inductor LLL becomes small and the rising slope of the voltage Vcs of the sampling resistor Rcs becomes gradually small, which may cause the on-time t3 required for the voltage Vcs to reach the peak voltage Vref of normal operation to become large, so that t3 > t 2. At the moment, the MOS tube is turned off after the on-time t2 instead of t3, so that overload protection is triggered, the MOS tube is turned off before a normal turn-off signal is generated, and the danger of explosion caused by rapid rise of power consumption due to the fact that the MOS tube works in a saturation region for a long time is avoided. As shown in fig. 4, when the voltage Vcs has not reached Vref, the voltage at the non-inverting input terminal a of the operational amplifier a1 reaches the sample-and-hold voltage at the inverting input terminal B of the operational amplifier a1 again, the output signal OLP of the comparator CMP2 is inverted to 1, and the controller turns off the MOS transistor according to the inversion control of the OLP, thereby performing the MOS overload protection.
Another embodiment of the present disclosure also provides a controller, including: the protection circuit, the MOS transistor Q1, the RS flip-flop, the driving circuit DRV, and the demagnetization detection circuit Tdem _ det of the above embodiment are used to prevent the MOS transistor Q1 from being overloaded.
Another embodiment of the present disclosure further provides an LED protection circuit, including: the controller, rectifier bridge, input capacitance Cin, load LED lamp pearl, dummy load R1, output capacitance Cout, inductance L, freewheeling diode D5, sampling resistance Rcs of above-mentioned embodiment.
Up to this point, the present embodiment has been described in detail with reference to the accompanying drawings. From the above description, those skilled in the art should clearly recognize the present disclosure.
It is to be noted that, in the attached drawings or in the description, the implementation modes not shown or described are all the modes known by the ordinary skilled person in the field of technology, and are not described in detail. In addition, the above definitions of the various elements are not limited to the specific structures, shapes or modes mentioned in the embodiments, and those skilled in the art may easily modify or replace them, for example:
(1) directional phrases used in the embodiments, such as "upper", "lower", "front", "rear", "left", "right", etc., refer only to the orientation of the drawings and are not intended to limit the scope of the present disclosure;
(2) the embodiments described above may be mixed and matched with each other or with other embodiments based on design and reliability considerations, i.e. technical features in different embodiments may be freely combined to form further embodiments.
The above-mentioned embodiments are intended to illustrate the objects, aspects and advantages of the present disclosure in further detail, and it should be understood that the above-mentioned embodiments are only illustrative of the present disclosure and are not intended to limit the present disclosure, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present disclosure should be included in the scope of the present disclosure.

Claims (10)

1. A protection circuit for preventing a MOS tube from being overloaded comprises: a first input terminal, a second input terminal and an output terminal,
the first input end is used for inputting a first voltage, and the second input end is used for inputting a reference voltage;
the time required for changing the first voltage from zero to a reference voltage value is first time, the protection circuit has preset on-time, and the preset on-time is a first multiple of the first time; the time required for the first voltage to change from zero to the peak voltage is a second time, which is a second multiple of the first time,
and when the second multiple is greater than the first multiple, the output end is turned over after a preset conduction time.
2. The protection circuit of claim 1, further comprising: the circuit comprises a comparator, a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a first capacitor, a second capacitor, a third capacitor, an operational amplifier and a current source;
the non-inverting input end of the comparator is a first input end and is connected with the source electrode of the MOS tube, the inverting input end of the comparator is a second input end, and the output end of the comparator controls the on-off of the switch;
the non-inverting input end of the operational amplifier is connected with the current source, the first end of the second capacitor and the first end of the second switch, the inverting input end of the operational amplifier is connected with the first end of the third capacitor, the first end of the third switch and the first end of the fourth switch, and the output end of the operational amplifier is connected with the second end of the fourth switch and the first end of the fifth switch;
the first end of the first switch is connected with the second end of the second switch and the first end of the first capacitor; the second end of the first switch, the second end of the first capacitor, the second end of the second capacitor, the second end of the third switch and the second end of the sixth switch are grounded; and the second end of the fifth switch is connected with the first end and is used as the output end of the protection circuit to output an overload protection signal.
3. The protection circuit of claim 2, wherein a ratio of capacitance values of the first capacitor, the second capacitor, and the third capacitor is (K-2):1:1, and the first multiple is K.
4. The protection circuit of claim 2, wherein the peak voltage is M times the reference voltage and the second multiple is M.
5. The protection circuit as claimed in claim 2, wherein after the MOS transistor is turned on and the first time is not reached, the output terminal of the comparator outputs 0, the first switch, the fourth switch and the sixth switch are turned on, the second switch, the third switch and the fifth switch are turned off, the current source charges the second capacitor, the third capacitor is also charged, and the overload protection signal is 0.
6. The protection circuit of claim 5, wherein when the first time is reached, the output end of the comparator outputs a signal 1, the second switch and the fifth switch are turned on, and the first switch, the third switch, the fourth switch and the sixth switch are turned off.
7. The protection circuit of claim 6, wherein after the second time or the preset on-time, the first switch, the second switch, the third switch, the fourth switch and the sixth switch are turned on, the fifth switch is turned off, and the overload protection signal is 1.
8. A controller, comprising: the protection circuit, the MOS transistor, the RS flip-flop, the driver circuit, and the demagnetization detection circuit according to any one of claims 1 to 7;
the source electrode of the MOS tube is connected with the non-inverting input end of the comparator;
the RS trigger has S end connected to the output of the protecting circuit, Q end connected to the grid of the MOS transistor via the driving circuit, and R end connected to the grid of the MOS transistor via the demagnetization detecting circuit.
9. An LED protection circuit comprising: the controller of claim 8, a rectifier bridge, an input capacitor, a dummy load, an output capacitor, an inductor, a freewheeling diode, and a sampling resistor.
10. The LED protection circuit of claim 9, the rectifier bridge generating an input voltage; the first end of the input capacitor is connected with input voltage, and the second end of the input capacitor is grounded; the negative pole of the freewheeling diode is connected with the input voltage, and the positive pole is connected with the first end of the inductor; the output capacitor and the dummy load are connected in parallel with the input voltage and the second end of the inductor, and the second end of the sampling resistor is grounded.
CN201711067439.6A 2017-11-02 2017-11-02 Protection circuit for preventing MOS tube from overloading Active CN107770913B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201711067439.6A CN107770913B (en) 2017-11-02 2017-11-02 Protection circuit for preventing MOS tube from overloading

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201711067439.6A CN107770913B (en) 2017-11-02 2017-11-02 Protection circuit for preventing MOS tube from overloading

Publications (2)

Publication Number Publication Date
CN107770913A CN107770913A (en) 2018-03-06
CN107770913B true CN107770913B (en) 2020-03-17

Family

ID=61272509

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201711067439.6A Active CN107770913B (en) 2017-11-02 2017-11-02 Protection circuit for preventing MOS tube from overloading

Country Status (1)

Country Link
CN (1) CN107770913B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101594048A (en) * 2009-03-19 2009-12-02 深圳市联德合微电子有限公司 A kind of PWM type buck converter with overcurrent protection function
CN101707837A (en) * 2009-11-27 2010-05-12 上海晶丰明源半导体有限公司 LED drive circuit of source driver with change of output voltage and induction quantity keeping constant current
CN104486891A (en) * 2014-12-30 2015-04-01 杭州士兰微电子股份有限公司 Led drive circuit and constant current driver
CN106300275A (en) * 2016-09-26 2017-01-04 辉芒微电子(深圳)有限公司 A kind of BUCK drive circuit, power supply chip and application thereof
CN206195635U (en) * 2016-10-10 2017-05-24 上海晶丰明源半导体股份有限公司 Controller and adopt switching power supply of this controller

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7881077B2 (en) * 2007-07-20 2011-02-01 Niko Semiconductor Co., Ltd. PWM controller with output current limitation

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101594048A (en) * 2009-03-19 2009-12-02 深圳市联德合微电子有限公司 A kind of PWM type buck converter with overcurrent protection function
CN101707837A (en) * 2009-11-27 2010-05-12 上海晶丰明源半导体有限公司 LED drive circuit of source driver with change of output voltage and induction quantity keeping constant current
CN104486891A (en) * 2014-12-30 2015-04-01 杭州士兰微电子股份有限公司 Led drive circuit and constant current driver
CN106300275A (en) * 2016-09-26 2017-01-04 辉芒微电子(深圳)有限公司 A kind of BUCK drive circuit, power supply chip and application thereof
CN206195635U (en) * 2016-10-10 2017-05-24 上海晶丰明源半导体股份有限公司 Controller and adopt switching power supply of this controller

Also Published As

Publication number Publication date
CN107770913A (en) 2018-03-06

Similar Documents

Publication Publication Date Title
TWI535175B (en) Load driving circuit and method thereof
US9490716B2 (en) Isolated converter with initial rising edge PWM delay
CN102231605B (en) Synchronous rectification control circuit of switch power supply secondary and flyback switch power supply
CN103414322B (en) Control circuit, switch converter and control method thereof
CN113141118B (en) Control circuit and switching converter using same
CN110165872B (en) Switch control circuit and control method thereof
KR20010014888A (en) Switching regulator
CN211557145U (en) Zero-cross detection circuit and switching power supply circuit
CN213846230U (en) Overcurrent protection circuit
CN203251283U (en) Circuit for discharging gate of driving transistor having drain and source, and circuit for driver
CN103424602A (en) Secondary winding current detection circuit based on source electrode drive
US20170338814A1 (en) Switch control circuit and switch circuit
CN208656639U (en) Control circuit and switch converters for switch converters
JP2006149098A (en) Switching regulator
CN102403895B (en) Self-excitation Sepic converter based on MOSFET
CN112235903A (en) Control circuit, control method and LED drive circuit thereof
US9742279B2 (en) Interleaved buck converter
CN105763053B (en) ON-OFF control circuit, switching circuit and permanent turn-off time control method
CN104135790A (en) LED (Light-emitting Diode) dimming control circuit
US9698666B2 (en) Power supply and gate driver therein
CN107770913B (en) Protection circuit for preventing MOS tube from overloading
US9800169B2 (en) DC power supply device and lighting system using same
CN114365407B (en) Totem pole bridgeless power factor correction circuit and power electronic equipment
US20180019660A1 (en) Switching power supply
CN107087328B (en) LED driving circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant