CN107749393B - Growth method of lateral heterogeneous doped silicon carbide structure - Google Patents

Growth method of lateral heterogeneous doped silicon carbide structure Download PDF

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CN107749393B
CN107749393B CN201710913890.9A CN201710913890A CN107749393B CN 107749393 B CN107749393 B CN 107749393B CN 201710913890 A CN201710913890 A CN 201710913890A CN 107749393 B CN107749393 B CN 107749393B
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silicon carbide
graphene
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CN107749393A (en
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刘兴昉
申占伟
闫果果
温正欣
陈俊
王雷
赵万顺
张峰
孙国胜
曾一平
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Abstract

The present disclosure provides a growth method of a lateral heterogeneous doped silicon carbide structure, comprising: a first graphene template and a silicon source are used for reacting to generate a first silicon carbide structure of a first doping type; a second doping type second silicon carbide structure is generated by utilizing a second graphene template to react with a silicon source at the transverse adjacent part of the first silicon carbide structure; the first graphene template and the second graphene template are complementary on at least partial areas of the same plane. The method can prepare the atomic layer thickness low-dimensional silicon carbide semiconductor material with the lateral pn structure, has the advantages of simplicity, convenience, practicability, easiness in popularization and the like, and has a good popularization and application prospect.

Description

Growth method of lateral heterogeneous doped silicon carbide structure
Technical Field
The disclosure relates to the technical field of semiconductors, in particular to a growth method of a lateral heterogeneous doped silicon carbide structure.
Background
Graphene is a novel two-dimensional material, and although it can exist stably, its band gap is difficult to open. If combined with silicon to form silicon carbide, new low dimensional silicon carbide nanomaterials can be formed. Silicon carbide is a wide-bandgap semiconductor material, the band gap of which is 2-3 times that of Si, and has the characteristics of high critical breakdown electric field, high carrier saturation concentration and high thermal conductivity, so that the silicon carbide has potential application value in the aspects of high-frequency and microelectronic devices, is expected to be integrated with the existing silicon-based devices, and becomes one of the key basic materials of the next-generation semiconductor.
In order to form the lateral hetero-doped structure, a region hetero-doping process is required. The structure can not be prepared by a diffusion mode generally, and the structure is prepared by a region ion implantation mode generally at present, wherein a silicon oxide mask is needed to be adopted, and low-energy doping ions are implanted after patterning. Thereafter, further high temperature annealing is required to recover the lattice damage and activate the implanted ions. Although the implantation process is relatively mature, the implantation process is difficult for silicon carbide structures with atomic layer thicknesses and may be inoperable due to device capability being exceeded. In addition, a good doping effect is difficult to obtain by an injection method, the obtained carrier mobility is low, the quality of region doping is reduced, and the subsequent device performance is greatly influenced.
BRIEF SUMMARY OF THE PRESENT DISCLOSURE
Technical problem to be solved
The present disclosure provides a method of growing a lateral heterodoped silicon carbide structure to at least partially solve the technical problems set forth above.
(II) technical scheme
The invention discloses a growth method of a lateral heterogeneous doped silicon carbide structure, which comprises the following steps: a first graphene template and a silicon source are used for reacting to generate a first silicon carbide structure of a first doping type; a second doping type second silicon carbide structure is generated by utilizing a second graphene template to react with a silicon source at the transverse adjacent part of the first silicon carbide structure; the first graphene template and the second graphene template are complementary on at least partial areas of the same plane.
In some embodiments of the present disclosure, in the step of generating the first silicon carbide structure of the first doping type: the first graphene template is a first doping type graphene material; or the first graphene material is an undoped graphene material, and the first doping type is doped in the generation process of the first silicon carbide structure. In the step of creating a second silicon carbide structure of a second doping type: the second graphene template is a second doping type graphene material; or the second graphene material is an undoped graphene material, and the second doping type is doped in the generation process of the second silicon carbide structure.
In some embodiments of the present disclosure, the first silicon carbide structure and the second silicon carbide structure are formed sequentially or simultaneously.
In some embodiments of the present disclosure, a first silicon carbide structure and a second silicon carbide structure are formed sequentially, the growth method comprising: preparing or transferring a first graphene template on a substrate; reacting the first graphene template with a silicon source to generate a first silicon carbide structure; preparing or transferring a second graphene template on the substrate at a position between the first silicon carbide structures; and reacting the second graphene template with a silicon source to generate a second silicon carbide structure.
In some embodiments of the present disclosure, the first graphene template is an array of parallel rectangular blocks, the width of the rectangular blocks is 2-10 microns, the length of the rectangular blocks is 1-10 mm, and the spacing between the blocks is 2-100 microns.
In some embodiments of the present disclosure, the step of preparing the first graphene template on the substrate includes: patterning the graphene layer on the substrate to obtain a first graphene template; the method for preparing the second graphene template on the substrate and in the position between the first silicon carbide structures further comprises the following steps: removing a silicon structure which grows along with the preparation process of the first silicon carbide structure in the middle of the first graphene template on the substrate; the step of preparing a second graphene template on the substrate at locations between the first silicon carbide structures comprises: preparing a graphene layer on a substrate; patterning the graphene layer to obtain a second graphene template; the step of preparing the second silicon carbide structure by reacting the second graphene template with a silicon source further includes: removing silicon structures that are concomitantly formed during the preparation of the second silicon carbide structure.
In some embodiments of the present disclosure, in the step of patterning the graphene layer on the substrate to obtain the first graphene template, the graphene layer is grown in situ; or transferred to the surface of the substrate by transfer; the step of removing a silicon structure accompanying growth in a first silicon carbide structure preparation process in the middle of a first graphene template on a substrate includes: soaking the substrate and the resultant on the substrate in a mixed solution of hydrofluoric acid and concentrated nitric acid with the volume ratio of 1: 1 for 5-10 minutes; in the steps of reacting to generate the first silicon carbide structure and reacting to generate the second silicon carbide structure, the adopted silicon carbide preparation process is as follows: and raising the temperature to 1450-1550 ℃, keeping the temperature for 10-30 minutes in a hydrogen atmosphere, wherein the flow of the used hydrogen is 1-5 slm, the pressure is 500-760 Torr, the silicon carbide substrate is rotated at the rotating speed of 1-10 r/min, and SiH4 as a silicon source is introduced at the flow of 100-500 sccm.
In some embodiments of the present disclosure, the first silicon carbide structure and the second silicon carbide structure are formed simultaneously, the growth method comprising: forming a first graphene template and a second graphene template on a substrate; and introducing a silicon source, reacting the first graphene template with the silicon source to generate a first silicon carbide structure, and reacting the second graphene template with the silicon source to generate a second silicon carbide structure.
In some embodiments of the present disclosure, the step of forming the first graphene template and the second graphene template on the substrate comprises: transferring the first graphene layer to the surface of the substrate; carrying out patterning treatment on the first graphene layer to form a first graphene template; and transferring the second graphene layer to the surface of the substrate, wherein the part of the second graphene layer extending into the gap of the first graphene template forms a second graphene template.
In some embodiments of the present disclosure, the first doping type is one of p-type doping and n-type doping; the second doping type is the other of p-type doping and n-type doping.
(III) advantageous effects
According to the growth method of the lateral heterogeneous doped silicon carbide structure, in-situ lateral p and n doping is realized in the epitaxial layer with the thickness of the atomic layer, the ion implantation is not relied on, the aim that the later is difficult to realize can be realized in the doping aspect, and the aim of preparing the silicon carbide structure with the lateral heterogeneous doped atomic layer structure is further fulfilled.
In addition, compared with the traditional method, namely a method of regional ion implantation and high-temperature annealing, the method can be used for preparing the atomic layer thickness low-dimensional silicon carbide semiconductor material with the lateral pn structure, has the advantages of simplicity, convenience, easiness in popularization and the like, and has a better popularization and application prospect.
Drawings
Fig. 1 is a flow chart of a method of growing a lateral hetero-doped silicon carbide structure according to a first embodiment of the present disclosure.
Fig. 2 is a schematic cross-sectional view of the epitaxial material after performing steps in the growth method of fig. 1.
Figure 3 is a schematic cross-sectional view of the structure after various steps have been performed in a method of growing a lateral hetero-doped silicon carbide structure according to a second embodiment of the present disclosure.
Detailed Description
In the present disclosure, graphene is used as a template, and combined with a silicon source to form a silicon carbide layer having an atomic layer thickness. And by adopting a twice patterning process, combining the graphene regions sequentially prepared on the surface of the silicon carbide to form doped silicon carbide, so that a lateral heterogeneous doped silicon carbide structure can be realized.
For the purpose of promoting a better understanding of the objects, aspects and advantages of the present disclosure, reference is made to the following detailed description taken in conjunction with the accompanying drawings.
First, first embodiment
In one exemplary embodiment of the present disclosure, a method of growing a lateral heterodoped silicon carbide structure is provided. In this example, a 4-inch n-type 4H-SiC substrate was used, and the epitaxial crystal plane of the substrate was silicon plane (0001) and shifted by 4 degrees toward the <11-20> direction.
Fig. 1 is a flow chart of a method of growing a lateral hetero-doped silicon carbide structure according to a first embodiment of the present disclosure. Fig. 2 is a schematic cross-sectional view of the epitaxial material after performing steps in the growth method of fig. 1. As shown in fig. 1 and fig. 2, the method for growing the lateral hetero-doped silicon carbide structure of the present embodiment includes:
step A, cleaning a silicon carbide substrate;
the 4H-SiC was cleaned with a standard RCA clean process, blow dried with hot nitrogen, and charged into an epitaxial growth furnace as shown in (1) of fig. 2.
B, preparing a p-type graphene template on a crystal face of the silicon carbide substrate;
the p-type graphene template is used for reacting with silicon source gas to generate a p-type silicon carbide structure at a later stage. The step B specifically comprises the following steps:
substep B1, preparing a p-type graphene layer on a crystal face of the silicon carbide substrate;
in the sub-step, the preparation process of the p-type graphene layer comprises the following steps:
1. preparation procedure
The furnace temperature was raised to 1350 deg.C, and the 4H-SiC substrate was rotated with the tray at a speed of 10 revolutions per minute. Introducing hydrogen gas at a flow rate of 10slm and a growth chamber pressure of 10Torr, maintaining for 30 minutes, and further cleaning the 4H-SiC surface, for example, removing SiO remaining on the surface2。
2. Growth process of p-type graphene layer
The furnace temperature was then raised to 1750 ℃ at a hydrogen flow of 1slm with borane flow of 10 sccm. The preparation duration was 15 minutes. This process can produce a p-type graphene layer with a thickness of 1 to 5 atomic layers, as shown in (2) of fig. 2.
In this embodiment, the graphene layer is prepared in situ on the surface of the silicon carbide by high-temperature heat treatment, but the disclosure is not limited thereto. In other embodiments of the present disclosure, the silicon carbide substrate can be prepared ex-situ by chemical vapor deposition and attached to the surface of the silicon carbide substrate by transfer, which can also be implemented.
Step B2, patterning the p-type graphene layer to obtain a p-type graphene template on the silicon carbide substrate;
in the step, the specific process is as follows: and transferring the pattern to the graphene layer by adopting a photoetching mode, etching the graphene layer by using oxygen plasma, and removing the part of graphene which does not need to be reserved to obtain the p-type graphene template. The prepared p-type graphene template is a parallel rectangular block array, the width of each rectangular block is 2-10 micrometers, the length of each rectangular block is 1-10 millimeters, and the distance between every two blocks is 2-100 micrometers, as shown in (3) in fig. 2.
Step C, reacting the silicon source gas with the graphene material of the p-type graphene template on the silicon carbide substrate to generate a p-type silicon carbide structure, and generating a silicon structure in the gap of the graphene template;
in the step, the specific process is as follows: the temperature is raised to 1450-1550 ℃, the temperature is kept for 10-30 minutes in the hydrogen atmosphere, the flow of the hydrogen is 1-5 slm, the pressure is 500-760 Torr, the silicon carbide substrate is rotated at the rotating speed of 1-10 r/min, SiH as a silicon source is introduced4The flow rate is 100 to 500 sccm. Optionally, a doping source is introduced, and the flow rate is 5-10 sccm. The duration is 1-5 minutes. This process allows the growth of p-type silicon carbide structures with a thickness of 1 to 2 diatom layers, as shown in (4) of fig. 2.
It should be noted that in this embodiment, when the graphene template is prepared, p-type doping is already implemented, so that doping is not performed in this step, and the p-type doped first silicon carbide structure can be obtained. If doping is not carried out during the preparation of the graphene template, p-type doping can also be carried out in the growth process of the step, and a p-type silicon carbide structure can also be obtained.
D, removing silicon structures which are grown along with the growth of the p-type silicon carbide structures on the silicon carbide substrate in the process of the p-type silicon carbide structures between the graphene templates and the silicon carbide substrates, and keeping the p-type silicon carbide structures;
in this step, the silicon carbide substrate is immersed in a mixed solution of hydrofluoric acid and concentrated nitric acid (volume ratio 1: 1) for 5-10 minutes, and the silicon structure is removed, so as to obtain a p-type silicon carbide structure using graphene as a template, as shown in (5) in fig. 2.
Step E, preparing a second graphene template on the epitaxial crystal face of the silicon carbide substrate;
the second graphene template is complementary to the first graphene template and is used for reacting with a silicon source gas to generate an n-type silicon carbide structure at a later stage. The step E specifically comprises the following steps:
substep E1, preparing an n-type graphene layer on the growth crystal face of the silicon carbide substrate;
this substep is generally similar to the process of substep B1, except that: and introducing an n-type doping source ammonia gas simultaneously when preparing the graphene. After this sub-step, the cross-section of the silicon carbide substrate is shown in (5) in fig. 2.
Step E2, patterning the n-type graphene layer to obtain an n-type doped n-type graphene template on the silicon carbide substrate;
in this sub-step, the focus is to remove the graphene above the p-type silicon carbide structure. In practice, this step may also be omitted if the n-type graphene layer is grown just in the middle of the p-type silicon carbide structure. After this sub-step, the cross-section of the silicon carbide substrate is shown as (7) in fig. 2.
Step F, preparing an n-type silicon carbide structure by reacting the silicon source gas with the graphene material of the n-type graphene template on the silicon carbide substrate, as shown in (8) of fig. 2.
And G, removing the silicon structure which grows along with the preparation of the second silicon carbide structure to obtain the atomic layer thickness low-dimensional silicon carbide semiconductor material with the pn structure.
Thus, the first embodiment of the present disclosure has been described.
It should be noted that, in other embodiments similar to this embodiment, the graphene layers may also be transferred to the substrate surface, where the first graphene layer is patterned and then a silicon source is introduced to form a first silicon carbide layer, then the second graphene layer is transferred to the substrate surface, and the silicon source is introduced to form a second silicon carbide layer after patterning, and other steps are the same as in this embodiment, and the present disclosure may also be implemented.
Second and third embodiments
In a second exemplary embodiment of the present disclosure, another method of growing a lateral heterodoped silicon carbide structure is provided. In this embodiment, a 6-inch semi-insulating Si (100) substrate is used.
Figure 3 is a schematic cross-sectional view of the structure after various steps have been performed in a method of growing a lateral hetero-doped silicon carbide structure according to a second embodiment of the present disclosure. Referring to fig. 3, the method for growing the lateral hetero-doped silicon carbide structure of the present embodiment includes:
step S302, cleaning the substrate;
in this step, the substrate is cleaned by standard RCA cleaning process, rinsed in hydrofluoric acid of 30% concentration to remove native SiO2Layer and blow-drying with hot nitrogen, the cross-section of the substrate being asShown in (1) of FIG. 3.
Step S304, preparing an n-type graphene template on a growth surface of a substrate;
the step may further include:
substep S304a, transferring the n-type graphene layer to the surface of the substrate;
specifically, an N-type graphene layer having a thickness of 1 to 5 atomic layers was transferred to the surface of the substrate, and the cross section of the structure is shown in (2) in fig. 3.
Substep S304b, patterning the n-type graphene layer to prepare an n-type graphene template;
transferring the pattern to a graphene layer by adopting a photoetching mode, etching the graphene layer by using oxygen plasma, and removing the part of graphene which does not need to be reserved, wherein the prepared graphene pattern is a concentric ring array, the width of the ring is 2-10 micrometers, the distance between the rings is 2-100 micrometers, the diameter of an array coverage area is 5-20 millimeters, and the section of the structure is shown as (3) in figure 3.
Step S306, transferring the p-type graphene layer on the growth surface of the substrate;
specifically, a p-type graphene layer having a thickness of 1 to 5 atomic layers is transferred to the surface of the substrate, as shown in (4) in fig. 3.
And S308, loading the substrate into an epitaxial growth furnace, and performing high-temperature heat treatment to enable silicon atoms on the surface of the silicon substrate to be combined with n-type and p-type graphene simultaneously to form n-type and p-type silicon carbide structures.
In the step, the process comprises the following steps: the temperature is increased to 1150-1250 ℃, the temperature is kept for 10-30 minutes under the hydrogen atmosphere, the hydrogen flow is 1-5 slm, and the pressure is 500-760 Torr. And finally removing the graphene layer to obtain the atomic layer thickness low-dimensional silicon carbide semiconductor material with the pn junction structure, as shown in (5) in fig. 3.
Step S310, removing the residual graphene material to obtain a continuous lateral hetero-doped silicon carbide structure, as shown in (6) of fig. 3.
Thus, the second embodiment of the present disclosure has been described.
In another embodiment similar to this embodiment, the n-type and p-type graphene transferred to the surface of the silicon substrate may be patterned sequentially to alternately arrange the p-type and n-type graphene strips, and then combined by high-temperature heat treatment to form a silicon carbide layer having a lateral pn structure.
So far, two embodiments of the present disclosure have been described in detail with reference to the accompanying drawings. It is to be noted that, in the attached drawings or in the description, the implementation modes not shown or described are all the modes known by the ordinary skilled person in the field of technology, and are not described in detail. Further, the above definitions of the various elements and methods are not limited to the various specific structures, shapes or arrangements of parts mentioned in the examples, which may be easily modified or substituted by those of ordinary skill in the art.
From the above description, those skilled in the art should clearly recognize that the disclosed method of growing a lateral heterodoped silicon carbide structure is well known.
In conclusion, the growth method disclosed by the invention is simple and easy in process, low in cost, capable of realizing the lateral heterogeneous doping structure with the thickness of the atomic layer, and has great advantages in the aspect of preparing low-dimensional silicon carbide semiconductor materials, and has good popularization and application prospects.
It should also be noted that directional terms, such as "upper", "lower", "front", "rear", "left", "right", and the like, used in the embodiments are only directions referring to the drawings, and are not intended to limit the scope of the present disclosure. Throughout the drawings, like elements are represented by like or similar reference numerals. Conventional structures or constructions will be omitted when they may obscure the understanding of the present disclosure.
And the shapes and sizes of the respective components in the drawings do not reflect actual sizes and proportions, but merely illustrate the contents of the embodiments of the present disclosure. Furthermore, in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim.
Unless otherwise indicated, the numerical parameters set forth in the specification and attached claims are approximations that can vary depending upon the desired properties sought to be obtained by the present disclosure. In particular, all numbers expressing quantities of ingredients, reaction conditions, and so forth used in the specification and claims are to be understood as being modified in all instances by the term "about". Generally, the expression is meant to encompass variations of ± 10% in some embodiments, 5% in some embodiments, 1% in some embodiments, 0.5% in some embodiments by the specified amount.
Furthermore, the word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements.
The use of ordinal numbers such as "first," "second," "third," etc., in the specification and claims to modify a corresponding element does not by itself connote any ordinal number of the element or any ordering of one element from another or the order of manufacture, and the use of the ordinal numbers is only used to distinguish one element having a certain name from another element having a same name.
In addition, unless steps are specifically described or must occur in sequence, the order of the steps is not limited to that listed above and may be changed or rearranged as desired by the desired design. The embodiments described above may be mixed and matched with each other or with other embodiments based on design and reliability considerations, i.e., technical features in different embodiments may be freely combined to form further embodiments.
Similarly, it should be appreciated that in the foregoing description of exemplary embodiments of the disclosure, various features of the disclosure are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various disclosed aspects. However, the disclosed method should not be interpreted as reflecting an intention that: that is, the claimed disclosure requires more features than are expressly recited in each claim. Rather, as the following claims reflect, disclosed aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this disclosure.
The above-mentioned embodiments are intended to illustrate the objects, aspects and advantages of the present disclosure in further detail, and it should be understood that the above-mentioned embodiments are only illustrative of the present disclosure and are not intended to limit the present disclosure, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present disclosure should be included in the scope of the present disclosure.

Claims (9)

1. A method of growing a lateral heterodoped silicon carbide structure, comprising:
a first graphene template and a silicon source are used for reacting to generate a first silicon carbide structure of a first doping type;
a second doping type second silicon carbide structure is generated by utilizing a second graphene template to react with a silicon source at the transverse adjacent part of the first silicon carbide structure;
the first graphene template and the second graphene template are complementary on at least partial regions of the same plane;
wherein the first silicon carbide structure and the second silicon carbide structure are formed sequentially or simultaneously.
2. The growth method of claim 1, wherein:
in the step of creating a first silicon carbide structure of a first doping type:
the first graphene template is a first doping type graphene material; or
The first graphene material is an undoped graphene material, and is doped with a first doping type in the generation process of the first silicon carbide structure;
in the step of creating a second silicon carbide structure of a second doping type:
the second graphene template is a second doping type graphene material; or
The second graphene material is an undoped graphene material, and is doped with the second doping type in the generation process of the second silicon carbide structure.
3. The growth method of claim 1, the first and second silicon carbide structures being formed sequentially, the growth method comprising:
preparing or transferring a first graphene template on a substrate;
reacting the first graphene template with a silicon source to generate a first silicon carbide structure;
preparing or transferring a second graphene template on the substrate at a position between the first silicon carbide structures;
and reacting the second graphene template with a silicon source to generate a second silicon carbide structure.
4. The growth method according to claim 3, wherein the first graphene template is an array of parallel rectangular blocks, the width of the rectangular blocks is 2-10 microns, the length of the rectangular blocks is 1-10 mm, and the spacing between the blocks is 2-100 microns.
5. The growing method of claim 3, wherein:
the step of preparing the first graphene template on the substrate includes: patterning the graphene layer on the substrate to obtain a first graphene template;
the step of preparing the second graphene template on the substrate and between the first silicon carbide structures further comprises the following steps of: removing a silicon structure which grows along with the preparation process of the first silicon carbide structure in the middle of the first graphene template on the substrate;
the step of preparing a second graphene template on the substrate at a position between the first silicon carbide structures comprises: preparing a graphene layer on a substrate; patterning the graphene layer to obtain a second graphene template;
the step of preparing the second silicon carbide structure by reacting the second graphene template with a silicon source further includes: removing silicon structures that are concomitantly formed during the preparation of the second silicon carbide structure.
6. The growing method of claim 5, wherein:
in the step of patterning the graphene layer on the substrate to obtain the first graphene template, the graphene layer grows in situ; or transferred to the surface of the substrate by transfer;
the step of removing the silicon structure which is grown along with the first silicon carbide structure in the preparation process of the first silicon carbide structure and is arranged in the middle of the first graphene template on the substrate comprises the following steps: soaking the substrate and the resultant on the substrate in a volume ratio of 1: 1, mixing hydrofluoric acid and concentrated nitric acid for 5-10 minutes;
in the step of generating the first silicon carbide structure by the reaction and the step of generating the second silicon carbide structure by the reaction, the adopted silicon carbide preparation process comprises the following steps: and raising the temperature to 1450-1550 ℃, keeping the temperature for 10-30 minutes in a hydrogen atmosphere, wherein the flow of the used hydrogen is 1-5 slm, the pressure is 500-760 Torr, the silicon carbide substrate is rotated at the rotating speed of 1-10 r/min, and SiH4 as a silicon source is introduced at the flow of 100-500 sccm.
7. The growth method of claim 1, the first and second silicon carbide structures being formed simultaneously, the growth method comprising:
forming a first graphene template and a second graphene template on a substrate;
and introducing a silicon source, reacting the first graphene template with the silicon source to generate a first silicon carbide structure, and reacting the second graphene template with the silicon source to generate a second silicon carbide structure.
8. The growth method of claim 7, the step of forming a first graphene template and a second graphene template on a substrate comprising:
transferring the first graphene layer to the surface of the substrate;
carrying out patterning treatment on the first graphene layer to form a first graphene template;
and transferring the second graphene layer to the surface of the substrate, wherein the part of the second graphene layer extending into the gap of the first graphene template forms a second graphene template.
9. The growth method of any one of claims 1 to 8, wherein the first doping type is one of p-type doping and n-type doping; the second doping type is the other of p-type doping and n-type doping.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102815698A (en) * 2012-07-12 2012-12-12 同济大学 Method for synthesizing two-dimensional carbide through template restriction
CN105002563A (en) * 2015-08-11 2015-10-28 中国科学院半导体研究所 Silicon carbide epitaxial layer regional doping method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013067549A (en) * 2011-09-06 2013-04-18 Waseda Univ Method for forming thin film

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102815698A (en) * 2012-07-12 2012-12-12 同济大学 Method for synthesizing two-dimensional carbide through template restriction
CN105002563A (en) * 2015-08-11 2015-10-28 中国科学院半导体研究所 Silicon carbide epitaxial layer regional doping method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
模板及其在纳米材料合成领域的应用;张作山等;《化学进展》;20040130;第16卷(第1期);第26-33页 *

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