CN107743039B

CN107743039B - GPRS acquisition terminal signal strength self-adaptive data testing and transmitting device

Info

Publication number: CN107743039B
Application number: CN201711151077.9A
Authority: CN
Inventors: 青志明; 傅望; 秦燕; 张宏艳; 胡军毅; 许晓艳; 刘克恒; 龙漪澜; 苟欣; 韩涛; 罗时武; 康成林; 谢焰; 贺娟
Original assignee: State Grid Chongqing Electric Power Co Skill Training Center; State Grid Corp of China SGCC
Current assignee: State Grid Chongqing Electric Power Co Skill Training Center; State Grid Corp of China SGCC
Priority date: 2017-11-18
Filing date: 2017-11-18
Publication date: 2023-06-02
Anticipated expiration: 2037-11-18
Also published as: CN107743039A

Abstract

The GPRS acquisition terminal signal strength self-adaptive data testing and transmitting device comprises an uplink, a downlink and an MCU, wherein the downlink is a downlink pre-amplification circuit, a filtering circuit, a downlink attenuation circuit and a downlink power amplification circuit which are sequentially connected, and the uplink is an uplink pre-amplification circuit, a filtering circuit, an uplink attenuation circuit and an uplink power amplifier which are sequentially connected; the input end of the downlink pre-amplification and filtering circuit and the output end of the uplink power amplifier are connected with the first radio frequency switch, and the input end of the uplink pre-amplification and filtering circuit and the output end of the downlink power amplifier circuit are connected with the second radio frequency switch; and a lower and an upper detection circuits are arranged between the MCU and the lower and the upper power amplifying circuits, and the MCU controls the attenuation of the lower and the upper attenuation circuits and controls the output power of the lower and the upper power amplifying circuits according to the output power of the lower and the upper power amplifying circuits. It has automatic gain control function, and can make bandwidth selection.

Description

GPRS acquisition terminal signal strength self-adaptive data testing and transmitting device

Technical Field

The invention relates to the technical field of GPRS wireless data transmission, in particular to a GPRS acquisition terminal signal strength self-adaptive data testing and transmitting device.

Background

With the popularization of wireless communication technology application, more and more data communication is realized in a wireless manner, wherein the GPRS wireless data transmission technology has become the most widespread application in the data acquisition application of the power system. Historically, GPRS data transmission module developers have focused on the error correction capability and stability of the signal link with little effort in the analog signal transmission part.

After long-term practical application summary, the application of the current GPRS wireless data transmission module in a complex industrial environment has the following defects to be compensated: the GPRS terminal may have a very strong or weak signal due to the installation environment: the problem of transmission relay of wireless signals in a basement or a shielding environment; signal quality problems in remote areas; the signals near the base station are too strong, causing problems of circuit blocking.

In response to these problems, the applicant has devised an overall solution in which the problems of signal relay and signal quality in remote areas to the shielded environment are solved by a dedicated amplifier with gain control, bandwidth selection.

Aiming at the amplifier of the GPRS signal, a plurality of products are sold in the market at present, the principle is the same, the signals received by the antenna and the signals sent by the GPRS module are processed in a time-sharing mode and are amplified respectively, but the amplifier has the fatal defects of fixed gain and pursued output power, and the problem of interfering the normal operation of the base station occurs in a plurality of areas. In fact, each wireless communication device has its own signal strength threshold below which signal quality decreases and signal-to-noise ratio decreases. While above this threshold, the pre-amplifier is saturated and the signal is severely distorted to block, resulting in signals from other devices being masked.

Disclosure of Invention

The invention aims to provide a signal strength self-adaptive data testing and transmitting device of a GPRS acquisition terminal, which is a circuit system capable of carrying out self-adaptive GPRS wireless data transmission under the condition of extremely strong and weak signals, aiming at the corresponding defects of the prior art.

The invention is realized by adopting the following scheme: the GPRS acquisition terminal signal strength self-adaptive data testing and transmitting device comprises an uplink and a downlink, and also comprises an MCU, wherein the downlink is a downlink pre-amplification circuit, a filter circuit, a downlink attenuation circuit and a downlink power amplification circuit which are sequentially connected, and the uplink is an uplink pre-amplification circuit, a filter circuit, an uplink attenuation circuit and an uplink power amplifier which are sequentially connected; the input end of the downlink pre-amplification and filtering circuit and the output end of the uplink power amplifier are connected with the first radio frequency switch, and the input end of the uplink pre-amplification and filtering circuit and the output end of the downlink power amplifier circuit are connected with the second radio frequency switch; the MCU is used for receiving the output power of the downlink power amplifying circuit, comparing the output power of the downlink power amplifying circuit with a set value (or a set range), outputting a control signal to the downlink attenuation circuit, controlling the attenuation magnitude (attenuation magnitude) of the downlink power amplifying circuit, thereby controlling the output power of the downlink power amplifying circuit, enabling the output power of the downlink power amplifying circuit to be equal to or approximately equal to the set value, and arranging an uplink detection circuit between the MCU and the uplink power amplifying circuit, wherein the uplink detection circuit is used for detecting the output power of the uplink power amplifying circuit, converting the detected output power of the uplink power amplifying circuit into direct current, and transmitting the direct current to the MCU, and the MCU is used for receiving the output power of the uplink power amplifying circuit, comparing the output power of the uplink power amplifying circuit with the set value, outputting the control signal to the downlink attenuation magnitude (attenuation magnitude), controlling the output power of the downlink power amplifying circuit to be equal to or approximately equal to the set value, and enabling the attenuation magnitude of the output power of the uplink power amplifying circuit to be equal to or approximately equal to the set value.

The up-going pre-amplifying and filtering circuit and the down-going pre-amplifying and filtering circuit have the same circuit structure, the down-going pre-amplifying and filtering circuit comprises a high-gain HEMT amplifying element U6, the grid electrode of the high-gain HEMT amplifying element U6 is connected with a first radio frequency switch, the two source electrodes of the high-gain HEMT amplifying element U6 are grounded, the grid electrode of the high-gain HEMT amplifying element U6 is connected with one end of a 4 th inductor L4, the other end of the 4 th inductor L4 is respectively connected with one end of a 43 th capacitor C43 and one end of a 24 th resistor R24, the other end of the 43 th capacitor C43 is grounded, the two ends of the 43 th capacitor C43 are connected with a 44 th capacitor C44 in parallel, the other end of the 24 th resistor R24 is respectively connected with one ends of a 21 st resistor R21 and a 25 th resistor R25, the other end of the 25 th resistor R25 is grounded, the other end of the 21 st resistor R21 is respectively connected with one ends of a 14 th resistor R14, a 15 th resistor R15 and a 28 th capacitor C28, the other end of the 28 th capacitor C28 is grounded, the other end of the 15 th resistor R15 is connected with a 5V power supply (the other end of the 15 th resistor R15 is connected with the 5V power supply through a 7 th inductor L7), the other end of the 15 th resistor R15 is grounded through a 29 th capacitor C29, two ends of the 29 th capacitor C29 are connected with a 30 th capacitor C30 in parallel, the other end of the 14 th resistor R14 is respectively connected with one ends of a 27 th capacitor C27 and a 1 st inductor L1, the other end of the 27 th capacitor C27 is grounded, the other end of the 1 st inductor L1 is respectively connected with the drain electrode of a high gain HEMT amplifying element U6 and one end of a 9 th resistor R9, the other end of the 9 th resistor R9 is connected with one end of the 17 th capacitor C17, the other end of the 17 th capacitor C17 is connected with an attenuation network, the output end of the attenuation network is connected with a first-stage downlink filter circuit, the output end of the first-stage downlink filter circuit is used for being connected with a downlink attenuation circuit, and the first-stage downlink filter circuit adopts a first acoustic surface filter F1.

The damping network adopts pi-type damping network composed of a 3 rd resistor R3, a 10 th resistor R10 and a 4 th resistor R4. The input end of the pi-type attenuation network is respectively connected with one ends of a 3 rd resistor R3 and a 10 th resistor R10, the other end of the 3 rd resistor R3 is grounded, the other end of the 10 th resistor R10 is respectively connected with one ends of an output end and a 4 th resistor R4 of the pi-type attenuation network, and the other end of the 4 th resistor R4 is grounded.

An amplifying circuit is arranged between the output end of the first-stage downlink filter circuit and the input end of the downlink attenuation circuit, the amplifying circuit comprises an amplifier U3 with the model of SBB5089, the 1 st pin of the amplifier U3 of the SBB5089 is connected with the output end of the first-stage downlink filter circuit, the 4 th pin of the amplifier U3 of the SBB5089 is grounded, the 3 rd pin of the amplifier U3 of the SBB5089 is connected with the input end of the downlink attenuation circuit, the 3 rd pin of the amplifier U3 of the SBB5089 is connected with one end of a 2 nd inductor L2, the other end of the 2 nd inductor L2 is respectively connected with one end of a 31 st capacitor C31 and one end of a 16 th resistor R16, the other end of the 31 st capacitor C31 is connected with the 2 nd pin of the amplifier U3 of the SBB5089 in parallel, the two ends of the 31 st capacitor C31 are connected with a 32 nd capacitor C32, the other end of the 16 th resistor R16 is connected with a 5V power supply, the other end of the 16 th resistor R16 is connected with the 5V power supply through a 7 th inductor L7, the other end of the 16 th resistor R16 is connected with the 5V power supply through the two ends of the capacitor C33, and the two ends of the capacitor C33 are connected with the capacitor C33 in parallel. The output end of the first-stage downlink filter circuit is connected with the 1 st pin of the amplifier U3 of the SBB5089 through the 18 th capacitor C18. The 3 rd pin of the amplifier U3 of the SBB5089 is connected with the input end of the downlink attenuation circuit through the 19 rd capacitor C19.

The uplink attenuation circuit and the downlink attenuation circuit have the same circuit structure, the downlink attenuation circuit comprises a PIN diode D1-1, a PIN diode D1-2, a PIN diode D2-2 and a PIN diode D2-1, the anode of the PIN diode D1-1 is grounded through a 25 th capacitor C25, the anode of the PIN diode D2-2 is grounded through a 26 th capacitor C26, the anode of the PIN diode D1-1 is connected with one end of a 23 th resistor R23 through a 19 th resistor R19, the anode of the PIN diode D2-2 is connected with one end of the 23 th resistor R23 through a 20 th resistor R20, the other end of the 23 rd resistor R23 is connected with a 5V power supply, the other end of the 23 th resistor R23 is connected with the 5V power supply through a 7 th inductor L7, and the other end of the 23 th resistor R23 is grounded through a 41 th capacitor C41; the anode of the PIN diode D1-2 is connected with the anode of the PIN diode D2-1 and then is connected with one end of a 6 th inductor L6, the other end of the 6 th inductor L6 is connected with the MCU, the other end of the 6 th inductor L6 is grounded through a 45 th capacitor C45, and the two ends of the 45 th capacitor C45 are connected with a 46 th capacitor C46 in parallel; the cathode of the PIN diode D1-1 is connected with the cathode of the PIN diode D1-2 and then grounded through a 5 th resistor R5, and a node of the connection of the cathode of the PIN diode D1-1 and the cathode of the PIN diode D1-2 is an input end of a downlink attenuation circuit; the cathode of the PIN diode D2-2 is connected with the cathode of the PIN diode D2-1 and then grounded through a 6 th resistor R6, and the node of the connection between the cathode of the PIN diode D2-2 and the cathode of the PIN diode D2-1 is the output end of the downlink attenuation circuit.

A second-stage downlink filter circuit is arranged between the downlink attenuation circuit and the downlink power amplification circuit, and the second-stage downlink filter circuit adopts a second sound surface filter F2 and a third sound surface filter F3 which are connected in series.

The output end of the downstream attenuation circuit is connected with the input end of the second stage downstream filter circuit through a 20 th capacitor C20. The output end of the second stage downstream filter circuit is connected with the input end of the downstream power amplifying circuit through a 21 st capacitor C21.

The circuit structures of the uplink power amplifying circuit and the downlink power amplifying circuit are the same; the downstream power amplifying circuit comprises a power amplifier module U5 with the model of SKY77768 and an amplifier U4 of an SBB5089, wherein the 1 st pin of the amplifier U4 of the SBB5089 is an input end of the downstream power amplifying circuit, the 4 th pin of the amplifier U4 of the SBB5089 is grounded, the 3 rd pin of the amplifier U4 of the SBB5089 is connected with the 2 nd pin of the power amplifier module U5 through an attenuation network, the 3 rd pin of the amplifier U4 of the SBB5089 is connected with the input end of the attenuation network through a 22 nd capacitor C22, and the output end of the attenuation network is connected with the 2 nd pin of the power amplifier module U5 through a 23 rd capacitor C23. The 3 rd pin of the amplifier U4 of the SBB5089 is connected with one end of the 3 rd inductor L3, the other end of the 3 rd inductor L3 is respectively connected with one end of a 35 rd capacitor C35 and one end of a 17 th resistor R17, the other end of the 35 rd capacitor C35 is connected with the 2 nd pin of the amplifier U4 of the SBB5089 and grounded, the 36 rd capacitor C36 is connected in parallel with the two ends of the 35 th capacitor C35, the other end of the 17 th resistor R17 is connected with a 5V power supply, the other end of the 17 th resistor R17 is connected with the 5V power supply through a 7 th inductor L7, the other end of the 17 th resistor R17 is grounded through a 38 th capacitor C38, and the two ends of the 38 th capacitor C38 are connected with a 42 th capacitor C42 in parallel; the 1 st pin and the 10 th pin of the power amplifier module U5 are connected with a 3.3V power supply, the 1 st pin and the 10 th pin of the power amplifier module U5 are connected and grounded through a 12 th capacitor C12, the two ends of the 12 th capacitor C12 are connected with a 13 th capacitor C13, a 14 th capacitor C14, a 15 th capacitor C15 and a 16 th capacitor C16 in parallel, the 9 th pin of the power amplifier module U5 is an output end of a downlink power amplifier circuit, the 8 th pin of the power amplifier module U5 is grounded through a 12 th resistor R12, the 7 th pin and the 11 th pin of the power amplifier module U5 are grounded, the 5 th pin of the power amplifier module U5 is respectively connected with one end of a 13 th resistor R13, an 18 th resistor R18 and one end of a 24 th capacitor C24, the other end of the 13 th resistor R13 is connected with the 3.3V power supply, and the other end of the 18 th resistor R18 and the other end of the 24 th capacitor C24 are grounded; the downlink detection circuit comprises a Schottky diode D3, the anode of the Schottky diode D3 is respectively connected with one ends of a 5 th inductor L5 and a 37 th capacitor C37, the other end of the 5 th inductor L5 is grounded, the other end of the 37 th capacitor C37 is connected with a 6 th pin of a power amplifier module U5, the cathode of the Schottky diode D3 is connected with an MCU, the cathode of the Schottky diode D3 is respectively connected with one ends of a 39 th capacitor C39 and a 22 th resistor R22, the other ends of the 39 th capacitor C39 and the 22 th resistor R22 are grounded, and the two ends of the 39 th capacitor C39 are connected with a 40 th capacitor C40 in parallel.

The damping network adopts a pi-type damping network composed of a 7 th resistor R7, an 11 th resistor R11 and an 8 th resistor R8.

The second stage uplink filter circuit is arranged between the uplink attenuation circuit and the uplink power amplifying circuit, the second stage uplink filter circuit adopts a fifth acoustic surface filter F5 and a fourth acoustic surface filter F4, an amplifying circuit is arranged between the fifth acoustic surface filter F5 and the fourth acoustic surface filter F4, the amplifying circuit comprises an amplifier U12 with the model of SBB5089, the 1 st pin of the amplifier U12 of the SBB5089 is connected with the output end of the fifth acoustic surface filter F5, the 4 rd pin of the amplifier U12 of the SBB5089 is grounded, the 3 rd pin of the amplifier U12 of the SBB5089 is connected with the input end of the fourth acoustic surface filter F4, the 3 rd pin of the amplifier U12 of the SBB5089 is connected with one end of a 17 th inductor L17, the other end of the 17 th inductor L17 is respectively connected with one end of a 67 th capacitor C67 and one end of a 34 resistor R34, the other end of the 67 th capacitor C67 is connected with the 2 pin of the amplifier U12 of the SBB5089 in parallel with the end of the power supply C62C 67, the other end of the second capacitor C62V 67 is connected with the other end of the power supply 34C 62V 62 through the end of the capacitor C67 of the capacitor C12 of the SBB5089, and the other end of the power supply 34 is connected with the other end of the power supply 34C 62V 62 is connected with the other end of the capacitor C62 in parallel with the end of the capacitor C62. The SBB5089 active bias network provides stable over-current protection and dc operating points.

The first radio frequency switch and the second radio frequency switch are both acoustic meter diplexers, and the acoustic meter diplexers are SD902AP2 in model. The output end of the downlink power amplifying circuit is connected with the downlink input end of the second radio frequency switch through a 47 th capacitor C47. The downlink input end of the second radio frequency switch is grounded through an 8 th inductor L8. The downlink output end and the uplink input end of the second radio frequency switch are respectively connected with the GPRS data transmission module. The uplink output end of the second radio frequency switch is grounded through an 11 th inductor L11. The uplink output end of the second radio frequency switch is connected with the input end of the uplink pre-amplifying and filtering circuit through a 47 th capacitor C47. And a 48 th capacitor C48 at the downlink output end of the first radio frequency switch is connected with the input end of the downlink pre-amplifying and filtering circuit. The downlink output end of the first radio frequency switch is grounded through a 9 th inductor L9. The downlink input end and the uplink output end of the first radio frequency switch are respectively connected with the antenna. The output end of the uplink power amplifying circuit is connected with the uplink input end of the first radio frequency switch through a 49 th capacitor C49. The uplink input end of the first radio frequency switch is grounded through a 10 th inductor L10.

The MCU is connected with a display for displaying the real received signal strength under the current condition, so as to facilitate the operation of field personnel and the selection of the base station by the field personnel.

The invention has the advantages that: the GPRS acquisition terminal signal strength self-adaptive data testing and transmitting device comprises an MCU, wherein the downlink is a downlink pre-amplifying circuit, a filtering circuit, a downlink attenuation circuit and a downlink power amplifying circuit which are connected in sequence, and the uplink is an uplink pre-amplifying circuit, a filtering circuit, an uplink attenuation circuit and an uplink power amplifier which are connected in sequence; the input end of the downlink pre-amplification and filtering circuit and the output end of the uplink power amplifier are connected with the first radio frequency switch, and the input end of the uplink pre-amplification and filtering circuit and the output end of the downlink power amplifier circuit are connected with the second radio frequency switch; a downlink detection circuit is arranged between the MCU and the downlink power amplifying circuit, the downlink detection circuit is used for detecting the output power of the downlink power amplifying circuit, converting the detected output power of the downlink power amplifying circuit into a direct current level and transmitting the direct current level to the MCU, the MCU is used for receiving the output power of the downlink power amplifying circuit, comparing the output power of the downlink power amplifying circuit with a set value, outputting a control signal to a downlink attenuation circuit, and controlling the attenuation amount (attenuation amplitude, thereby controlling the output power of the downlink power amplifying circuit; the invention provides a bidirectional automatic gain control uplink and downlink signal amplification circuit, which is characterized in that the bidirectional automatic gain control uplink and downlink signal amplification circuit is provided with an amplifier with high stability and low noise under the condition of high gain, the invention realizes the development of a low-cost uplink and downlink signal amplifier by using an intelligent control technology, provides dual functions of automatic gain control and on-site signal strength detection, controls the output signal in a reasonable range due to the automatic gain control function, the signal intensity received by the base station is in the allowable range, and the gain of the receiving end amplifier can be adjusted according to the intensity of the received signal, so that the amplitude of the signal entering the GPRS module is in the optimal state.

In a word, the invention is double-path time-sharing amplification, and has the functions of double-path automatic gain control, double-path power detection, single-path signal strength display and the like. The invention can also be used as a signal strength tester with a corresponding signal strength display screen.

Drawings

Fig. 1 is a schematic block diagram of a GPRS acquisition terminal signal strength adaptive data testing and transmitting device according to the present invention;

fig. 2 is a specific circuit diagram of an MCU part of the GPRS acquisition terminal signal strength adaptive data testing and transmitting device according to the present invention;

fig. 3 is a specific circuit diagram of the uplink and downlink of the GPRS acquisition terminal signal strength adaptive data testing and transmitting device according to the present invention;

FIG. 4 is a schematic diagram of simulation results of a voltage-controlled attenuator circuit according to the present invention;

FIG. 5 is a schematic diagram of the results of simulating the minimum attenuation of an attenuation circuit in ADS simulation software;

fig. 6 is a schematic diagram of simulation results obtained when the equivalent impedance of the PIN diode in the voltage-controlled attenuation circuit reaches a maximum of 1500 ohms.

Detailed Description

Referring to fig. 1 to 3, a device for testing and transmitting adaptive data of signal strength of a GPRS acquisition terminal comprises an uplink and a downlink, and further comprises an MCU, wherein the downlink is a downlink pre-amplification circuit, a filtering circuit, a downlink attenuation circuit and a downlink power amplification circuit which are sequentially connected, and the uplink is an uplink pre-amplification circuit, a filtering circuit, an uplink attenuation circuit and an uplink power amplifier which are sequentially connected; the input end of the downlink pre-amplification and filtering circuit and the output end of the uplink power amplifier are connected with the first radio frequency switch, and the input end of the uplink pre-amplification and filtering circuit and the output end of the downlink power amplifier circuit are connected with the second radio frequency switch; the MCU is used for receiving the output power of the downlink power amplifying circuit, comparing the output power of the downlink power amplifying circuit with a set value, outputting a control signal to the downlink attenuating circuit, controlling the attenuation amount (attenuation amplitude) of the downlink attenuating circuit, thereby controlling the output power of the downlink power amplifying circuit, and arranging an uplink detecting circuit between the MCU and the uplink power amplifying circuit, wherein the uplink detecting circuit is used for detecting the output power of the uplink power amplifying circuit, converting the detected output power of the uplink power amplifying circuit into a direct current level and transmitting the direct current level to the MCU, and the MCU is used for receiving the output power of the uplink power amplifying circuit, comparing the output power of the uplink power amplifying circuit with the set value, outputting the control signal to the uplink attenuating circuit, and controlling the attenuation amount (attenuation amplitude) of the uplink attenuating circuit, thereby controlling the output power of the uplink amplifying circuit.

The downstream pre-amplifying and filtering circuit comprises a high gain HEMT amplifying element U6, wherein the grid electrode of the high gain HEMT amplifying element U6 is connected with a first radio frequency switch, the two source electrodes of the high gain HEMT amplifying element U6 are grounded, the grid electrode of the high gain HEMT amplifying element U6 is connected with one end of a 4 th inductor L4, the other end of the 4 th inductor L4 is respectively connected with one end of a 43 rd capacitor C43 and one end of a 24 th resistor R24, the other end of the 43 th capacitor C43 is grounded, the two ends of the 43 rd capacitor C43 are connected with a 44 th capacitor C44 in parallel, the other end of the 24 th resistor R24 is respectively connected with one ends of a 21 st resistor R21 and a 25 th resistor R25, the other end of the 25 th resistor R25 is grounded, the other end of the 21 st resistor R21 is respectively connected with one ends of a 14 th resistor R14, a 15 th resistor R15 and a 28 th capacitor C28, the other end of the 28 th capacitor C28 is grounded, the other end of the 15 th resistor R15 is connected with a 5V power supply (the other end of the 15 th resistor R15 is connected with the 5V power supply through a 7 th inductor L7), the other end of the 15 th resistor R15 is grounded through a 29 th capacitor C29, two ends of the 29 th capacitor C29 are connected with a 30 th capacitor C30 in parallel, the other end of the 14 th resistor R14 is respectively connected with one ends of a 27 th capacitor C27 and a 1 st inductor L1, the other end of the 27 th capacitor C27 is grounded, the other end of the 1 st inductor L1 is respectively connected with the drain electrode of a high-gain HEMT amplifying element U6 and one end of a 9 th resistor R9, the other end of the 9 th resistor R9 is connected with one end of a 17 th capacitor C17, the other end of the 17 th capacitor C17 is connected with an attenuation network, the output end of the attenuation network is connected with a first-stage downlink filter circuit, the output end of the first-stage downlink filter circuit is used for being connected with a downlink attenuation circuit, the first stage downstream filtering circuit adopts a first acoustic surface filter F1. The selection of the pre-amplifier is based on the principle of low noise, the gain is not a very important indicator, and the embodiment uses the ATF-54143 high frequency FET of An Huagao according to the requirements of the frequency band used.

The uplink attenuation circuit and the downlink attenuation circuit have the same circuit structure, the downlink attenuation circuit comprises a PIN diode D1-1, a PIN diode D1-2, a PIN diode D2-2 and a PIN diode D2-1, the anode of the PIN diode D1-1 is grounded through a 25 th capacitor C25, the anode of the PIN diode D2-2 is grounded through a 26 th capacitor C26, the anode of the PIN diode D1-1 is connected with one end of a 23 th resistor R23 through a 19 th resistor R19, the anode of the PIN diode D2-2 is connected with one end of the 23 th resistor R23 through a 20 th resistor R20, the other end of the 23 rd resistor R23 is connected with a 5V power supply, the other end of the 23 th resistor R23 is connected with the 5V power supply through a 7 th inductor L7, and the other end of the 23 th resistor R23 is grounded through a 41 th capacitor C41; the anode of the PIN diode D1-2 is connected with the anode of the PIN diode D2-1 and then is connected with one end of a 6 th inductor L6, the other end of the 6 th inductor L6 is connected with the MCU, the other end of the 6 th inductor L6 is grounded through a 45 th capacitor C45, and the two ends of the 45 th capacitor C45 are connected with a 46 th capacitor C46 in parallel; the cathode of the PIN diode D1-1 is connected with the cathode of the PIN diode D1-2 and then grounded through a 5 th resistor R5, and a node of the connection of the cathode of the PIN diode D1-1 and the cathode of the PIN diode D1-2 is an input end of a downlink attenuation circuit; the cathode of the PIN diode D2-2 is connected with the cathode of the PIN diode D2-1 and then grounded through a 6 th resistor R6, and the node of the connection between the cathode of the PIN diode D2-2 and the cathode of the PIN diode D2-1 is the output end of the downlink attenuation circuit. PIN diodes D1-1 and D1-2 are PIN diodes of the model HSMP3814, and the PIN diodes are internal twin double PIN diodes. Pin diodes D2-2 and D2-1 also use a PIN diode of model HSMP3814, which is an internal twin double PIN diode.

The downstream power amplifying circuit comprises a power amplifier module U5 with the model of SKY77768 and an amplifier U4 of an SBB5089, wherein the 1 st pin of the amplifier U4 of the SBB5089 is an input end of the downstream power amplifying circuit, the 4 th pin of the amplifier U4 of the SBB5089 is grounded, the 3 rd pin of the amplifier U4 of the SBB5089 is connected with the 2 nd pin of the power amplifier module U5 through an attenuation network, the 3 rd pin of the amplifier U4 of the SBB5089 is connected with the input end of the attenuation network through a 22 nd capacitor C22, and the output end of the attenuation network is connected with the 2 nd pin of the power amplifier module U5 through a 23 rd capacitor C23. The 3 rd pin of the amplifier U4 of the SBB5089 is connected with one end of the 3 rd inductor L3, the other end of the 3 rd inductor L3 is respectively connected with one end of a 35 rd capacitor C35 and one end of a 17 th resistor R17, the other end of the 35 rd capacitor C35 is connected with the 2 nd pin of the amplifier U4 of the SBB5089 and grounded, the 36 rd capacitor C36 is connected in parallel with the two ends of the 35 th capacitor C35, the other end of the 17 th resistor R17 is connected with a 5V power supply, the other end of the 17 th resistor R17 is connected with the 5V power supply through a 7 th inductor L7, the other end of the 17 th resistor R17 is grounded through a 38 th capacitor C38, and the two ends of the 38 th capacitor C38 are connected with a 42 th capacitor C42 in parallel; the 1 st pin and the 10 th pin of the power amplifier module U5 are connected with a 3.3V power supply, the 1 st pin and the 10 th pin of the power amplifier module U5 are connected and grounded through a 12 th capacitor C12, the two ends of the 12 th capacitor C12 are connected with a 13 th capacitor C13, a 14 th capacitor C14, a 15 th capacitor C15 and a 16 th capacitor C16 in parallel, the 9 th pin of the power amplifier module U5 is an output end of a downlink power amplifier circuit, the 8 th pin of the power amplifier module U5 is grounded through a 12 th resistor R12, the 7 th pin and the 11 th pin of the power amplifier module U5 are grounded, the 5 th pin of the power amplifier module U5 is respectively connected with one end of a 13 th resistor R13, an 18 th resistor R18 and one end of a 24 th capacitor C24, the other end of the 13 th resistor R13 is connected with the 3.3V power supply, and the other end of the 18 th resistor R18 and the other end of the 24 th capacitor C24 are grounded; the downlink detection circuit comprises a Schottky diode D3, the anode of the Schottky diode D3 is respectively connected with one ends of a 5 th inductor L5 and a 37 th capacitor C37, the other end of the 5 th inductor L5 is grounded, the other end of the 37 th capacitor C37 is connected with a 6 th pin of a power amplifier module U5, the cathode of the Schottky diode D3 is connected with an MCU, the cathode of the Schottky diode D3 is respectively connected with one ends of a 39 th capacitor C39 and a 22 th resistor R22, the other ends of the 39 th capacitor C39 and the 22 th resistor R22 are grounded, and the two ends of the 39 th capacitor C39 are connected with a 40 th capacitor C40 in parallel.

The upstream pre-amplifying and filtering circuit comprises a high gain HEMT amplifying element U9, wherein the grid electrode of the high gain HEMT amplifying element U9 is connected with a second radio frequency switch, the two source electrodes of the high gain HEMT amplifying element U9 are grounded, the grid electrode of the high gain HEMT amplifying element U9 is connected with one end of a 15 th inductor L15, the other end of the 15 th inductor L15 is respectively connected with one end of a 54 th capacitor C54 and one end of a 27 th capacitor R27, the other end of the 54 th capacitor C54 is grounded, the two ends of the 54 th capacitor C54 are connected with a 55 th capacitor C55 in parallel, the other end of the 27 th resistor R27 is respectively connected with one ends of a 30 th resistor R30 and a 26 th resistor R26, the other end of the 26 th resistor R26 is grounded, the other end of the 30 th resistor R30 is respectively connected with one ends of a 36 th resistor R36, a 35 th resistor R35 and a 71 th capacitor C71, the other end of the 71 th capacitor C71 is grounded, the other end of the 35 th resistor R35 is connected with a 5V power supply (the other end of the 35 th resistor R35 is connected with the 5V power supply through a 12 th inductor L12), the other end of the 35 th resistor R35 is grounded through a 69 th capacitor C69, the two ends of the 69 th capacitor C69 are connected with a 70 th capacitor C70 in parallel, the other end of the 36 th resistor R36 is respectively connected with one ends of a 72 th capacitor C72 and an 18 th inductor L18, the other end of the 72 th capacitor C72 is grounded, the other end of the 18 th inductor L18 is respectively connected with the drain electrode of a high-gain HEMT amplifying element U9 and one end of a 42 th resistor R42, the other end of the 42 th resistor R42 is connected with one end of an 81 th capacitor C81, the other end of the 81 th capacitor C81 is connected with an attenuation network, the output end of the attenuation network is connected with a first-stage uplink filter circuit, the output end of the first-stage uplink filter circuit is used for being connected with an uplink attenuation circuit, the first stage of upstream filtering circuit adopts a sixth acoustic surface filter F6. The output end of the first stage of uplink filter circuit is connected with the input end of the uplink attenuation circuit through an 80 th capacitor C80.

The damping network adopts a pi-type damping network composed of a 47 th resistor R47, a 41 st resistor R41 and a 48 th resistor R48. The input end of the pi-type attenuation network is respectively connected with one end of a 48 th resistor R48 and one end of a 41 st resistor R41, the other end of the 48 th resistor R48 is grounded, the other end of the 41 st resistor R41 is respectively connected with the output end of the pi-type attenuation network and one end of a 47 th resistor R47, and the other end of the 47 th resistor R47 is grounded.

The uplink attenuation circuit comprises a PIN diode D5-1, a PIN diode D5-2, a PIN diode D6-1 and a PIN diode D6-2, wherein the anode of the PIN diode D5-1 is grounded through a 60 th capacitor C60, the anode of the PIN diode D6-1 is grounded through a 61 st capacitor C61, the anode of the PIN diode D5-1 is connected with one end of a 28 th resistor R28 through a 31 st resistor R31, the anode of the PIN diode D6-1 is connected with one end of the 28 th resistor R28 through a 32 nd resistor R32, the other end of the 28 th resistor R28 is connected with a 5V power supply, the other end of the 28 th resistor R28 is connected with the 5V power supply through a 12 th inductor L12, and the other end of the 28 th resistor R28 is grounded through a 56 th capacitor C56; the anode of the PIN diode D5-2 is connected with the anode of the PIN diode D6-2, then is connected with one end of the 13 th inductor L13, the other end of the 13 th inductor L13 is connected with the MCU, the other end of the 13 th inductor L13 is grounded through the 52 th capacitor C52, and the 53 rd capacitor C53 is connected in parallel with the two ends of the 52 th capacitor C52; the cathode of the PIN diode D5-1 is connected with the cathode of the PIN diode D5-2 and then grounded through a 45 th resistor R45, and a node of the connection of the cathode of the PIN diode D5-1 and the cathode of the PIN diode D5-2 is an input end of an uplink attenuation circuit; the cathode of the PIN diode D6-1 is connected with the cathode of the PIN diode D6-2 and then grounded through a 46 th resistor R46, and a node of the connection of the cathode of the PIN diode D6-1 and the cathode of the PIN diode D6-2 is an output end of the uplink attenuation circuit. PIN diodes D5-1 and D5-2 are PIN diodes of the model HSMP3814, and the PIN diodes are internal twin double PIN diodes. Pin diodes D6-1 and D6-2 also use a PIN diode of model HSMP3814, which is an internal twin double PIN diode.

The uplink power amplifying circuit comprises a power amplifier module U10 with the model of SKY77768 and an amplifier U11 of an SBB5089, wherein the 1 st pin of the amplifier U11 of the SBB5089 is an input end of the uplink power amplifying circuit, the 4 th pin of the amplifier U11 of the SBB5089 is grounded, the 3 rd pin of the amplifier U11 of the SBB5089 is connected with the 2 nd pin of the power amplifier module U10 through an attenuation network, the 3 rd pin of the amplifier U11 of the SBB5089 is connected with the input end of the attenuation network through a 75 th capacitor C75, and the output end of the attenuation network is connected with the 2 nd pin of the power amplifier module U10 through a 74 th capacitor C74. The 3 rd pin of the amplifier U11 of the SBB5089 is connected with one end of the 16 th inductor L16, the other end of the 16 th inductor L16 is respectively connected with one end of a 65 th capacitor C65 and one end of a 38 th resistor R38, the other end of the 65 th capacitor C65 is connected with the 2 nd pin of the amplifier U11 of the SBB5089 and grounded, the 66 th capacitor C66 is connected in parallel with the two ends of the 65 th capacitor C65, the other end of the 38 th resistor R38 is connected with a 5V power supply, the other end of the 38 th resistor R38 is connected with the 5V power supply through the 12 th inductor L12, the other end of the 38 th resistor R38 is grounded through the 51 th capacitor C51, and the 57 th capacitor C57 is connected in parallel with the two ends of the 51 th capacitor C51; the 1 st pin and the 10 th pin of the power amplifier module U10 are connected and then are connected with a 3.3V power supply, the 1 st pin and the 10 th pin of the power amplifier module U10 are connected and then are grounded through an 82 nd capacitor C82, two ends of the 82 nd capacitor C82 are connected with an 83 rd capacitor C83, an 84 th capacitor C84, an 85 th capacitor C85 and an 86 th capacitor C86 in parallel, the 9 th pin of the power amplifier module U10 is an output end of an uplink power amplifier circuit, the 8 th pin of the power amplifier module U10 is grounded through an 39 th resistor R39, the 7 th pin and the 11 th pin of the power amplifier module U10 are grounded, the 5 th pin of the power amplifier module U10 is respectively connected with one end of a 37 th resistor R37, a 33 th resistor R33 and a 73 rd capacitor C73, the other end of the 37 th resistor R37 is connected with the 3.3V power supply, and the other end of the 33 th resistor R33 and the other end of the 73 th capacitor C73 are grounded; the uplink detection circuit comprises a Schottky diode D4, the anode of the Schottky diode D4 is respectively connected with one ends of a 14 th inductor L14 and a 64 th capacitor C64, the other end of the 14 th inductor L14 is grounded, the other end of the 64 th capacitor C64 is connected with a 6 th pin of the power amplifier module U10, the cathode of the Schottky diode D4 is connected with an MCU, the cathode of the Schottky diode D4 is respectively connected with one ends of a 58 th capacitor C58 and a 29 th resistor R29, the other ends of the 58 th capacitor C58 and the 29 th resistor R29 are grounded, and the 59 th capacitor C59 is connected in parallel with two ends of the 58 th capacitor C58.

The damping network adopts pi-type damping network composed of a 40 th resistor R40, a 43 rd resistor R43 and a 44 th resistor R44.

And a second stage of uplink filter circuit is arranged between the uplink attenuation circuit and the uplink power amplification circuit. The output end of the uplink attenuation circuit is connected with the input end of the second stage uplink filter circuit through a 79 th capacitor C79. The second stage upstream filtering circuit adopts a fifth acoustic surface filter F5 and a fourth acoustic surface filter F4, and an amplifying circuit is arranged between the fifth acoustic surface filter F5 and the fourth acoustic surface filter F4. The output of the fifth acoustic surface filter F5 is connected to the input of the amplifying circuit via a 78 th capacitor C78. The output of the amplifying circuit is connected to the input of the fourth acoustic surface filter F4 via a 77 th capacitor C77. The output end of the fourth acoustic surface filter F4 is connected with the input end of the uplink power amplifying circuit through a 76 th capacitor C76. The amplifying circuit comprises an amplifier U12 with the model of SBB5089, wherein the 1 st pin of the amplifier U12 of the SBB5089 is connected with the output end of a fifth acoustic surface filter F5, the 4 th pin of the amplifier U12 of the SBB5089 is grounded, the 3 rd pin of the amplifier U12 of the SBB5089 is connected with the input end of a fourth acoustic surface filter F4, the 3 rd pin of the amplifier U12 of the SBB5089 is connected with one end of a 17 th inductor L17, the other end of the 17 th inductor L17 is respectively connected with a 67 th capacitor C67 and one end of a 34 th resistor R34, the other end of the 67 th capacitor C67 is connected with the 2 nd pin of the amplifier U12 of the SBB5089 and grounded, the two ends of the 67 th capacitor C67 are connected with 68 th capacitor C68 in parallel, the other end of the 34 th resistor R34 is connected with a 5V power supply, the other end of the 34 th resistor R34 is connected with the 5V power supply through the 12 th inductor L12, the other end of the 34 th resistor R34 is grounded through a 62 th capacitor C62, and the two ends of the 62 th capacitor C62 is connected with a 63 in parallel. The SBB5089 active bias network provides stable over-current protection and dc operating points.

The working principle of the invention is analyzed: the GSM communication signals are divided into an uplink path and a downlink path, and are respectively responsible for signals sent to the base station by the GPRS module and signals sent to the GPRS module by the base station. The uplink central frequency is 902MHz, and the downlink central frequency is 947MHz. It is also respectively responsible for the two different amplifying circuits inside the amplifier. The space signal is sensed by the antenna to the input interface of the amplifier, and the sensed base station signal is sent to the downlink amplifying circuit through a selection switch. The invention is aimed at GPRS communication, adopts acoustic surface double-function change-over switch, i.e. a duplexer, which is a two-port network with selectivity to frequency, can make bandwidth selection, and is used for separating or combining signals with different frequencies, and mainly has the function of inhibiting unwanted signals, and making useful signals pass through filter. The signals fed by the antenna are selectively switched, only 947MHz frequency can be passed between the antenna and the downlink amplifier, but only 902MHz frequency can be passed between the uplink signal and the antenna, and the two signals can not be switched in a time-sharing way.

The downlink signal selected by the change-over switch enters the downlink pre-amplifying and filtering circuit. The pre-amplifying and filtering circuits mainly have two functions, namely, the pre-amplifying and filtering circuits compensate the insertion loss of the acoustic surface filter, and the noise mixed in the weak electric wave received by the antenna is sent to the next stage without amplification. The pre-amplifying and filtering circuit has good noise figure. The noise figure of the amplifying circuit is the ratio of the input signal S/N to the output signal S/N. If an amplifier with a noise figure difference is used, noise generated inside the amplifier is mixed into the signal, and the input signal cannot be extracted from the noise. And the smaller the noise figure of the amplifying circuit is, the larger the gain is, and the smaller the noise influence generated by the later-stage circuit is. The ATF54143 adopted by the pre-amplifying and filtering circuit is a high-gain HEMT amplifying element with extremely low noise, the circuit is composed of only two main parts, one is a bias circuit, a direct current working point is provided for the device, and the other is power supply. A fixed attenuation network is added at the output part of the amplifying circuit, and the gain of the amplifying circuit is exactly equal to the insertion loss of the antenna change-over switch and the back acoustic surface filter of the amplifying circuit by adjusting the parameters of the network.

The downstream signal after the pre-amplifying and filtering circuit is further sent to the downstream amplifier, and the downstream amplifier adopts an integrated circuit element SBB5089 with fixed gain, wherein SBB-5089 is a high-performance InGaPHBTMMIC, which is a Darlington configuration amplifier with an active bias network. The active bias network provides stable over-current protection and a DC operating point, can work well under 5V power, does not need a bias circuit compared with other amplifiers, and has better in-band gain flatness. The device is provided with an internal matching network, and the matching impedance is 50 ohms, so that the external matching network is not required to be designed for matching when a circuit is designed, and the purpose of simplest design is achieved. The amplified signal is sent to a voltage-controlled attenuator circuit by SBB5089, which is a voltage-controlled attenuator circuit composed of PIN diodes, the PIN diodes mainly work in reverse bias state, and when negative voltage is applied (or zero bias, the PIN diodes are equivalent to capacitance and resistance; the invention uses the bias characteristics of the PIN diodes to design the voltage-controlled attenuation circuit, and can use three diodes to replace fixed resistance in the circuit and construct a variable attenuator relative to the fixed attenuation circuit, but this can lead to asymmetry in the network, resulting in a rather complex bias network. When PIN diodes are used as attenuation elements, the PIN diodes have higher linearity than equivalent GaAsMESFETs, and signal distortion is minimized by using a plurality of PIN diodes with thick I layers and low dielectric relaxation frequencies. Since the two diodes are in anti-series, some distortion or distortion produced by the RF modulated capacitance can be suppressed. Since the two anti-series diodes of the package have characteristics that are perfectly matched to each other, an optimal distortion suppression capability can be obtained. Fig. 4 is a simulation result of a voltage controlled attenuator. The minimum attenuation degree of the attenuation circuit is simulated in ADS simulation software, and the result is shown in fig. 5. The minimum delta attenuation is-2.3 db, with the PIN diode at the lowest impedance of 10 ohms. The simulation results obtained when the equivalent impedance of the PIN diode reached a maximum of 1500 ohms are shown in fig. 6. As can be seen from FIG. 6, the maximum attenuation is-31 db. The magnitude of this attenuation is linear with the bias voltage, so the gain of the entire amplifying circuit can be adjusted by adjusting the bias voltage of the attenuation circuit in a phase-changing manner.

The attenuated signals are subjected to clutter filtering through two continuous acoustic surface filters, and the out-of-band signal amplitude is reduced as much as possible. The signal then enters a power amplifying circuit. The driving amplifier and the power amplifier of the power amplifying circuit are respectively SBB5089 and SKY77768.SBB5089 is a broadband high gain amplifier with good in-band gain flatness in the 0-2GHZ band, with an average gain of 20db. The SKY77768 is a special power amplifier for the mobile phone, has good amplifying performance, has a power detection function, can detect the output power, and provides a reference for the work of the voltage-controlled attenuator. The SKY77768 power amplifier module is a special surface mount module developed for wideband code division multiple access applications. SKY77768 provides mainly two functions in this project, one is a power amplifying function, which amplifies an uplink or downlink signal to an ideal power value. And secondly, a power detection function provides a reference for automatic gain control for the whole uplink or downlink signal. The output power signal is realized by a directional coupler, so a set of high-frequency power detection circuit is additionally arranged to convert the high-frequency signal into a direct-current level. The power detection circuit is realized by a schottky diode, and a diode square law detection circuit is adopted because the signal amplitude is small, and the circuit mainly detects by a nonlinear square term of the diode when the signal is small, and the higher order term is very small and can be ignored, so the circuit is also called as a small signal square law detector. The dc level output from the detector circuit is the current power output by the power amplifier, and the voltage is higher as the power is larger.

The upstream pre-amplifying and filtering circuit has similar element selection and circuit form as downstream, except that the filtering circuit is arranged and the filters are selected, and since the working center frequency of the upstream circuit is 902MHz, all the acoustic surface filters in the upstream circuit adopt 902 MHz.

In the downlink circuit, the signal is amplified once after passing through the first stage filter, mainly because the downlink signal is weak, and in order to prevent the signal to noise ratio from being reduced after passing through the voltage-controlled attenuation circuit, a stage of amplifier is added in the middle. For the uplink signal, the signal power output by the GPRS module is larger, and the signal to noise ratio is very high, so that the signal to noise ratio is very little influenced by the fact that the signal can directly enter the voltage-controlled attenuator to be subjected to amplitude processing after the primary pre-amplification compensates for the loss of the acoustic surface.

Since the analog signal path of the GPRS module is time-division operated, the power value output by the power detector is output in the form of voltage pulses during operation. If this level is used as the basis for automatic gain control, this will necessarily lead to operational confusion, and a more sophisticated and stable fuzzy control circuit is required to solve this problem. If the functions are realized by hardware, the cost is high, the flexibility is poor, the modification caused by the need of adapting to some conditions is the change of the circuit form, and the expansion and perfection work is very unfavorable. Based on the above reasons, the invention adopts a software mode to realize the analog control in the automatic gain control part, thus various expansion functions can be conveniently made according to different applications, and even an adaptive system capable of automatically modifying parameters according to application environments can be made. By contrast, we select a single-chip microcomputer of STM32F303 series, wherein the STM32F303CCX model has two paths of synchronous 12-bit ADCs and two paths of 12-bit DACs. Meanwhile, the kernel contains the FPU, is suitable for high-intensity floating point operation, and can completely meet the requirement of the project, and the full-speed main frequency can reach 72 MHz. The uplink power detection signal and the downlink power detection signal are respectively sent to two paths of ADC of the singlechip, and the two paths of DAC of the singlechip are respectively connected to the voltage control end of the voltage-controlled attenuation circuit.

By reasonably designing coefficients in the PID algorithm, a targeted gain compensation program can be obtained, the output of the automatic gain control part can be stable in output power, deviation is automatically compensated along with the change of environment, and the normal operation of the system is realized.

The working flow of the invention is as follows:

the downlink signal is induced by an antenna to obtain a weak voltage signal, and the signal is subjected to high-pass filtering by a lightning protection module, and useless signals and direct current levels lower than a useful frequency band are filtered out and then enter a radio frequency switch. The RF switch is connected with the pre-amplifier, and filters the potentially useful signal through the first filter after amplifying the potentially useful signal, and the filter is a downlink band-pass acoustic surface filter with a very steep attenuation rate, so that most of the useless signal can be filtered out, the useful signal is sent into the voltage-controlled attenuator for attenuation, and the attenuation amplitude is determined by the MCU according to the output amplitude of the rear power amplifier. The signal passing through the attenuator enters the downlink sound surface filter again to filter the useless signal and then enters the power amplifier to carry out power amplification, and the power output by the power amplifier is equal to the upper limit of the amplitude of the signal received by the GPRS data transmission module. The detector is responsible for converting the amplitude of the high-frequency power signal into a direct current level so as to facilitate the acquisition of the MCU.

When the GPRS data transmission module transmits an uplink signal, the signal is filtered by the uplink signal sound surface filter and then is sent to the pre-amplifier, the main purpose of the pre-amplifier is to make up for the defect of large in-band loss of the sound surface filter, the signal passing through the pre-amplifier enters the voltage-controlled attenuator for attenuation, the size of the attenuation is determined by the power obtained by the rear-end detector, and the power is the upper limit of the power allowed by the base station. The attenuated signals enter a power amplifier through an uplink filter and then are sent to a space through a lightning arrester and an antenna.

In the whole working process, the MCU is responsible for monitoring the uplink signal intensity, starting the uplink signal, displaying the downlink signal intensity and the downlink signal intensity, and the like.

The above description is only of the preferred embodiments of the present invention and is not intended to limit the invention, and it will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit and scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims

1. The utility model provides a GPRS acquisition terminal signal strength self-adaptation data test and transmission device, includes uplink and downlink, its characterized in that: the downlink is a downlink pre-amplification circuit, a filtering circuit, a downlink attenuation circuit and a downlink power amplification circuit which are sequentially connected, and the uplink is an uplink pre-amplification circuit, a filtering circuit, an uplink attenuation circuit and an uplink power amplifier which are sequentially connected; the input end of the downlink pre-amplification and filtering circuit and the output end of the uplink power amplifier are connected with the first radio frequency switch, and the input end of the uplink pre-amplification and filtering circuit and the output end of the downlink power amplifier circuit are connected with the second radio frequency switch; a downlink detection circuit is arranged between the MCU and the downlink power amplifying circuit and is used for detecting the output power of the downlink power amplifying circuit and transmitting the detected output power of the downlink power amplifying circuit to the MCU, the MCU is used for receiving the output power of the downlink power amplifying circuit, comparing the output power of the downlink power amplifying circuit with a set value, outputting a control signal to a downlink attenuation circuit and controlling the attenuation amount of the downlink attenuation circuit, thereby controlling the output power of the downlink power amplifying circuit; an uplink detection circuit is arranged between the MCU and the uplink power amplifying circuit and is used for detecting the output power of the uplink power amplifying circuit and transmitting the detected output power of the uplink power amplifying circuit to the MCU; the MCU is used for receiving the output power of the uplink power amplifying circuit, comparing the output power of the uplink power amplifying circuit with a set value, outputting a control signal to the uplink attenuation circuit, and controlling the attenuation of the uplink attenuation circuit, thereby controlling the output power of the uplink power amplifying circuit;

The uplink attenuation circuit and the downlink attenuation circuit have the same circuit structure, the downlink attenuation circuit comprises a PIN diode D1-1, a PIN diode D1-2, a PIN diode D2-1 and a PIN diode D2-2, the anode of the PIN diode D1-1 is grounded through a 25 th capacitor C25, the anode of the PIN diode D2-2 is grounded through a 26 th capacitor C26, the anode of the PIN diode D1-1 is connected with one end of a 23 th resistor R23 through a 19 th resistor R19, the anode of the PIN diode D2-2 is connected with one end of the 23 th resistor R23 through a 20 th resistor R20, the other end of the 23 rd resistor R23 is connected with a 5V power supply, the other end of the 23 rd resistor R23 is connected with the 5V power supply through a 7 th inductor L7, and the other end of the 23 th resistor R23 is grounded through a 41 th capacitor C41; the anode of the PIN diode D1-2 is connected with the anode of the PIN diode D2-1 and then is connected with one end of a 6 th inductor L6, the other end of the 6 th inductor L6 is connected with the MCU, the other end of the 6 th inductor L6 is grounded through a 45 th capacitor C45, and the two ends of the 45 th capacitor C45 are connected with a 46 th capacitor C46 in parallel; the cathode of the PIN diode D1-1 is connected with the cathode of the PIN diode D1-2 and then grounded through a 5 th resistor R5, and a node of the connection of the cathode of the PIN diode D1-1 and the cathode of the PIN diode D1-2 is an input end of a downlink attenuation circuit; the cathode of the PIN diode D2-2 is connected with the cathode of the PIN diode D2-1 and then grounded through a 6 th resistor R6, and the node of the connection between the cathode of the PIN diode D2-2 and the cathode of the PIN diode D2-1 is the output end of the downlink attenuation circuit.

2. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 1, wherein: the up-going pre-amplifying and filtering circuit and the down-going pre-amplifying and filtering circuit have the same circuit structure, the down-going pre-amplifying and filtering circuit comprises a high-gain HEMT amplifying element U6, the grid electrode of the high-gain HEMT amplifying element U6 is connected with a first radio frequency switch, the two source electrodes of the high-gain HEMT amplifying element U6 are grounded, the grid electrode of the high-gain HEMT amplifying element U6 is connected with one end of a 4 th inductor L4, the other end of the 4 th inductor L4 is respectively connected with one end of a 43 th capacitor C43 and one end of a 24 th resistor R24, the other end of the 43 th capacitor C43 is grounded, the two ends of the 43 th capacitor C43 are connected with a 44 th capacitor C44 in parallel, the other end of the 24 th resistor R24 is respectively connected with one ends of a 21 st resistor R21 and a 25 th resistor R25, the other end of the 25 th resistor R25 is grounded, the other end of the 21 st resistor R21 is respectively connected with one ends of a 14 th resistor R14, a 15 th resistor R15 and a 28 th capacitor C28, the other end of the 28 th capacitor C28 is grounded, the other end of the 15 th resistor R15 is connected with a 5V power supply (the other end of the 15 th resistor R15 is connected with the 5V power supply through a 7 th inductor L7, the other end of the 15 th resistor R15 is grounded through a 29 th capacitor C29, two ends of the 29 th capacitor C29 are connected with a 30 th capacitor C30 in parallel, the other end of the 14 th resistor R14 is respectively connected with one ends of a 27 th capacitor C27 and a 1 st inductor L1, the other end of the 27 th capacitor C27 is grounded, the other end of the 1 st inductor L1 is respectively connected with the drain electrode of a high gain HEMT amplifying element U6 and one end of a 9 th resistor R9, the other end of the 9 th resistor R9 is connected with one end of a 17 th capacitor C17, the other end of the 17 th capacitor C17 is connected with an attenuation network, the output end of the attenuation network is connected with a first-stage downlink filter circuit, the output end of the first-stage downlink filter circuit is used for being connected with a downlink attenuation circuit, and the first-stage downlink filter circuit adopts a first acoustic surface filter F1.

3. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 2, wherein: an amplifying circuit is arranged between the output end of the first-stage downlink filter circuit and the input end of the downlink attenuation circuit, the amplifying circuit comprises an amplifier U3 with the model of SBB5089, the 1 st pin of the amplifier U3 of the SBB5089 is connected with the output end of the first-stage downlink filter circuit, the 4 th pin of the amplifier U3 of the SBB5089 is grounded, the 3 rd pin of the amplifier U3 of the SBB5089 is connected with the input end of the downlink attenuation circuit, the 3 rd pin of the amplifier U3 of the SBB5089 is connected with one end of a 2 nd inductor L2, the other end of the 2 nd inductor L2 is respectively connected with one end of a 31 st capacitor C31 and one end of a 16 th resistor R16, the other end of the 31 st capacitor C31 is connected with the 2 nd pin of the amplifier U3 of the SBB5089 in parallel, the two ends of the 31 st capacitor C32 are connected with a 5V power supply, the other end of the 16 th resistor R16 is connected with the 5V power supply through a 7 th inductor L7, the other end of the 16 th resistor R16 is connected with the 5V power supply through the two ends of a 33 th capacitor C33, and the two ends of the 16 th capacitor C33 are connected with the two ends of the capacitor C33 in parallel.

4. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 1, wherein: the circuit structures of the uplink power amplifying circuit and the downlink power amplifying circuit are the same; the downstream power amplifying circuit comprises a power amplifier module U5 with the model of SKY77768 and an amplifier U4 of an SBB5089, wherein the 1 st pin of the amplifier U4 of the SBB5089 is an input end of the downstream power amplifying circuit, the 4 th pin of the amplifier U4 of the SBB5089 is grounded, the 3 rd pin of the amplifier U4 of the SBB5089 is connected with the 2 nd pin of the power amplifier module U5 through an attenuation network, the 3 rd pin of the amplifier U4 of the SBB5089 is connected with one end of a 3 rd inductor L3, the other end of the 3 rd inductor L3 is respectively connected with a 35 th capacitor C35 and one end of a 17 th resistor R17, the other end of the 35 th capacitor C35 is connected with the 2 nd pin of the amplifier U4 of the SBB5089 in parallel, two ends of the 35 th capacitor C35 are connected with a 36 th capacitor C36, the other end of the 17 th resistor R17 is connected with a 5V power supply through a 7 th inductor L7 and a 5V power supply, the other end of the 17 th resistor R17 is connected with the 5V power supply through the two ends of the capacitor C38 and the two ends of the 17 th capacitor C38 are connected with the capacitor C42 in parallel; the 1 st pin and the 10 th pin of the power amplifier module U5 are connected with a 3.3V power supply, the 1 st pin and the 10 th pin of the power amplifier module U5 are connected and grounded through a 12 th capacitor C12, the two ends of the 12 th capacitor C12 are connected with a 13 th capacitor C13, a 14 th capacitor C14, a 15 th capacitor C15 and a 16 th capacitor C16 in parallel, the 9 th pin of the power amplifier module U5 is an output end of a downlink power amplifier circuit, the 8 th pin of the power amplifier module U5 is grounded through a 12 th resistor R12, the 7 th pin and the 11 th pin of the power amplifier module U5 are grounded, the 5 th pin of the power amplifier module U5 is respectively connected with one end of a 13 th resistor R13, an 18 th resistor R18 and one end of a 24 th capacitor C24, the other end of the 13 th resistor R13 is connected with the 3.3V power supply, and the other end of the 18 th resistor R18 and the other end of the 24 th capacitor C24 are grounded; the downlink detection circuit comprises a Schottky diode D3, the anode of the Schottky diode D3 is respectively connected with one ends of a 5 th inductor L5 and a 37 th capacitor C37, the other end of the 5 th inductor L5 is grounded, the other end of the 37 th capacitor C37 is connected with a 6 th pin of a power amplifier module U5, the cathode of the Schottky diode D3 is connected with an MCU, the cathode of the Schottky diode D3 is respectively connected with one ends of a 39 th capacitor C39 and a 22 th resistor R22, the other ends of the 39 th capacitor C39 and the 22 th resistor R22 are grounded, and the two ends of the 39 th capacitor C39 are connected with a 40 th capacitor C40 in parallel.

5. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 1, wherein: a second-stage downlink filter circuit is arranged between the downlink attenuation circuit and the downlink power amplification circuit, and the second-stage downlink filter circuit adopts a second sound surface filter F2 and a third sound surface filter F3 which are connected in series.

6. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 1, wherein: the second stage uplink filter circuit is arranged between the uplink attenuation circuit and the uplink power amplifying circuit, the second stage uplink filter circuit adopts a fifth acoustic surface filter F5 and a fourth acoustic surface filter F4, an amplifying circuit is arranged between the fifth acoustic surface filter F5 and the fourth acoustic surface filter F4, the amplifying circuit comprises an amplifier U12 with the model of SBB5089, the 1 st pin of the amplifier U12 of the SBB5089 is connected with the output end of the fifth acoustic surface filter F5, the 4 rd pin of the amplifier U12 of the SBB5089 is grounded, the 3 rd pin of the amplifier U12 of the SBB5089 is connected with the input end of the fourth acoustic surface filter F4, the 3 rd pin of the amplifier U12 of the SBB5089 is connected with one end of a 17 th inductor L17, the other end of the 17 th inductor L17 is respectively connected with one end of a 67 th capacitor C67 and one end of a 34 resistor R34, the other end of the 67C 67 capacitor C67 is connected with the 2 pin of the amplifier U12 of the SBB5089 in parallel with the end of the power supply C62, the other end of the second capacitor C62V 67 is connected with the other end of the power supply 34C 62V 62 through the end of the capacitor C67 of the capacitor C12 of the SBB5089, and the other end of the power supply 34C 62 is connected with the other end of the power supply 34 in parallel connection with the end of the capacitor C62V 62C 62.

7. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 1, wherein: the first radio frequency switch and the second radio frequency switch are both acoustic meter diplexers, and the acoustic meter diplexers are SD902AP2 in model.

8. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 1, wherein: the MCU is connected with a display for displaying the intensity of the received signal.