CN107743039B - A GPRS acquisition terminal signal strength adaptive data testing and transmission device - Google Patents

Abstract

The GPRS acquisition terminal signal strength self-adaptive data testing and transmitting device comprises an uplink, a downlink and an MCU, wherein the downlink is a downlink pre-amplification circuit, a filtering circuit, a downlink attenuation circuit and a downlink power amplification circuit which are sequentially connected, and the uplink is an uplink pre-amplification circuit, a filtering circuit, an uplink attenuation circuit and an uplink power amplifier which are sequentially connected; the input end of the downlink pre-amplification and filtering circuit and the output end of the uplink power amplifier are connected with the first radio frequency switch, and the input end of the uplink pre-amplification and filtering circuit and the output end of the downlink power amplifier circuit are connected with the second radio frequency switch; and a lower and an upper detection circuits are arranged between the MCU and the lower and the upper power amplifying circuits, and the MCU controls the attenuation of the lower and the upper attenuation circuits and controls the output power of the lower and the upper power amplifying circuits according to the output power of the lower and the upper power amplifying circuits. It has automatic gain control function, and can make bandwidth selection.

Description

A GPRS acquisition terminal signal strength adaptive data testing and transmission device

technical field

The invention relates to the technical field of GPRS wireless data transmission, in particular to a GPRS acquisition terminal signal strength adaptive data testing and transmission device.

Background technique

With the popularization of the application of wireless communication technology, more and more data communication is realized by wireless means, among which GPRS wireless data transmission technology has become the most widely used in power system data acquisition applications. For a long time, developers of GPRS data transmission modules have focused on the error correction capability and stability of the signal link, and have done little work on the analog signal transmission part.

After a long-term practical application summary, there are still some deficiencies that need to be made up for the application of GPRS wireless data transmission modules in complex industrial environments, which are listed as follows: GPRS terminals may have extremely strong or weak signals due to the installation environment. Situation: Wireless signal transmission relay problem in basement or shielded environment; signal quality problem in remote areas; signal near base station is too strong, causing circuit blockage.

In response to the above problems, the applicant conceived a set of overall solutions. In this system, the problems of wireless signal relay in shielded environments and signal quality in remote areas are solved by a set of dedicated amplifiers with gain control and bandwidth selection. .

Aiming at the GPRS signal amplifier, there are many products on the market at present, and the principle is the same. The signal received by the antenna and the signal sent by the GPRS module are time-sharingly processed and amplified separately, but this type of amplifier has fatal shortcomings. , that is, the gain is fixed, and the blind pursuit of output power has caused problems in many areas that interfere with the normal operation of the base station. In fact, each wireless communication device has its own signal strength threshold, below which the signal quality will decrease and the signal-to-noise ratio will decrease. Above this threshold will cause the preamplifier to saturate, and the signal will be severely distorted and blocked, causing the signal of other equipment to be masked.

Contents of the invention

The purpose of the present invention is to provide a GPRS acquisition terminal signal strength adaptive data testing and transmission device for the corresponding deficiencies in the prior art, which is a kind of self-adaptive GPRS wireless data transmission under the condition of extreme signal strength In this system, the problem of extremely strong or weak signals is solved by a set of dedicated amplifiers for adaptive GPRS wireless data transmission with gain control and bandwidth selection. It has an automatic gain control function, and the output signal Control in a reasonable range, so that the signal strength received by the base station is within the allowable range, and at the same time adjust the gain of the amplifier at the receiving end according to the strength of the received signal, so that the signal amplitude entering the GPRS module is in the best state, and The invention can select the bandwidth, and the cost is also low.

The purpose of the present invention is to adopt following scheme to realize: a kind of GPRS acquisition terminal signal strength self-adaptive data testing and transmission device, comprise uplink and downlink, also comprise MCU, described downlink is sequentially connected Downlink preamplifier, filter circuit, downlink attenuation circuit, and downlink power amplifier circuit, the uplink is an uplink preamplifier, filter circuit, uplink attenuation circuit, and uplink power amplifier connected in sequence; the downlink preamplifier, filter The input end of the circuit and the output end of the uplink power amplifier are all connected to the first radio frequency switch, the input end of the uplink preamplifier, the filter circuit, and the output end of the downlink power amplifier circuit are all connected to the second radio frequency switch; the MCU A downlink detection circuit is provided between the downlink power amplifying circuit, and the downlink detecting circuit is used to detect the output power of the downlink power amplifying circuit, and convert the detected output power of the downlink power amplifying circuit into a DC level and transmit it to the MCU. The MCU is used to receive the output power of the downlink power amplifying circuit, compare the output power of the downlink power amplifying circuit with the set value (or set range), and output a control signal to the downlink attenuation circuit to control the attenuation of the downlink attenuation circuit (attenuation range, thereby controlling the output power of the downlink power amplifying circuit, so that the output power of the downlink power amplifying circuit is equal to the set value or approximately equal to the set value; an uplink detection circuit is arranged between the MCU and the uplink power amplifying circuit , the uplink detection circuit is used to detect the output power of the uplink power amplifying circuit, and converts the detected output power of the uplink power amplifying circuit into a DC level and transmits it to the MCU; the MCU is used to receive the output power of the uplink power amplifying circuit , and compare the output power of the uplink power amplifier circuit with the set value, and output a control signal to the uplink attenuation circuit to control the attenuation of the uplink attenuation circuit (attenuation range, thereby controlling the output power of the uplink power amplifier circuit, so that the uplink The output power of the power amplifying circuit is equal to or approximately equal to the set value.

The circuit structure of the uplink preamplifier and filter circuit is the same as that of the downlink preamplifier and filter circuit. The downlink preamplifier and filter circuit include a high-gain HEMT amplifying element U6, and the gate of the high-gain HEMT amplifying element U6 is For connecting with the first radio frequency switch, both sources of the high-gain HEMT amplifying element U6 are grounded, the gate of the high-gain HEMT amplifying element U6 is connected to one end of the fourth inductance L4, and the fourth inductance The other end of L4 is respectively connected to one end of the 43rd capacitor C43 and the 24th resistor R24, the other end of the 43rd capacitor C43 is grounded, the two ends of the 43rd capacitor C43 are connected in parallel with the 44th capacitor C44, the 24th resistor R24 The other end is respectively connected to one end of the 21st resistor R21 and the 25th resistor R25, the other end of the 25th resistor R25 is grounded, and the other end of the 21st resistor R21 is respectively connected to the 14th resistor R14, the 15th resistor R15, the One end of the 28th capacitor C28 is connected, the other end of the 28th capacitor C28 is grounded, the other end of the 15th resistor R15 is connected to the 5V power supply (the other end of the 15th resistor R15 is connected to the 5V power supply through the 7th inductance L7), The other end of the 15th resistor R15 is grounded through the 29th capacitor C29, the 30th capacitor C30 is connected in parallel to the two ends of the 29th capacitor C29, and the other end of the 14th resistor R14 is respectively connected to the 27th capacitor C27 and the first inductor L1 One end of the 27th capacitor C27 is connected to the ground, the other end of the first inductor L1 is respectively connected to the drain of the high-gain HEMT amplifying element U6, and one end of the ninth resistor R9, and the other end of the ninth resistor R9 is connected to the One end of the 17th capacitor C17 is connected, and the other end of the 17th capacitor C17 is connected to an attenuation network. The attenuation circuit is connected, and the first stage downlink filter circuit adopts the first surface acoustic filter F1.

The attenuation network is a π-type attenuation network composed of the third resistor R3, the tenth resistor R10, and the fourth resistor R4. The input ends of the π-type attenuation network are respectively connected to one end of the third resistor R3 and the tenth resistor R10, the other end of the third resistor R3 is grounded, and the other end of the tenth resistor R10 is respectively connected to the output end of the π-type attenuation network, the fourth One end of the resistor R4 is connected, and the other end of the fourth resistor R4 is grounded.

An amplifying circuit is provided between the output end of the first-stage downlink filter circuit and the input end of the downlink attenuation circuit. The output terminal of the filter circuit is connected, the 4th pin of the amplifier U3 of SBB5089 is grounded, the 3rd pin of the amplifier U3 of SBB5089 is connected with the input terminal of the downlink attenuation circuit, the 3rd pin of the amplifier U3 of the SBB5089 is connected to the 2nd pin One end of the inductor L2 is connected, the other end of the second inductor L2 is respectively connected to one end of the 31st capacitor C31 and the 16th resistor R16, and the other end of the 31st capacitor C31 is connected to the second pin of the amplifier U3 of the SBB5089 and grounded. The two ends of the 31st capacitor C31 are connected in parallel with the 32nd capacitor C32, the other end of the 16th resistor R16 is connected to the 5V power supply, the other end of the 16th resistor R16 is connected to the 5V power supply through the 7th inductor L7, and the other end of the 16th resistor R16 is connected to the 5V power supply through the 33rd resistor R16. The capacitor C33 is grounded, and a 34th capacitor C34 is connected in parallel with both ends of the 33rd capacitor C33. The output end of the first-stage downlink filter circuit is connected to the first pin of the amplifier U3 of the SBB5089 through the eighteenth capacitor C18. The third pin of the amplifier U3 of SBB5089 is connected to the input end of the downlink attenuation circuit through the 19th capacitor C19.

The circuit structure of the uplink attenuation circuit is the same as that of the downlink attenuation circuit. The downlink attenuation circuit includes a PIN diode D1-1, a PIN diode D1-2, a PIN diode D2-2, and a PIN diode D2-1. The PIN diode D1- The anode of 1 is grounded through the 25th capacitor C25, the anode of the PIN diode D2-2 is grounded through the 26th capacitor C26, the anode of the PIN diode D1-1 is connected to one end of the 23rd resistor R23 through the 19th resistor R19, and the PIN diode D2 The anode of -2 is connected to one end of the 23rd resistor R23 through the 20th resistor R20, the other end of the 23rd resistor R23 is connected to the 5V power supply, the other end of the 23rd resistor R23 is connected to the 5V power supply through the 7th inductor L7, and the 23rd resistor The other end of R23 is grounded through the 41st capacitor C41; the anode of the PIN diode D1-2 is connected to the anode of the PIN diode D2-1 and then connected to one end of the sixth inductance L6, and the other end of the sixth inductance L6 is connected to the MCU. The other end of the 6th inductance L6 is grounded through the 45th capacitor C45, and the 46th capacitor C46 is connected in parallel with the two ends of the 45th capacitor C45; the cathode of the PIN diode D1-1 is connected to the cathode of the PIN diode D1-2 and then passed through the 5th capacitor C45. The resistor R5 is grounded, and the node where the cathode of the PIN diode D1-1 is connected to the cathode of the PIN diode D1-2 is the input end of the downlink attenuation circuit; the cathode of the PIN diode D2-2 is connected to the cathode of the PIN diode D2-1 After connection, it is grounded through the sixth resistor R6, and the node where the cathode of the PIN diode D2-2 is connected to the cathode of the PIN diode D2-1 is the output end of the downlink attenuation circuit.

A second-stage downlink filter circuit is provided between the downlink attenuation circuit and the downlink power amplifying circuit, and the second-stage downlink filter circuit uses a second surface acoustic filter F2 and a third surface acoustic filter F3 connected in series.

The output end of the downlink attenuation circuit is connected to the input end of the second stage downlink filter circuit via the 20th capacitor C20. The output end of the second-stage downlink filter circuit is connected to the input end of the downlink power amplifier circuit via the 21st capacitor C21.

The circuit structure of the uplink power amplifying circuit is the same as that of the downlink power amplifying circuit; the downlink power amplifying circuit includes the power amplifier module U5 of the model SKY77768 and the amplifier U4 of the SBB5089, and the first pin of the amplifier U4 of the SBB5089 is the downlink The input terminal of the power amplifier circuit, the 4th pin of the amplifier U4 of SBB5089 is grounded, the 3rd pin of the amplifier U4 of SBB5089 is connected with the 2nd pin of the power amplifier module U5 through an attenuation network, the 3rd pin of the amplifier U4 of SBB5089 The pin is connected to the input end of the attenuation network through the 22nd capacitor C22, and the output end of the attenuation network is connected to the second pin of the power amplifier module U5 through the 23rd capacitor C23. The third pin of the amplifier U4 of the SBB5089 is connected to one end of the third inductance L3, the other end of the third inductance L3 is respectively connected to one end of the 35th capacitor C35 and the 17th resistor R17, and the other end of the 35th capacitor C35 is connected to The 2nd pin of the amplifier U4 of SBB5089 is connected to the ground, the 36th capacitor C36 is connected in parallel with both ends of the 35th capacitor C35, the other end of the 17th resistor R17 is connected to the 5V power supply, and the other end of the 17th resistor R17 passes through the seventh inductor L7 Connected to a 5V power supply, the other end of the 17th resistor R17 is grounded through the 38th capacitor C38, the two ends of the 38th capacitor C38 are connected in parallel with the 42nd capacitor C42; the first pin and the tenth pin of the power amplifier module U5 After being connected, it is connected to a 3.3V power supply, the first pin and the tenth pin of the power amplifier module U5 are connected to the ground through the twelfth capacitor C12, and the two ends of the twelfth capacitor C12 are connected in parallel with the thirteenth capacitor C13, the first 14 capacitors C14, the 15th capacitor C15, the 16th capacitor C16, the 9th pin of the power amplifier module U5 is the output end of the downlink power amplifier circuit, the 8th pin of the power amplifier module U5 passes through the 12th resistor R12 Grounding, the 7th pin and the 11th pin of the power amplifier module U5 are both grounded, and the 5th pin of the power amplifier module U5 is respectively connected to one end of the 13th resistor R13, the 18th resistor R18, and the 24th capacitor C24 connected, the other end of the 13th resistor R13 is connected to the 3.3V power supply, the other end of the 18th resistor R18 and the other end of the 24th capacitor C24 are both grounded; the downlink detection circuit includes a Schottky diode D3, and the Schottky The anode of the diode D3 is respectively connected to one end of the fifth inductor L5 and the thirty-seventh capacitor C37, the other end of the fifth inductor L5 is grounded, and the other end of the thirty-seventh capacitor C37 is connected to the sixth pin of the power amplifier module U5. The cathode of the Tertky diode D3 is connected to the MCU, the cathode of the Schottky diode D3 is respectively connected to one end of the 39th capacitor C39 and the 22nd resistor R22, the other end of the 39th capacitor C39 and the 22nd resistor R22 is grounded, and the 39th capacitor C39 and the other end of the 22nd resistor R22 are grounded. A 40th capacitor C40 is connected in parallel with both ends of the capacitor C39.

The attenuation network is a π-type attenuation network composed of the seventh resistor R7, the eleventh resistor R11, and the eighth resistor R8.

A second-stage downlink filter circuit is provided between the downlink attenuation circuit and the downlink power amplifying circuit, and the second-stage downlink filter circuit uses a second surface acoustic filter F2 and a third surface acoustic filter F3 connected in series.

A second-stage uplink filter circuit is provided between the uplink attenuation circuit and the uplink power amplifying circuit, and the second-stage uplink filter circuit adopts a fifth surface acoustic filter F5 and a fourth surface acoustic filter F4, and the fifth An amplifying circuit is arranged between the surface acoustic filter F5 and the fourth surface acoustic filter F4, and the amplifying circuit includes an amplifier U12 whose model is SBB5089, the first pin of the amplifier U12 of SBB5089 and the output of the fifth surface acoustic filter F5 terminal connection, the 4th pin of the amplifier U12 of SBB5089 is grounded, the 3rd pin of the amplifier U12 of SBB5089 is connected with the input terminal of the fourth surface acoustic filter F4, the 3rd pin of the amplifier U12 of the SBB5089 is connected to the 17th pin One end of the inductor L17 is connected, the other end of the 17th inductor L17 is respectively connected to one end of the 67th capacitor C67 and the 34th resistor R34, and the other end of the 67th capacitor C67 is connected to the second pin of the amplifier U12 of the SBB5089 and grounded, The two ends of the 67th capacitor C67 are connected in parallel with the 68th capacitor C68, the other end of the 34th resistor R34 is connected to the 5V power supply, the other end of the 34th resistor R34 is connected to the 5V power supply through the 12th inductor L12, and the other end of the 34th resistor R34 is connected to the 5V power supply through the 62nd resistor R34 The capacitor C62 is grounded, and a 63rd capacitor C63 is connected in parallel with both ends of the 62nd capacitor C62. The SBB5089 active bias network provides stable overcurrent protection and DC operating point.

Both the first radio frequency switch and the second radio frequency switch use a SAW duplexer, and the model of the SAW duplexer is SD902AP2. The output end of the downlink power amplifying circuit is connected to the downlink input end of the second radio frequency switch through the 47th capacitor C47. The downlink input end of the second radio frequency switch is grounded through the eighth inductor L8. The downlink output end and uplink input end of the second radio frequency switch are respectively used for connecting with the GPRS data transmission module. The uplink output terminal of the second radio frequency switch is grounded through the eleventh inductor L11. The uplink output terminal of the second radio frequency switch is connected to the input terminal of the uplink preamplifier and filter circuit via the 47th capacitor C47. The 48th capacitor C48 at the downlink output end of the first radio frequency switch is connected to the input end of the downlink preamplifier and filter circuit. The downlink output terminal of the first radio frequency switch is grounded through the ninth inductor L9. The downlink input end and the uplink output end of the first radio frequency switch are respectively used for connecting with the antenna. The output terminal of the uplink power amplifying circuit is connected to the uplink input terminal of the first radio frequency switch through the forty-ninth capacitor C49. The uplink input end of the first radio frequency switch is grounded through the tenth inductor L10.

The MCU is connected with a display, which is used to display the real received signal strength under the current situation, in order to facilitate the operation of the on-site personnel and facilitate the selection of the base station by the on-site personnel.

The present invention has the advantage that: since the GPRS acquisition terminal signal strength adaptive data testing and transmission device of the present invention includes an MCU, the downlink is a downlink preamplifier, a filter circuit, a downlink attenuation circuit, a downlink power Amplifying circuit, the uplink is an uplink preamplifier, filter circuit, uplink attenuation circuit, and uplink power amplifier connected in sequence; the input end of the downlink preamplifier, filter circuit, and the output end of the uplink power amplifier are all connected to the first A radio frequency switch is connected, the input end of the uplink preamplifier, the filter circuit, and the output end of the downlink power amplifying circuit are all connected to the second radio frequency switch; a downlink detection circuit is arranged between the MCU and the downlink power amplifying circuit, so The downlink detection circuit is used to detect the output power of the downlink power amplifying circuit, and converts the detected output power of the downlink power amplifying circuit into a DC level and transmits it to the MCU, and the MCU is used to receive the output power of the downlink power amplifying circuit, and Comparing the output power of the downlink power amplifying circuit with the set value, outputting a control signal to the downlink attenuation circuit to control the attenuation (attenuation range) of the downlink attenuation circuit, thereby controlling the output power of the downlink power amplifying circuit; the MCU and An uplink detection circuit is arranged between the uplink power amplifying circuits, the uplink detecting circuit is used to detect the output power of the uplink power amplifying circuit, and converts the detected output power of the uplink power amplifying circuit into a DC level and transmits it to the MCU; The MCU is used to receive the output power of the uplink power amplifier circuit, compare the output power of the uplink power amplifier circuit with the set value, and output a control signal to the uplink attenuation circuit to control the attenuation of the uplink attenuation circuit (attenuation range, thereby controlling The output power of the uplink power amplifier circuit. Adopt the above-mentioned circuit structure, make the present invention possess the uplink and downlink signal amplifying link circuit of two-way automatic gain control.And possess the amplifier of high stability and low noise characteristic under the situation of high gain.And this The invention uses intelligent control technology to realize the development of low-cost uplink and downlink signal amplifiers, and provides the dual functions of automatic gain control and on-site signal strength detection. Because the present invention has automatic gain control function, the output signal is controlled in a reasonable range, so that The signal strength received by the base station is within the allowable range, and at the same time, the gain of the amplifier at the receiving end can be adjusted according to the strength of the received signal, so that the signal amplitude entering the GPRS module is in the best state.

In a word, the present invention is dual-channel time-sharing amplification, and has functions such as dual-channel automatic gain control, dual-channel power detection, and single-channel received signal strength display. The invention can also be used as a signal strength tester, and has a corresponding signal strength display screen.

Description of drawings

Fig. 1 is the functional block diagram of GPRS acquisition terminal signal strength self-adaptive data test and transmission device of the present invention;

Fig. 2 is the concrete circuit diagram of the MCU part of GPRS acquisition terminal signal strength adaptive data test and transmission device of the present invention;

Fig. 3 is the specific circuit diagram of the uplink and downlink of the GPRS acquisition terminal signal strength adaptive data test and transmission device of the present invention;

Fig. 4 is a schematic diagram of the simulation results of the voltage-controlled attenuation circuit of the present invention;

Figure 5 is a schematic diagram of the results of simulating the minimum attenuation of the attenuation circuit in the ADS simulation software;

FIG. 6 is a schematic diagram of simulation results obtained when the equivalent impedance of the PIN diode in the voltage-controlled attenuation circuit reaches a maximum of 1500 ohms.

Detailed ways

Referring to Fig. 1 to Fig. 3, a kind of GPRS acquisition terminal signal strength self-adaptive data testing and transmission device, comprise uplink and downlink, also comprise MCU, described downlink is the downlink preamplifier that connects successively, filter circuit, downlink attenuation circuit, and downlink power amplifier circuit, the uplink is an uplink preamplifier, filter circuit, uplink attenuation circuit, and uplink power amplifier connected in sequence; the input end of the downlink preamplifier and filter circuit, The output ends of the uplink power amplifiers are all connected to the first radio frequency switch, the input ends of the uplink preamplifier, the filter circuit, and the output ends of the downlink power amplifying circuit are all connected to the second radio frequency switch; the MCU and the downlink power amplifying circuit A downlink detection circuit is arranged between them, and the downlink detection circuit is used to detect the output power of the downlink power amplifier circuit, and converts the detected output power of the downlink power amplifier circuit into a DC level and transmits it to the MCU, and the MCU is used for receiving The output power of the downlink power amplifier circuit, and compare the output power of the downlink power amplifier circuit with the set value, and output the control signal to the downlink attenuation circuit to control the attenuation of the downlink attenuation circuit (attenuation range, thereby controlling the downlink power amplifier circuit The size of the output power; an uplink detection circuit is provided between the MCU and the uplink power amplifying circuit, and the uplink detection circuit is used to detect the output power of the uplink power amplifying circuit, and convert the detected output power of the uplink power amplifying circuit The DC level is transmitted to the MCU; the MCU is used to receive the output power of the uplink power amplifying circuit, compare the output power of the uplink power amplifying circuit with the set value, output a control signal to the uplink attenuation circuit, and control the uplink attenuation circuit The amount of attenuation (attenuation amplitude, thereby controlling the output power of the uplink power amplifier circuit.

The downlink preamplifier and filter circuit includes a high-gain HEMT amplifying element U6, the gate of the high-gain HEMT amplifying element U6 is used to connect with the first radio frequency switch, and the two sources of the high-gain HEMT amplifying element U6 Both are grounded, the gate of the high-gain HEMT amplifying element U6 is connected to one end of the fourth inductance L4, and the other end of the fourth inductance L4 is respectively connected to one end of the 43rd capacitor C43 and the 24th resistor R24. The other end of the 43rd capacitor C43 is grounded, the two ends of the 43rd capacitor C43 are connected in parallel with the 44th capacitor C44, the other end of the 24th resistor R24 is respectively connected to one end of the 21st resistor R21 and the 25th resistor R25, the 25th resistor The other end of R25 is grounded, the other end of the 21st resistor R21 is respectively connected to one end of the 14th resistor R14, the 15th resistor R15, and the 28th capacitor C28, the other end of the 28th capacitor C28 is grounded, and the 15th resistor R15 The other end of the 15th resistor R15 is connected to the 5V power supply (the other end of the 15th resistor R15 is connected to the 5V power supply through the 7th inductance L7), the other end of the 15th resistor R15 is grounded through the 29th capacitor C29, and the two ends of the 29th capacitor C29 A 30th capacitor C30 is connected in parallel at one end, the other end of the 14th resistor R14 is respectively connected to one end of the 27th capacitor C27 and the first inductance L1, the other end of the 27th capacitor C27 is grounded, and the other end of the first inductance L1 is respectively connected to The drain of the high-gain HEMT amplifying element U6 is connected to one end of the ninth resistor R9, the other end of the ninth resistor R9 is connected to one end of the 17th capacitor C17, and the other end of the 17th capacitor C17 is connected to an attenuation network, the attenuation The output end of the network is connected with a first-stage downlink filter circuit, the output end of the first-stage downlink filter circuit is used to connect with the downlink attenuation circuit, and the first-stage downlink filter circuit adopts the first surface acoustic filter F1. The selection of the preamplifier needs to follow the principle of low noise, and the gain is not a very important indicator. According to the requirements of the frequency band used, this embodiment uses Avago's ATF-54143 high-frequency FET.

The attenuation network is a π-type attenuation network composed of the third resistor R3, the tenth resistor R10, and the fourth resistor R4. The input ends of the π-type attenuation network are respectively connected to one end of the third resistor R3 and the tenth resistor R10, the other end of the third resistor R3 is grounded, and the other end of the tenth resistor R10 is respectively connected to the output end of the π-type attenuation network, the fourth One end of the resistor R4 is connected, and the other end of the fourth resistor R4 is grounded.

An amplifying circuit is provided between the output end of the first-stage downlink filter circuit and the input end of the downlink attenuation circuit. The output terminal of the filter circuit is connected, the 4th pin of the amplifier U3 of SBB5089 is grounded, the 3rd pin of the amplifier U3 of SBB5089 is connected with the input terminal of the downlink attenuation circuit, the 3rd pin of the amplifier U3 of the SBB5089 is connected to the 2nd pin One end of the inductor L2 is connected, the other end of the second inductor L2 is respectively connected to one end of the 31st capacitor C31 and the 16th resistor R16, and the other end of the 31st capacitor C31 is connected to the second pin of the amplifier U3 of the SBB5089 and grounded. The two ends of the 31st capacitor C31 are connected in parallel with the 32nd capacitor C32, the other end of the 16th resistor R16 is connected to the 5V power supply, the other end of the 16th resistor R16 is connected to the 5V power supply through the 7th inductor L7, and the other end of the 16th resistor R16 is connected to the 5V power supply through the 33rd resistor R16. The capacitor C33 is grounded, and a 34th capacitor C34 is connected in parallel with both ends of the 33rd capacitor C33. The output end of the first-stage downlink filter circuit is connected to the first pin of the amplifier U3 of the SBB5089 through the eighteenth capacitor C18. The third pin of the amplifier U3 of SBB5089 is connected to the input end of the downlink attenuation circuit through the 19th capacitor C19.

The circuit structure of the uplink attenuation circuit is the same as that of the downlink attenuation circuit. The downlink attenuation circuit includes a PIN diode D1-1, a PIN diode D1-2, a PIN diode D2-2, and a PIN diode D2-1. The PIN diode D1- The anode of 1 is grounded through the 25th capacitor C25, the anode of the PIN diode D2-2 is grounded through the 26th capacitor C26, the anode of the PIN diode D1-1 is connected to one end of the 23rd resistor R23 through the 19th resistor R19, and the PIN diode D2 The anode of -2 is connected to one end of the 23rd resistor R23 through the 20th resistor R20, the other end of the 23rd resistor R23 is connected to the 5V power supply, the other end of the 23rd resistor R23 is connected to the 5V power supply through the 7th inductor L7, and the 23rd resistor The other end of R23 is grounded through the 41st capacitor C41; the anode of the PIN diode D1-2 is connected to the anode of the PIN diode D2-1 and then connected to one end of the sixth inductance L6, and the other end of the sixth inductance L6 is connected to the MCU. The other end of the 6th inductance L6 is grounded through the 45th capacitor C45, and the 46th capacitor C46 is connected in parallel with the two ends of the 45th capacitor C45; the cathode of the PIN diode D1-1 is connected to the cathode of the PIN diode D1-2 and then passed through the 5th capacitor C45. The resistor R5 is grounded, and the node where the cathode of the PIN diode D1-1 is connected to the cathode of the PIN diode D1-2 is the input end of the downlink attenuation circuit; the cathode of the PIN diode D2-2 is connected to the cathode of the PIN diode D2-1 After connection, it is grounded through the sixth resistor R6, and the node where the cathode of the PIN diode D2-2 is connected to the cathode of the PIN diode D2-1 is the output end of the downlink attenuation circuit. PIN diodes D1-1 and PIN diodes D1-2 are PIN diodes of model HSMP3814, which are internal twin PIN diodes. PIN diode D2-2 and PIN diode D2-1 also use PIN diodes of model HSMP3814, which are internal twin PIN diodes.

A second-stage downlink filter circuit is provided between the downlink attenuation circuit and the downlink power amplifying circuit, and the second-stage downlink filter circuit uses a second surface acoustic filter F2 and a third surface acoustic filter F3 connected in series.

The output end of the downlink attenuation circuit is connected to the input end of the second stage downlink filter circuit via the 20th capacitor C20. The output end of the second-stage downlink filter circuit is connected to the input end of the downlink power amplifier circuit via the 21st capacitor C21.

The downlink power amplifying circuit includes the power amplifier module U5 of the model SKY77768 and the amplifier U4 of SBB5089, the first pin of the amplifier U4 of the SBB5089 is the input end of the downlink power amplifying circuit, and the fourth pin of the amplifier U4 of the SBB5089 Grounded, the third pin of the amplifier U4 of SBB5089 is connected to the second pin of the power amplifier module U5 through an attenuation network, the third pin of the amplifier U4 of SBB5089 is connected to the input end of the attenuation network through the 22nd capacitor C22, the attenuation The output end of the network is connected to the second pin of the power amplifier module U5 via the 23rd capacitor C23. The third pin of the amplifier U4 of the SBB5089 is connected to one end of the third inductance L3, the other end of the third inductance L3 is respectively connected to one end of the 35th capacitor C35 and the 17th resistor R17, and the other end of the 35th capacitor C35 is connected to The 2nd pin of the amplifier U4 of SBB5089 is connected to the ground, the 36th capacitor C36 is connected in parallel with both ends of the 35th capacitor C35, the other end of the 17th resistor R17 is connected to the 5V power supply, and the other end of the 17th resistor R17 passes through the seventh inductor L7 Connected to a 5V power supply, the other end of the 17th resistor R17 is grounded through the 38th capacitor C38, the two ends of the 38th capacitor C38 are connected in parallel with the 42nd capacitor C42; the first pin and the tenth pin of the power amplifier module U5 After being connected, it is connected to a 3.3V power supply, the first pin and the tenth pin of the power amplifier module U5 are connected to the ground through the twelfth capacitor C12, and the two ends of the twelfth capacitor C12 are connected in parallel with the thirteenth capacitor C13, the first 14 capacitors C14, the 15th capacitor C15, the 16th capacitor C16, the 9th pin of the power amplifier module U5 is the output end of the downlink power amplifier circuit, the 8th pin of the power amplifier module U5 passes through the 12th resistor R12 Grounding, the 7th pin and the 11th pin of the power amplifier module U5 are both grounded, and the 5th pin of the power amplifier module U5 is respectively connected to one end of the 13th resistor R13, the 18th resistor R18, and the 24th capacitor C24 connected, the other end of the 13th resistor R13 is connected to the 3.3V power supply, the other end of the 18th resistor R18 and the other end of the 24th capacitor C24 are both grounded; the downlink detection circuit includes a Schottky diode D3, and the Schottky The anode of the diode D3 is respectively connected to one end of the fifth inductor L5 and the thirty-seventh capacitor C37, the other end of the fifth inductor L5 is grounded, and the other end of the thirty-seventh capacitor C37 is connected to the sixth pin of the power amplifier module U5. The cathode of the Tertky diode D3 is connected to the MCU, the cathode of the Schottky diode D3 is respectively connected to one end of the 39th capacitor C39 and the 22nd resistor R22, the other end of the 39th capacitor C39 and the 22nd resistor R22 is grounded, and the 39th capacitor C39 and the other end of the 22nd resistor R22 are grounded. A 40th capacitor C40 is connected in parallel with both ends of the capacitor C39.

The attenuation network is a π-type attenuation network composed of the seventh resistor R7, the eleventh resistor R11, and the eighth resistor R8.

A second-stage downlink filter circuit is provided between the downlink attenuation circuit and the downlink power amplifying circuit, and the second-stage downlink filter circuit uses a second surface acoustic filter F2 and a third surface acoustic filter F3 connected in series.

The uplink preamplifier and filtering circuit includes a high-gain HEMT amplifying element U9, the gate of the high-gain HEMT amplifying element U9 is used to connect with the second radio frequency switch, and the two sources of the high-gain HEMT amplifying element U9 are all grounded, the gate of the high-gain HEMT amplifying element U9 is connected to one end of the 15th inductance L15, and the other end of the 15th inductance L15 is respectively connected to one end of the 54th capacitor C54 and the 27th resistor R27. The other end of the 54th capacitor C54 is grounded, the two ends of the 54th capacitor C54 are connected in parallel with the 55th capacitor C55, the other end of the 27th resistor R27 is respectively connected to one end of the 30th resistor R30 and the 26th resistor R26, and the 26th resistor The other end of R26 is grounded, the other end of the 30th resistor R30 is respectively connected to one end of the 36th resistor R36, the 35th resistor R35, and the 71st capacitor C71, the other end of the 71st capacitor C71 is grounded, and the 35th resistor R35 The other end of the 35th resistor R35 is connected to the 5V power supply (the other end of the 35th resistor R35 is connected to the 5V power supply through the 12th inductor L12), the other end of the 35th resistor R35 is grounded through the 69th capacitor C69, and the two ends of the 69th capacitor C69 A 70th capacitor C70 is connected in parallel at one end, the other end of the 36th resistor R36 is respectively connected to one end of the 72nd capacitor C72 and the 18th inductor L18, the other end of the 72nd capacitor C72 is grounded, and the other end of the 18th inductor L18 is respectively connected to The drain of the high-gain HEMT amplifying element U9 is connected to one end of the 42nd resistor R42, the other end of the 42nd resistor R42 is connected to one end of the 81st capacitor C81, and the other end of the 81st capacitor C81 is connected to an attenuation network, the attenuation The output end of the network is connected with a first-stage uplink filter circuit, the output end of the first-stage uplink filter circuit is used for connecting with an uplink attenuation circuit, and the first-stage uplink filter circuit adopts the sixth surface acoustic filter F6. The output end of the first-stage uplink filter circuit is connected to the input end of the uplink attenuation circuit through an 80th capacitor C80.

The attenuation network adopts a π-type attenuation network composed of a 47th resistor R47, a 41st resistor R41, and a 48th resistor R48. The input end of the π-type attenuation network is respectively connected to one end of the 48th resistor R48 and the 41st resistor R41, the other end of the 48th resistor R48 is grounded, and the other end of the 41st resistor R41 is respectively connected to the output end of the π-type attenuation network, the 47th resistor One end of the resistor R47 is connected, and the other end of the 47th resistor R47 is grounded.

The uplink attenuation circuit includes a PIN diode D5-1, a PIN diode D5-2, a PIN diode D6-1, and a PIN diode D6-2. The anode of the PIN diode D5-1 is grounded through a 60th capacitor C60, and the PIN diode The anode of D6-1 is grounded through the 61st capacitor C61, the anode of the PIN diode D5-1 is connected to one end of the 28th resistor R28 through the 31st resistor R31, and the anode of the PIN diode D6-1 is connected to the 28th resistor R28 through the 32nd resistor R32 One end of the 28th resistor R28 is connected to the 5V power supply, the other end of the 28th resistor R28 is connected to the 5V power supply through the 12th inductor L12, and the other end of the 28th resistor R28 is grounded through the 56th capacitor C56; the PIN The anode of the diode D5-2 is connected to the anode of the PIN diode D6-2 and then connected to one end of the 13th inductor L13, the other end of the 13th inductor L13 is connected to the MCU, and the other end of the 13th inductor L13 is grounded through the 52nd capacitor C52, The two ends of the 52nd capacitor C52 are connected in parallel with the 53rd capacitor C53; the cathode of the PIN diode D5-1 is connected to the cathode of the PIN diode D5-2 and grounded through the 45th resistor R45, and the cathode of the PIN diode D5-1 is connected to the cathode of the PIN diode D5-2. The node connected to the cathode of the PIN diode D5-2 is the input end of the uplink attenuation circuit; the cathode of the PIN diode D6-1 is connected to the cathode of the PIN diode D6-2 and grounded through the 46th resistor R46, and the PIN diode D6 The node where the cathode of -1 is connected to the cathode of the PIN diode D6-2 is the output end of the uplink attenuation circuit. PIN diode D5-1 and PIN diode D5-2 are PIN diodes of model HSMP3814, which are internal twin PIN diodes. PIN diodes D6-1 and PIN diodes D6-2 also use PIN diodes of model HSMP3814, which are internal twin PIN diodes.

The uplink power amplifying circuit includes the power amplifier module U10 of model SKY77768 and the amplifier U11 of SBB5089, the first pin of the amplifier U11 of the SBB5089 is the input end of the uplink power amplifying circuit, and the fourth pin of the amplifier U11 of SBB5089 Grounded, the third pin of the amplifier U11 of SBB5089 is connected to the second pin of the power amplifier module U10 through an attenuation network, the third pin of the amplifier U11 of SBB5089 is connected to the input end of the attenuation network through the 75th capacitor C75, the attenuation The output end of the network is connected to the second pin of the power amplifier module U10 via the 74th capacitor C74. The third pin of the amplifier U11 of the SBB5089 is connected to one end of the 16th inductance L16, the other end of the 16th inductance L16 is respectively connected to one end of the 65th capacitor C65 and the 38th resistor R38, and the other end of the 65th capacitor C65 is connected to The 2nd pin of the amplifier U11 of SBB5089 is connected to the ground, the 66th capacitor C66 is connected in parallel with both ends of the 65th capacitor C65, the other end of the 38th resistor R38 is connected to the 5V power supply, and the other end of the 38th resistor R38 passes through the 12th inductor L12 Connected to a 5V power supply, the other end of the 38th resistor R38 is grounded through the 51st capacitor C51, and the 57th capacitor C57 is connected in parallel with both ends of the 51st capacitor C51; the first pin and the tenth pin of the power amplifier module U10 After being connected, it is connected to a 3.3V power supply, the first pin and the tenth pin of the power amplifier module U10 are connected to the ground through the 82nd capacitor C82, the two ends of the 82nd capacitor C82 are connected in parallel with the 83rd capacitor C83, the The 84th capacitor C84, the 85th capacitor C85, and the 86th capacitor C86, the 9th pin of the power amplifier module U10 is the output end of the uplink power amplifier circuit, the 8th pin of the power amplifier module U10 passes through the 39th resistor R39 Grounding, the 7th pin and the 11th pin of the power amplifier module U10 are both grounded, the 5th pin of the power amplifier module U10 is respectively connected to one end of the 37th resistor R37, the 33rd resistor R33, and the 73rd capacitor C73 connection, the other end of the 37th resistor R37 is connected to the 3.3V power supply, the other end of the 33rd resistor R33 and the other end of the 73rd capacitor C73 are grounded; the uplink detection circuit includes a Schottky diode D4, and the Schottky The anode of the diode D4 is respectively connected to one end of the 14th inductance L14 and the 64th capacitor C64, the other end of the 14th inductance L14 is grounded, and the other end of the 64th capacitor C64 is connected to the sixth pin of the power amplifier module U10. The cathode of the Tertky diode D4 is connected to the MCU, the cathode of the Schottky diode D4 is respectively connected to one end of the 58th capacitor C58 and the 29th resistor R29, the other end of the 58th capacitor C58 and the 29th resistor R29 is grounded, and the 58th capacitor C58 and the other end of the 29th resistor R29 are grounded. A fifty-ninth capacitor C59 is connected in parallel with both ends of the capacitor C58.

The attenuation network adopts a π-type attenuation network composed of a 40th resistor R40, a 43rd resistor R43, and a 44th resistor R44.

A second-stage uplink filter circuit is provided between the uplink attenuation circuit and the uplink power amplifying circuit. The output end of the uplink attenuation circuit is connected to the input end of the second stage uplink filter circuit via the 79th capacitor C79. The second-stage uplink filter circuit uses a fifth surface acoustic filter F5 and a fourth surface acoustic filter F4, and an amplifying circuit is arranged between the fifth surface acoustic filter F5 and the fourth surface acoustic filter F4. The output terminal of the fifth surface acoustic filter F5 is connected to the input terminal of the amplifying circuit via the 78th capacitor C78. The output terminal of the amplifying circuit is connected to the input terminal of the fourth surface acoustic filter F4 via the 77th capacitor C77. The output end of the fourth surface acoustic filter F4 is connected to the input end of the uplink power amplifying circuit via the 76th capacitor C76. The amplifying circuit includes the amplifier U12 of the model SBB5089, the first pin of the amplifier U12 of the SBB5089 is connected to the output end of the fifth surface acoustic filter F5, the fourth pin of the amplifier U12 of the SBB5089 is grounded, and the first pin of the amplifier U12 of the SBB5089 is connected to the ground. The pin 3 is connected to the input end of the fourth surface acoustic filter F4, the pin 3 of the amplifier U12 of the SBB5089 is connected to one end of the 17th inductance L17, and the other end of the 17th inductance L17 is respectively connected to the 67th capacitor C67, One end of the 34th resistor R34 is connected, the other end of the 67th capacitor C67 is connected to the second pin of the amplifier U12 of SBB5089, and grounded, the two ends of the 67th capacitor C67 are connected in parallel with the 68th capacitor C68, and the other end of the 34th resistor R34 It is connected to a 5V power supply, the other end of the 34th resistor R34 is connected to the 5V power supply through the 12th inductor L12, and the other end of the 34th resistor R34 is grounded through the 62nd capacitor C62, and a 63rd capacitor C63 is connected in parallel to both ends of the 62nd capacitor C62. The SBB5089 active bias network provides stable overcurrent protection and DC operating point.

Both the first radio frequency switch and the second radio frequency switch use a SAW duplexer, and the model of the SAW duplexer is SD902AP2. The output end of the downlink power amplifying circuit is connected to the downlink input end of the second radio frequency switch through the 47th capacitor C47. The downlink input end of the second radio frequency switch is grounded through the eighth inductor L8. The downlink output end and uplink input end of the second radio frequency switch are respectively used for connecting with the GPRS data transmission module. The uplink output terminal of the second radio frequency switch is grounded through the eleventh inductor L11. The uplink output terminal of the second radio frequency switch is connected to the input terminal of the uplink preamplifier and filter circuit via the 47th capacitor C47. The 48th capacitor C48 at the downlink output end of the first radio frequency switch is connected to the input end of the downlink preamplifier and filter circuit. The downlink output terminal of the first radio frequency switch is grounded through the ninth inductor L9. The downlink input end and the uplink output end of the first radio frequency switch are respectively used for connecting with the antenna. The output terminal of the uplink power amplifying circuit is connected to the uplink input terminal of the first radio frequency switch through the forty-ninth capacitor C49. The uplink input end of the first radio frequency switch is grounded through the tenth inductor L10.

Analysis of the working principle of the present invention: the GSM communication signal is divided into uplink and downlink, which are respectively responsible for the signal sent by the GPRS module to the base station and the signal sent by the base station to the GPRS module. Its uplink center frequency is 902MHz, and its downlink center frequency is 947MHz. Therefore, two different amplifier circuits are also responsible for the internal amplifier. The space signal is sensed by the antenna to the input interface of the amplifier. First, it needs to pass through a selection switch to send the sensed base station signal to the downlink amplifier circuit. The present invention is dedicated to GPRS communication, and adopts an acoustic surface duplex switch, that is, a duplexer, which is a two-port network with selectivity to frequency, capable of bandwidth selection, and used to separate or combine different frequencies The main function of the signal is to suppress the unwanted signal and pass the useful signal through the filter. The signal sent by the antenna is selectively switched. Only the frequency of 947MHz can pass between the antenna and the downlink amplifier, while the uplink signal and the antenna can only pass the signal of 902MHz frequency, and the two signals can be time-divided switch.

The downlink signal selected by the switch enters the downlink preamplifier and filter circuit. The preamplifier and filter circuit have two main functions, one is to compensate for the insertion loss of the surface acoustic filter, and the other is to send the noise mixed in the weak electric wave received by the antenna to the next stage without being amplified. If this part uses noise If the amplifier has poor characteristics, the weak signal will be overwhelmed by noise. The noise index of the preamplification and filtering circuit of the present invention is good. The noise figure of the amplifier circuit is the ratio of the input signal S/N to the output signal S/N. If an amplifier with a poor noise figure is used, the noise generated inside the amplifier will be mixed into the signal, and the input signal cannot be extracted from the noise. And the smaller the noise figure of the amplifying circuit is, the larger the gain is, and the smaller the influence of the noise generated by the subsequent stage circuit is. The ATF54143 used in the preamplifier and filter circuit of the present invention is a high-gain HEMT amplifying element with extremely low noise. is the power supply. A fixed attenuation network is added to the output part of the amplifying circuit. By adjusting the parameters of the network, the gain of this stage of amplifying circuit is just equal to the insertion loss of the antenna switching switch and the SAW filter behind this stage of amplifier.

After the preamplification and filter circuit, the downlink signal is sent to the lower amplifier. This amplifier adopts the fixed gain integrated circuit component SBB5089. SBB-5089 is a high-performance InGaPHBTMMIC, which is a Darlington configuration with an active bias network. amplifier. The active bias network provides stable over-current protection and DC operating point, it can work well under 5V power supply, no bias circuit is required compared with other amplifiers, and it also has better in-band gain flatness. This device has an internal matching network with a matching impedance of 50 ohms, so there is no need to design an external matching network for coordination when designing the circuit, which achieves the purpose of the simplest design. The signal amplified by SBB5089 is sent to the voltage-controlled attenuator circuit, which is a voltage-controlled attenuator circuit composed of PIN diodes. The PIN diodes mainly work in the reverse bias state, and when negative voltage is applied (or zero bias, PIN tubes, etc. When adding positive voltage, the PIN tube is equivalent to a small resistance. The present invention utilizes the bias characteristics of the PIN diode to design a voltage-controlled attenuation circuit. Compared with the fixed attenuation circuit, three diodes can be used to replace the Fixed resistors, constructing a variable attenuator, however, this introduces asymmetry in the network, resulting in a rather complex bias network. There are several performance benefits to be gained by replacing the series resistors with two PIN diodes .First, the network is isolated from other parts due to the capacitive reactance of the diode used in series, and the use of two diodes instead of a resistor can increase the maximum attenuation value or double the frequency upper limit under the condition of a certain attenuation value.Secondly, The two diodes that replace the series resistors are reversely connected at 180 degrees, which suppresses the generation of even-numbered signal distortion. Third, the resulting attenuator network is symmetrical, which greatly simplifies the bias network. The PIN When diodes are used as attenuation elements, PIN diodes have higher linearity than equivalent GaAsMESFETs, and signal distortion can be minimized by using multiple PIN diodes with thick I layers and low dielectric relaxation frequencies. In Avago In the company's PIN diode product line, the HSMP-3814 series products have the thickest I layer. In the low attenuation state, most of the RF energy is only transferred from the input to the output. They are close to zero bias state, and their junction capacitance will increase with The RF voltage changes synchronously. Fortunately, since the two diodes are connected in reverse series, some distortion or distortion produced by the RF-modulated capacitor can be suppressed. Since the two packaged reverse-series diodes have completely matched characteristics , so the best distortion suppression ability can be obtained. Figure 4 is the simulation result of the voltage-controlled attenuator. The minimum attenuation degree of the attenuation circuit is simulated in the ADS simulation software, and the result is shown in Figure 5. The minimum attenuation is -2.3db , at this time the PIN diode is at the lowest impedance of 10 ohms. When the equivalent impedance of the PIN diode reaches a maximum of 1500 ohms, the simulation results obtained are shown in Figure 6. It can be seen from Figure 6 that the maximum attenuation is -31db. The magnitude of the attenuation has a linear relationship with the bias voltage, so the gain of the entire amplifying circuit can be adjusted by adjusting the bias voltage of the attenuation circuit in a disguised form.

The attenuated signal is filtered through two consecutive surface acoustic filters, and the amplitude of the out-of-band signal is suppressed as much as possible. Then the signal enters the power amplifier circuit. The models selected for the drive amplifier and power amplifier of the power amplifier circuit are SBB5089 and SKY77768 respectively. SBB5089 is a broadband high-gain amplifier. In the 0-2GHZ frequency band, this amplifier has good in-band gain flatness, and the average gain is 20db. SKY77768 is a power amplifier dedicated to mobile phones. It not only has good amplification performance, but also has a power detection function, which can detect the size of the output power and provide a reference for the work of the voltage-controlled attenuator. The SKY77768 power amplifier module is a dedicated surface mount module developed for wideband code division multiple access applications. SKY77768 mainly provides two functions in this project, one is the power amplification function, which amplifies the uplink or downlink signal to the ideal power value. The second is the power detection function, which provides a reference for automatic gain control for the entire uplink or downlink signal. The output power signal is realized through a directional coupler, so a set of high-frequency power detection circuit is added to convert the high-frequency signal into a DC level. The power detection circuit is implemented with Schottky diodes. Since the signal amplitude here is very small, a diode square-law detection circuit is used. When the signal is small, this circuit mainly relies on the nonlinear square term of the diode for detection, and the high-order term is very Small and can be ignored, so it is also called "small signal square law detector". The DC level output from the detection circuit is the current output power through the power amplifier, the greater the power, the higher the voltage.

The component selection and circuit form of the uplink preamplifier and filter circuit are similar to the downlink, the difference lies in the arrangement of the filter circuit and the selection of the filter. Since the working center frequency of the uplink circuit is 902MHz, all surface acoustic filters in the uplink circuit are Using 902MHz.

In the downlink circuit, the signal needs to be amplified after passing through the first-stage filter. The main reason is that the downlink signal is very weak. In order to prevent the signal-to-noise ratio from decreasing after passing through the voltage-controlled attenuation circuit, another stage of amplifier is added in the middle. For the uplink signal, the signal power output by the GPRS module is relatively large and has a high signal-to-noise ratio, so after a first-stage pre-amplification to compensate for the SAW band loss, it can directly enter the voltage-controlled attenuator for amplitude processing. It has little effect on the signal-to-noise ratio.

Since the analog signal channel of the GPRS module works in time-sharing, the power value output by the power detector is output in the form of voltage pulses during the working period. If this level is used as the basis of automatic gain control, it will inevitably lead to work confusion. To solve this problem, a relatively complete and stable fuzzy control circuit is needed. If this part of the function is implemented by hardware, not only the cost is high, but also the flexibility is very poor. The modification brought about by wanting to adapt to some situations is the change of the circuit form, which is very unfavorable for the expansion and improvement work. Based on the above reasons, in the automatic gain control part, the present invention uses software to realize its analog control, so that various expansion functions can be easily made according to different applications, and even parameters that can be automatically modified according to the application environment can be made. adaptive system. By comparison, we choose STM32F303 series microcontrollers, of which the STM32F303CCX model has two synchronous 12-bit ADCs and two 12-bit DACs. At the same time, the core contains an FPU, which is suitable for high-intensity floating-point calculations. The full-speed main frequency can reach 72MHz, which can fully meet the needs of this project. The uplink and downlink power detection signals are respectively sent to the two-way ADC of the single-chip microcomputer, and the two-way DAC of the single-chip microcomputer are respectively connected to the voltage control terminal of the voltage-controlled attenuation circuit.

By rationally designing the coefficients in the PID algorithm, we can obtain a targeted gain compensation program, which can make the output power of the automatic gain control part stable, and automatically compensate for deviations as the environment changes, so as to realize the normal operation of the system.

Work process of the present invention is:

The downlink signal is induced by the antenna to get a weak voltage signal. This signal is firstly filtered by the lightning protection module to filter out the useless signal and DC level below the useful frequency band, and then enters the RF switch. At this time, the RF switch is connected to the preamplifier. After amplifying the possible useful signal, it is filtered by the first filter. This is a downstream band-pass surface acoustic filter. This filter has a very steep attenuation rate and can Most of the useless signals are filtered out, and the useful signals are sent to the voltage-controlled attenuator for attenuation. The attenuation range is determined by the MCU according to the output range of the power amplifier behind. The signal through the attenuator enters the downlink surface acoustic filter to filter out useless signals and then enters the power amplifier for power amplification. At this time, the power output by the power amplifier is equivalent to the upper limit of the signal amplitude received by the GPRS data transmission module. The role of the detector is to convert the amplitude of the high-frequency power signal into a DC level, which is convenient for the MCU to obtain.

When the GPRS data transmission module sends an uplink signal, the signal is sent to the preamplifier after filtering the noise through the uplink signal surface acoustic filter. The signal of the preamplifier enters the voltage-controlled attenuator for attenuation. The amount of attenuation is determined by the power obtained by the back-end detector, which is the upper limit of the power allowed by the base station. The attenuated signal enters the power amplifier through the uplink filter, and then is sent to the space through the arrester and antenna.

During the whole working process, the MCU is responsible for monitoring the strength of the uplink signal, the start time of the uplink signal, the strength of the downlink signal and the display of the downlink signal strength.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these modifications and variations.

Claims (8)

1. The utility model provides a GPRS acquisition terminal signal strength self-adaptation data test and transmission device, includes uplink and downlink, its characterized in that: the downlink is a downlink pre-amplification circuit, a filtering circuit, a downlink attenuation circuit and a downlink power amplification circuit which are sequentially connected, and the uplink is an uplink pre-amplification circuit, a filtering circuit, an uplink attenuation circuit and an uplink power amplifier which are sequentially connected; the input end of the downlink pre-amplification and filtering circuit and the output end of the uplink power amplifier are connected with the first radio frequency switch, and the input end of the uplink pre-amplification and filtering circuit and the output end of the downlink power amplifier circuit are connected with the second radio frequency switch; a downlink detection circuit is arranged between the MCU and the downlink power amplifying circuit and is used for detecting the output power of the downlink power amplifying circuit and transmitting the detected output power of the downlink power amplifying circuit to the MCU, the MCU is used for receiving the output power of the downlink power amplifying circuit, comparing the output power of the downlink power amplifying circuit with a set value, outputting a control signal to a downlink attenuation circuit and controlling the attenuation amount of the downlink attenuation circuit, thereby controlling the output power of the downlink power amplifying circuit; an uplink detection circuit is arranged between the MCU and the uplink power amplifying circuit and is used for detecting the output power of the uplink power amplifying circuit and transmitting the detected output power of the uplink power amplifying circuit to the MCU; the MCU is used for receiving the output power of the uplink power amplifying circuit, comparing the output power of the uplink power amplifying circuit with a set value, outputting a control signal to the uplink attenuation circuit, and controlling the attenuation of the uplink attenuation circuit, thereby controlling the output power of the uplink power amplifying circuit;

The uplink attenuation circuit and the downlink attenuation circuit have the same circuit structure, the downlink attenuation circuit comprises a PIN diode D1-1, a PIN diode D1-2, a PIN diode D2-1 and a PIN diode D2-2, the anode of the PIN diode D1-1 is grounded through a 25 th capacitor C25, the anode of the PIN diode D2-2 is grounded through a 26 th capacitor C26, the anode of the PIN diode D1-1 is connected with one end of a 23 th resistor R23 through a 19 th resistor R19, the anode of the PIN diode D2-2 is connected with one end of the 23 th resistor R23 through a 20 th resistor R20, the other end of the 23 rd resistor R23 is connected with a 5V power supply, the other end of the 23 rd resistor R23 is connected with the 5V power supply through a 7 th inductor L7, and the other end of the 23 th resistor R23 is grounded through a 41 th capacitor C41; the anode of the PIN diode D1-2 is connected with the anode of the PIN diode D2-1 and then is connected with one end of a 6 th inductor L6, the other end of the 6 th inductor L6 is connected with the MCU, the other end of the 6 th inductor L6 is grounded through a 45 th capacitor C45, and the two ends of the 45 th capacitor C45 are connected with a 46 th capacitor C46 in parallel; the cathode of the PIN diode D1-1 is connected with the cathode of the PIN diode D1-2 and then grounded through a 5 th resistor R5, and a node of the connection of the cathode of the PIN diode D1-1 and the cathode of the PIN diode D1-2 is an input end of a downlink attenuation circuit; the cathode of the PIN diode D2-2 is connected with the cathode of the PIN diode D2-1 and then grounded through a 6 th resistor R6, and the node of the connection between the cathode of the PIN diode D2-2 and the cathode of the PIN diode D2-1 is the output end of the downlink attenuation circuit.

2. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 1, wherein: the up-going pre-amplifying and filtering circuit and the down-going pre-amplifying and filtering circuit have the same circuit structure, the down-going pre-amplifying and filtering circuit comprises a high-gain HEMT amplifying element U6, the grid electrode of the high-gain HEMT amplifying element U6 is connected with a first radio frequency switch, the two source electrodes of the high-gain HEMT amplifying element U6 are grounded, the grid electrode of the high-gain HEMT amplifying element U6 is connected with one end of a 4 th inductor L4, the other end of the 4 th inductor L4 is respectively connected with one end of a 43 th capacitor C43 and one end of a 24 th resistor R24, the other end of the 43 th capacitor C43 is grounded, the two ends of the 43 th capacitor C43 are connected with a 44 th capacitor C44 in parallel, the other end of the 24 th resistor R24 is respectively connected with one ends of a 21 st resistor R21 and a 25 th resistor R25, the other end of the 25 th resistor R25 is grounded, the other end of the 21 st resistor R21 is respectively connected with one ends of a 14 th resistor R14, a 15 th resistor R15 and a 28 th capacitor C28, the other end of the 28 th capacitor C28 is grounded, the other end of the 15 th resistor R15 is connected with a 5V power supply (the other end of the 15 th resistor R15 is connected with the 5V power supply through a 7 th inductor L7, the other end of the 15 th resistor R15 is grounded through a 29 th capacitor C29, two ends of the 29 th capacitor C29 are connected with a 30 th capacitor C30 in parallel, the other end of the 14 th resistor R14 is respectively connected with one ends of a 27 th capacitor C27 and a 1 st inductor L1, the other end of the 27 th capacitor C27 is grounded, the other end of the 1 st inductor L1 is respectively connected with the drain electrode of a high gain HEMT amplifying element U6 and one end of a 9 th resistor R9, the other end of the 9 th resistor R9 is connected with one end of a 17 th capacitor C17, the other end of the 17 th capacitor C17 is connected with an attenuation network, the output end of the attenuation network is connected with a first-stage downlink filter circuit, the output end of the first-stage downlink filter circuit is used for being connected with a downlink attenuation circuit, and the first-stage downlink filter circuit adopts a first acoustic surface filter F1.

3. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 2, wherein: an amplifying circuit is arranged between the output end of the first-stage downlink filter circuit and the input end of the downlink attenuation circuit, the amplifying circuit comprises an amplifier U3 with the model of SBB5089, the 1 st pin of the amplifier U3 of the SBB5089 is connected with the output end of the first-stage downlink filter circuit, the 4 th pin of the amplifier U3 of the SBB5089 is grounded, the 3 rd pin of the amplifier U3 of the SBB5089 is connected with the input end of the downlink attenuation circuit, the 3 rd pin of the amplifier U3 of the SBB5089 is connected with one end of a 2 nd inductor L2, the other end of the 2 nd inductor L2 is respectively connected with one end of a 31 st capacitor C31 and one end of a 16 th resistor R16, the other end of the 31 st capacitor C31 is connected with the 2 nd pin of the amplifier U3 of the SBB5089 in parallel, the two ends of the 31 st capacitor C32 are connected with a 5V power supply, the other end of the 16 th resistor R16 is connected with the 5V power supply through a 7 th inductor L7, the other end of the 16 th resistor R16 is connected with the 5V power supply through the two ends of a 33 th capacitor C33, and the two ends of the 16 th capacitor C33 are connected with the two ends of the capacitor C33 in parallel.

4. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 1, wherein: the circuit structures of the uplink power amplifying circuit and the downlink power amplifying circuit are the same; the downstream power amplifying circuit comprises a power amplifier module U5 with the model of SKY77768 and an amplifier U4 of an SBB5089, wherein the 1 st pin of the amplifier U4 of the SBB5089 is an input end of the downstream power amplifying circuit, the 4 th pin of the amplifier U4 of the SBB5089 is grounded, the 3 rd pin of the amplifier U4 of the SBB5089 is connected with the 2 nd pin of the power amplifier module U5 through an attenuation network, the 3 rd pin of the amplifier U4 of the SBB5089 is connected with one end of a 3 rd inductor L3, the other end of the 3 rd inductor L3 is respectively connected with a 35 th capacitor C35 and one end of a 17 th resistor R17, the other end of the 35 th capacitor C35 is connected with the 2 nd pin of the amplifier U4 of the SBB5089 in parallel, two ends of the 35 th capacitor C35 are connected with a 36 th capacitor C36, the other end of the 17 th resistor R17 is connected with a 5V power supply through a 7 th inductor L7 and a 5V power supply, the other end of the 17 th resistor R17 is connected with the 5V power supply through the two ends of the capacitor C38 and the two ends of the 17 th capacitor C38 are connected with the capacitor C42 in parallel; the 1 st pin and the 10 th pin of the power amplifier module U5 are connected with a 3.3V power supply, the 1 st pin and the 10 th pin of the power amplifier module U5 are connected and grounded through a 12 th capacitor C12, the two ends of the 12 th capacitor C12 are connected with a 13 th capacitor C13, a 14 th capacitor C14, a 15 th capacitor C15 and a 16 th capacitor C16 in parallel, the 9 th pin of the power amplifier module U5 is an output end of a downlink power amplifier circuit, the 8 th pin of the power amplifier module U5 is grounded through a 12 th resistor R12, the 7 th pin and the 11 th pin of the power amplifier module U5 are grounded, the 5 th pin of the power amplifier module U5 is respectively connected with one end of a 13 th resistor R13, an 18 th resistor R18 and one end of a 24 th capacitor C24, the other end of the 13 th resistor R13 is connected with the 3.3V power supply, and the other end of the 18 th resistor R18 and the other end of the 24 th capacitor C24 are grounded; the downlink detection circuit comprises a Schottky diode D3, the anode of the Schottky diode D3 is respectively connected with one ends of a 5 th inductor L5 and a 37 th capacitor C37, the other end of the 5 th inductor L5 is grounded, the other end of the 37 th capacitor C37 is connected with a 6 th pin of a power amplifier module U5, the cathode of the Schottky diode D3 is connected with an MCU, the cathode of the Schottky diode D3 is respectively connected with one ends of a 39 th capacitor C39 and a 22 th resistor R22, the other ends of the 39 th capacitor C39 and the 22 th resistor R22 are grounded, and the two ends of the 39 th capacitor C39 are connected with a 40 th capacitor C40 in parallel.

5. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 1, wherein: a second-stage downlink filter circuit is arranged between the downlink attenuation circuit and the downlink power amplification circuit, and the second-stage downlink filter circuit adopts a second sound surface filter F2 and a third sound surface filter F3 which are connected in series.

6. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 1, wherein: the second stage uplink filter circuit is arranged between the uplink attenuation circuit and the uplink power amplifying circuit, the second stage uplink filter circuit adopts a fifth acoustic surface filter F5 and a fourth acoustic surface filter F4, an amplifying circuit is arranged between the fifth acoustic surface filter F5 and the fourth acoustic surface filter F4, the amplifying circuit comprises an amplifier U12 with the model of SBB5089, the 1 st pin of the amplifier U12 of the SBB5089 is connected with the output end of the fifth acoustic surface filter F5, the 4 rd pin of the amplifier U12 of the SBB5089 is grounded, the 3 rd pin of the amplifier U12 of the SBB5089 is connected with the input end of the fourth acoustic surface filter F4, the 3 rd pin of the amplifier U12 of the SBB5089 is connected with one end of a 17 th inductor L17, the other end of the 17 th inductor L17 is respectively connected with one end of a 67 th capacitor C67 and one end of a 34 resistor R34, the other end of the 67C 67 capacitor C67 is connected with the 2 pin of the amplifier U12 of the SBB5089 in parallel with the end of the power supply C62, the other end of the second capacitor C62V 67 is connected with the other end of the power supply 34C 62V 62 through the end of the capacitor C67 of the capacitor C12 of the SBB5089, and the other end of the power supply 34C 62 is connected with the other end of the power supply 34 in parallel connection with the end of the capacitor C62V 62C 62.

7. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 1, wherein: the first radio frequency switch and the second radio frequency switch are both acoustic meter diplexers, and the acoustic meter diplexers are SD902AP2 in model.

8. The device for testing and transmitting adaptive data of signal strength of GPRS acquisition terminal according to claim 1, wherein: the MCU is connected with a display for displaying the intensity of the received signal.

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