CN107741660A - 像素驱动架构、显示面板及显示装置 - Google Patents
像素驱动架构、显示面板及显示装置 Download PDFInfo
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- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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Abstract
本发明公开了一种像素驱动架构、显示面板及显示装置,所述像素驱动架构包括由第一、二像素单元组成的像素组合,扫描线,数据线,栅极驱动器和源极驱动器,将奇数行像素组合第一像素单元连接一奇数行扫描线,第二像素单元连接奇数行扫描线的下一偶数行扫描线;偶数行像素组合第一像素单元连接奇数行扫描线的下两个偶数行扫描线,第二像素单元连接奇数行扫描线的下一奇数行扫描线,第一像素单元与第二像素单元连接相同数据线。
Description
技术领域
本发明涉及显示技术领域,特别是涉及一种像素驱动架构、显示面板及显示装置。
背景技术
由于薄膜晶体管液晶显示器(Thin Film Transistor Liquid Crystal Display,TFT-LCD)具有低辐射、体积小、能耗低等优点被广泛应用于各类电子信息产品上,与此同时人们对液晶显示装置的视角要求也逐渐提高,目前针对液晶显示装置的大视角问题,提出了利用像素单元的亮暗交替处理方案来改善视角,并采用数据线共享(Data LineSharing,DLS)架构降低生产过程中的制作成本。
如图1a所示现有的DLS大视角像素驱动架构,像素单元亮暗交替分布,数据线每14.8微秒驱动极性切换一次,结合图1b数据线D1的驱动电压变化为:H+到L+到L+到H+到H-到L-到L-到H-,存在H+到H-的切换,跨压较大,导致源极驱动器(Source Driver,SD)温度过高,切换点像素单元充电率较差,产生严重的暗纹,因此如何设计最佳的驱动架构来改善现有技术存在的上述缺陷是目前业界亟待解决的问题。
发明内容
本发明主要解决的技术问题是提供一种像素驱动架构、显示面板及显示装置,以实现满足大视角的同时并解决像素充电不足、源极驱动器温度过高及画面质量差的问题。
为解决上述技术问题,本发明采用的一个技术方案是:
提供一种像素驱动架构,包括:
像素组合,包括奇数行像素组合及偶数行像素组合,每一像素组合包括第一像素单元及第二像素单元;
扫描线,包括奇数行扫描线及偶数行扫描线,用于输出扫描信号给所述像素组合;
数据线,用于输出数据信号给所述像素组合;
栅极驱动器,通过所述扫描线与所述像素组合连接,用于输出所述扫描信号;
源极驱动器,通过所述数据线与所述像素组合连接,用于输出所述数据信号;
所述奇数行像素组合的每一像素组合的第一像素单元连接一奇数行扫描线,所述奇数行像素组合的每一像素组合的第二像素单元连接所述奇数行扫描线的下一个偶数行扫描线;所述偶数行像素组合的每一像素组合的第一像素单元连接所述奇数行扫描线的下两个偶数行扫描线,所述偶数行像素组合的第一像素组合的第二像素单元连接所述奇数行扫描线的下一个奇数行扫描线,每一像素组合的第一像素单元与第二像素单元连接相同的数据线。
为解决上述技术问题,本发明采用的另一个技术方案是:
提供一种显示面板,所述显示面板包括像素驱动架构,所述像素驱动架构包括:
像素组合,包括奇数行像素组合及偶数行像素组合,每一像素组合包括第一像素单元及第二像素单元;
扫描线,包括奇数行扫描线及偶数行扫描线,用于输出扫描信号给所述像素组合;
数据线,用于输出数据信号给所述像素组合;
栅极驱动器,通过所述扫描线与所述像素组合连接,用于输出所述扫描信号;
源极驱动器,通过所述数据线与所述像素组合连接,用于输出所述数据信号;
所述奇数行像素组合的每一像素组合的第一像素单元连接一奇数行扫描线,所述奇数行像素组合的每一像素组合的第二像素单元连接所述奇数行扫描线的下一个偶数行扫描线;所述偶数行像素组合的每一像素组合的第一像素单元连接所述奇数行扫描线的下两个偶数行扫描线,所述偶数行像素组合的第一像素组合的第二像素单元连接所述奇数行扫描线的下一个奇数行扫描线,每一像素组合的第一像素单元与第二像素单元连接相同的数据线。
为解决上述技术问题,本发明采用的另一个技术方案是:
提供一种显示装置,所述显示装置包括显示面板,所述显示面板包括像素驱动架构,所述像素驱动架构包括:
像素组合,包括奇数行像素组合及偶数行像素组合,每一像素组合包括第一像素单元及第二像素单元;
扫描线,包括奇数行扫描线及偶数行扫描线,用于输出扫描信号给所述像素组合;
数据线,用于输出数据信号给所述像素组合;
栅极驱动器,通过所述扫描线与所述像素组合连接,用于输出所述扫描信号;
源极驱动器,通过所述数据线与所述像素组合连接,用于输出所述数据信号;
所述奇数行像素组合的每一像素组合的第一像素单元连接一奇数行扫描线,所述奇数行像素组合的每一像素组合的第二像素单元连接所述奇数行扫描线的下一个偶数行扫描线;所述偶数行像素组合的每一像素组合的第一像素单元连接所述奇数行扫描线的下两个偶数行扫描线,所述偶数行像素组合的第一像素组合的第二像素单元连接所述奇数行扫描线的下一个奇数行扫描线,每一像素组合的第一像素单元与第二像素单元连接相同的数据线。
本发明的有益效果是:区别于现有技术的情况,本发明提供一种新的像素驱动架构、显示面板及显示装置,通过奇数行像素组合的每一像素组合的第一像素单元连接一奇数行扫描线,所述奇数行像素组合的每一像素组合的第二像素单元连接所述奇数行扫描线的下一个偶数行扫描线;所述偶数行像素组合的每一像素组合的第一像素单元连接所述奇数行扫描线的下两个偶数行扫描线,所述偶数行像素组合的第一像素组合的第二像素单元连接所述奇数行扫描线的下一个奇数行扫描线,每一像素组合的第一像素单元与第二像素单元连接相同的数据线,以实现满足大视角的同时解决像素充电不足、源极驱动器温度过高及画面质量差的问题。
附图说明
图1a是现有DLS大视角像素驱动架构示意图;
图1b是现有DLS大视角像素驱动架构数据线D1电压变化示意图;
图2a是本发明的像素驱动架构示意图;
图2b是本发明的像素驱动架构数据线D1电压变化示意图;
图3是本发明的显示面板的结构示意图;
图4是本发明的显示装置的结构示意图。
具体实施方式
下面结合附图和实施例对本发明进行详细的说明。
请参阅图2a,是本发明像素驱动架构示意图。
所述像素驱动架构包括:
像素组合10,包括奇数行像素组合及偶数行像素组合,每一像素组合包括第一像素单元11及第二像素单元12;
扫描线20,包括奇数行扫描线21及偶数行扫描线22,用于输出扫描信号给所述像素组合10;
数据线30,用于输出数据信号给所述像素组合;
栅极驱动器40,通过所述扫描线20与所述像素组合10连接,用于输出所述扫描信号;
源极驱动器50,通过所述数据线30与所述像素组合10连接,用于输出所述数据信号;
所述奇数行像素组合10的每一像素组合的第一像素单元11连接一奇数行扫描线21,所述奇数行像素组合10的每一像素组合的第二像素单元12连接所述奇数行扫描线21的下一个偶数行扫描线22;所述偶数行像素组合10的每一像素组合的第一像素单元11连接所述奇数行扫描线21的下两个偶数行扫描线22,所述偶数行像素组合10的第一像素组合的第二像素单元12连接所述奇数行扫描线21的下一个奇数行扫描线21,每一像素组合10的第一像素单元11与第二像素单元12连接相同的数据线30。
结合图2a和图2b,其中,数据线D1输入数据信号驱动极性为正,扫描线S1导通,数据线D1输入数据信号控制第一像素单元11为亮态,此时亮态第一像素单元11的电压为H+,扫描线S1扫描结束,扫描线S2导通,数据线D1输入数据信号控制第二像素单元12为暗态,此时暗态第二像素单元12的电压为L+,扫描线S2扫描结束,扫描线S3导通,数据线D1输入数据信号控制第二像素单元12为亮态,此时亮态第二像素单元12的电压为H+,扫描线S3扫描结束,扫描线S4导通,数据线D1输入数据信号控制第一像素单元11为暗态,此时暗态第一像素单元11的电压为L+,扫描线S4扫描结束,数据线D1切换驱动极性,扫描线S5导通,数据线D1输入数据信号控制第一像素单元11为亮态,此时亮态第一像素单元11的电压为H-,扫描线S5扫描结束,扫描线S6导通,数据线D1输入数据信号控制第二像素单元12为暗态,此时暗态第二像素单元12的电压为L-,扫描线S6扫描结束,扫描线S7导通,数据线D1输入数据信号控制第二像素单元12为亮态,此时亮态第二像素单元12的电压为H-,扫描线S7扫描结束,扫描线S8导通,数据线D1输入数据信号控制第一像素单元11为暗态,此时暗态第一像素单元11的电压为L-。
其中,数据线D1的驱动电压变化为:H+到L+到H+到L+到H-到L-到H-到L-,无充电不足的H+到H-切换,而仅出现H到L或者L到H的切换,跨压减少,解决像素充电率不足、源驱动器温度过高及画面质量差的问题。
请参阅图3,是本发明显示面板的结构示意图。所述显示面板包括上述所述的像素驱动架构,所述显示面板的其他器件及功能与现有显示面板的器件及功能相同在此不再赘述。
请参阅图4,是本发明显示装置的结构示意图。所述显示装置包括上述所述像素驱动架构,所述显示装置可以为液晶显示器(Liquid Crystal Display,LCD)或有机发光显示器(Organic Light Emitting Display,OLED),所述显示装置的其他器件及功能与现有显示装置的器件及功能相同,在此不再赘述。
本发明提供一种新的像素驱动架构、显示面板及显示装置,通过奇数行像素组合的每一像素组合的第一像素单元连接一奇数行扫描线,所述奇数行像素组合的每一像素组合的第二像素单元连接所述奇数行扫描线的下一个偶数行扫描线;所述偶数行像素组合的每一像素组合的第一像素单元连接所述奇数行扫描线的下两个偶数行扫描线,所述偶数行像素组合的第一像素组合的第二像素单元连接所述奇数行扫描线的下一个奇数行扫描线,每一像素组合的第一像素单元与第二像素单元连接相同的数据线,以实现满足大视角的同时解决像素充电不足、源极驱动器温度过高及画面质量差的问题。
以上所述仅为本发明的实施方式,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。
Claims (10)
1.一种像素驱动架构,其特征在于,包括:
像素组合,包括奇数行像素组合及偶数行像素组合,每一像素组合包括第一像素单元及第二像素单元;
扫描线,包括奇数行扫描线及偶数行扫描线,用于输出扫描信号给所述像素组合;
数据线,用于输出数据信号给所述像素组合;
栅极驱动器,通过所述扫描线与所述像素组合连接,用于输出所述扫描信号;
源极驱动器,通过所述数据线与所述像素组合连接,用于输出所述数据信号;
所述奇数行像素组合的每一像素组合的第一像素单元连接一奇数行扫描线,所述奇数行像素组合的每一像素组合的第二像素单元连接所述奇数行扫描线的下一个偶数行扫描线;所述偶数行像素组合的每一像素组合的第一像素单元连接所述奇数行扫描线的下两个偶数行扫描线,所述偶数行像素组合的第一像素组合的第二像素单元连接所述奇数行扫描线的下一个奇数行扫描线,每一像素组合的第一像素单元与第二像素单元连接相同的数据线。
2.根据权利要求1所述像素驱动架构,其特征在于,所述数据线包括若干奇数列数据线及若干偶数列数据线,所述奇数列数据线的驱动极性与相邻所述偶数列数据线的驱动极性相反。
3.根据权利要求1所述像素驱动架构,其特征在于,每一数据线的极性切换频率为14.8微秒。
4.一种显示面板,其特征在于,所述显示面板包括像素驱动架构,所述像素驱动架构包括:
像素组合,包括奇数行像素组合及偶数行像素组合,每一像素组合包括第一像素单元及第二像素单元;
扫描线,包括奇数行扫描线及偶数行扫描线,用于输出扫描信号给所述像素组合;
数据线,用于输出数据信号给所述像素组合;
栅极驱动器,通过所述扫描线与所述像素组合连接,用于输出所述扫描信号;
源极驱动器,通过所述数据线与所述像素组合连接,用于输出所述数据信号;
所述奇数行像素组合的每一像素组合的第一像素单元连接一奇数行扫描线,所述奇数行像素组合的每一像素组合的第二像素单元连接所述奇数行扫描线的下一个偶数行扫描线;所述偶数行像素组合的每一像素组合的第一像素单元连接所述奇数行扫描线的下两个偶数行扫描线,所述偶数行像素组合的第一像素组合的第二像素单元连接所述奇数行扫描线的下一个奇数行扫描线,每一像素组合的第一像素单元与第二像素单元连接相同的数据线。
5.根据权利要求4所述显示面板,其特征在于,所述数据线包括若干奇数列数据线及若干偶数列数据线,所述奇数列数据线的驱动极性与相邻所述偶数列数据线的驱动极性相反。
6.根据权利要求4所述显示面板,其特征在于,每一数据线的极性切换频率为14.8微秒。
7.一种显示装置,其特征在于,所述显示装置包括显示面板,所述显示面板包括像素驱动架构,所述像素驱动架构包括:
像素组合,包括奇数行像素组合及偶数行像素组合,每一像素组合包括第一像素单元及第二像素单元;
扫描线,包括奇数行扫描线及偶数行扫描线,用于输出扫描信号给所述像素组合;
数据线,用于输出数据信号给所述像素组合;
栅极驱动器,通过所述扫描线与所述像素组合连接,用于输出所述扫描信号;
源极驱动器,通过所述数据线与所述像素组合连接,用于输出所述数据信号;
所述奇数行像素组合的每一像素组合的第一像素单元连接一奇数行扫描线,所述奇数行像素组合的每一像素组合的第二像素单元连接所述奇数行扫描线的下一个偶数行扫描线;所述偶数行像素组合的每一像素组合的第一像素单元连接所述奇数行扫描线的下两个偶数行扫描线,所述偶数行像素组合的第一像素组合的第二像素单元连接所述奇数行扫描线的下一个奇数行扫描线,每一像素组合的第一像素单元与第二像素单元连接相同的数据线。
8.根据权利要求7所述显示装置,其特征在于,所述数据线包括若干奇数列数据线及若干偶数列数据线,所述奇数列数据线的驱动极性与相邻所述偶数列数据线的驱动极性相反。
9.根据权利要求7所述显示装置,其特征在于,每一数据线的极性切换频率为14.8微秒。
10.根据权利要求7所述显示装置,其特征在于,所述显示装置为LCD或OLED。
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