CN107704403A - A kind of device and method for optimizing the transmission of eutergum signal - Google Patents
A kind of device and method for optimizing the transmission of eutergum signal Download PDFInfo
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- CN107704403A CN107704403A CN201710900309.XA CN201710900309A CN107704403A CN 107704403 A CN107704403 A CN 107704403A CN 201710900309 A CN201710900309 A CN 201710900309A CN 107704403 A CN107704403 A CN 107704403A
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- slimline
- backboard
- mainboard
- interfaces
- cable
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
- G06F13/126—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0016—Inter-integrated circuit (I2C)
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- Engineering & Computer Science (AREA)
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Communication Control (AREA)
Abstract
The invention discloses a kind of device and method for optimizing the transmission of eutergum signal, circuit includes the cable of both mainboard, backboard and connection, it is characterized in that：The both ends of the cable connect mainboard respectively, corresponding slimline interfaces on backboard, and the multiple slimline interfaces in mainboard end are all connected with CPU I2C signal output parts, and I2C signals are sent to CPLD by backboard end by corresponding slimline interfaces.Method includes with backboard connecting mainboard by cable, and the both ends of the cable connect mainboard respectively, corresponding slimline interfaces on backboard；Multiple slimline interfaces at mainboard end are all connected with CPU I2C signal output parts, CPLD selects I2C passages to realize that I2C is parsed by the judgement to newly-increased slimline cables signal in place and according to set priority rule.Design structure of the present invention is simple, on the premise of cost is not increased, makes system configuration more flexible, and improve the reliability of system.
Description
Technical field
The present invention relates to field of computer technology, specifically a kind of device for optimizing the transmission of eutergum signal and side
Method.
Background technology
NVMe (Non-Volatile Memory express, nonvolatile memory standard) expands as a kind of new
Exhibition storage application protocol, because it has high IOPS (Input/Output Per Second, handling capacity), low latency, low-power consumption etc.
Advantage, PCIe SSD (PCIe, peripheral component interconnect express, one kind can be given full play to
High speed serialization computer expansion bus standard；SSD, Solid State Drives, solid state hard disc) performance, so as to enterprise-level,
In big data scene, more and more extensive application has been obtained.
NVMe SSD are communicated based on PCIe buses with CPU, and being used as carrier by high-speed cable and backboard realizes
Interconnect.As shown in figure 1, in back plate design, CPU HP_I2C signals connect generally by first slimline0 interface
CPLD on to backboard carries out parsing and realizes that NVMe SSD lightings control.
This mode needs first slimline interface cable to connect, if the cable is not connected or occurs unexpected
Situation causes link to disconnect, and the I2C signals at mainboard end will be unable to be delivered to backboard CPLD (Complex Programmable
Logic Device CPLDs), the NVMe SSD status lamps of other 3 normal works can not be by backboard
Control, while CPU does not receive the hard disk information in place at backboard end etc. yet.
The content of the invention
It is an object of the invention to provide a kind of device and method for optimizing the transmission of eutergum signal, for solving certain
Slimline interface cables are not connected or other link accident disconnections under, asking for I2C communications can not be carried out between eutergum
Topic.
The technical solution adopted for the present invention to solve the technical problems is：A kind of device for optimizing the transmission of eutergum signal,
Include mainboard, backboard and connection both cable, the both ends of the cable connect mainboard respectively, corresponding slimline on backboard
Interface, the multiple slimline interfaces in mainboard end are all connected with CPU I2C signal output parts, and backboard end passes through corresponding slimline
I2C signals are sent to CPLD by interface.
Further, the mainboard end slimline interfacing grounds, backboard end slimline interfaces pull-up, CPLD pass through inspection
Backboard end slimline interface level signals are surveyed, I2C signalling channels are gated.
Further, the backboard end slimline interfaces connect power vd D by pull-up resistor.
A kind of method for optimizing the transmission of eutergum signal, comprises the following steps：
Mainboard is connected with backboard by cable, the both ends of the cable connect mainboard, corresponding on backboard respectively
Slimline interfaces；
Multiple slimline interfaces at mainboard end are all connected with CPU I2C signal output parts, it is corresponding by backboard end
I2C signals are sent to CPLD by slimline interfaces.
Further, methods described also includes the step of backboard end gating I2C signals, and specific implementation process is：
By mainboard end slimline interfacing grounds, backboard end slimline interfaces pull-up；
CLPD is gated by detecting the height of backboard end slimline interface level signals to I2C passages.
Further, the backboard end slimline interfaces connect power vd D by pull-up resistor.
The effect provided in the content of the invention is only the effect of embodiment, rather than whole effects that invention is all, above-mentioned
A technical scheme in technical scheme has the following advantages that or beneficial effect：
1st, multiple slimline interfaces on mainboard are all connected with I2C signals, the slimline on corresponding backboard connects
Mouth is all connected with CPLD, and when slimline_0 interface faults, I2C communications can be still carried out between eutergum, ensures to calculate
The normal work of machine, and design structure is simple, on the premise of cost is not increased, makes system configuration more flexible, and improve
The reliability of system.
2nd, CPLD decision logics are provided with to the I2C passages of multiple slimline interfaces, ensure the normal orderly work of system
Make.Potential lifting image product and competitiveness.
Brief description of the drawings
Fig. 1 is eutergum connection diagram in the prior art；
Fig. 2 is that eutergum of the present invention interconnects topological sketch plan；
Fig. 3 is eutergum connection diagram in the present invention；
Fig. 4 is the schematic flow sheet of the inventive method.
Embodiment
For the technical characterstic for illustrating this programme can be understood, below by embodiment, and its accompanying drawing is combined, to this hair
It is bright to be described in detail.Following disclosure provides many different embodiments or example is used for realizing the different knots of the present invention
Structure.In order to simplify disclosure of the invention, hereinafter the part and setting of specific examples are described.In addition, the present invention can be with
Repeat reference numerals and/or letter in different examples.This repetition is that for purposes of simplicity and clarity, itself is not indicated
Relation between various embodiments are discussed and/or set.It should be noted that part illustrated in the accompanying drawings is not necessarily to scale
Draw.Present invention omits the description to known assemblies and treatment technology and process to avoid being unnecessarily limiting the present invention.
Following examples illustrate by taking the ports of NVMe 4 as an example, but are equally applicable to setting for other NVMe port number backboards
Meter improves.
As shown in Fig. 2 NVMe SSD are communicated based on PCIe buses with CPU, made by high-speed cable and backboard
Realize and interconnect for carrier.In the present invention, cable terminal (mainboard end) and corresponding mainboard/backboard high-speed interface (back of the body
Plate end) using the slimline interfaces for meeting SFF-9402 specifications, connection SSD hard disks end, which uses, meets connecing for SFF-8639 specifications
Mouthful.
In Fig. 1 back plate design, CPU I2C signals are connected to backboard generally by first slimline0 interface
On CPLD carry out parsing realize NVMe SSD lightings control.
As shown in figure 3, a kind of device of optimization eutergum signal transmission of the present invention, including mainboard, backboard and connection two
The cable (cable) of person, the both ends of cable connect mainboard respectively, corresponding slimline interfaces on backboard, such as mainboard end
The slimline_0 interfaces at slimline_0 interfaces connection backboard end.Slimline interfaces on mainboard end are all connected with CPU I2C
I2C signals are sent to CPLD by signal output part, backboard end by corresponding slimline interfaces.I.e. 4 I2C passages are all connected with
To CPLD.Now, even if occurring first or having some other cables not connect, the I2C signals at mainboard end still have physics
Path is connected to backboard, does not influence both communication.
There are 4 I2C passages to be connected to CPLD, it is necessary to which CPLD selector channels are parsed.The solution of the present embodiment
It is that (CPRNT is Cable Present abbreviation to selection 1pin CPRNT#, and #, which represents this signal, is in slimline interfaces
Low level is effective) it is set as cable judgement signal whether in place, and it is connected to CPLD.Specific implementation is mainboard end
Slimline meets GND, backboard end slimline pull-up (high level), connects power vd D by pull-up resistor and realizes pull-up.If have
Cable inserts, and the backboard end pin is then changed into low level, and CPLD receives the signal step-down, that is, knows that the interface has cable insertion.
CPLD carries out I2C channel selectings, priority by monitoring the cable signal condition in place of 4 slimline interfaces
Reduced successively from slimline_0 to slimline_3.The CPRNT# level that CPLD passes through 4 slimline interfaces of reading
Know whether cable is (insertion) in place.It is actual only one group of I2C to be selected to be parsed.For example, if detecting
Slimline_0 cables are inserted, then parse slimline_0 I2C signals, and remaining I2C passage is disregarded；If slimline_0
Inserted without cable, and detect that slimline_1 has insertion, then parse slimline_1 I2C, the like.So as to realize
CPLD parses passage by judging that cable situation in place automatically selects I2C, solves and cable is connected in design before improving
The restricted problem of port.Certain slimline priority can customize, within the scope of the present invention.
As shown in figure 4, a kind of method of optimization eutergum signal transmission of the present invention, comprises the following steps：
S1, mainboard is connected with backboard by cable, the both ends of the cable connect mainboard, corresponding on backboard respectively
Slimline interfaces；
S2, multiple slimline interfaces at mainboard end are all connected with CPU I2C signal output parts, it is corresponding by backboard end
Slimline interfaces I2C signals are sent to CPLD.
In step S1, connection mainboard and the slimline interfaces of backboard are mutually corresponding, such as mainboard ends
The corresponding slimline_0 interfaces in slimline_0 interfaces connection backboard end.
In step S2, the slimline interfaces on mainboard end are all connected with CPU I2C signal output parts, and backboard end passes through phase
I2C signals are sent to CPLD by the slimline interfaces answered.I.e. 4 I2C passages are all connected to CPLD.Now, even if occurring the
One or there are some other cables not connect, the I2C signals at mainboard end still have physical path to be connected to backboard, do not influence two
The communication of person.
After the operation of step S1, S2, there are 4 I2C passages to be connected to CPLD, now need CPLD selector channels to enter
Row parsing.The solution of the present embodiment is that (CPRNT is Cable to selection 1pin CPRNT# in slimline interfaces
Present abbreviation, it is that low level is effective that #, which represents this signal) it is set as cable judgement signal whether in place, and be connected to
CPLD.Specific implementation is that mainboard end slimline connects GND, backboard end slimline pull-up (high level), by pulling up electricity
Resistance connection power vd D realizes pull-up.If there is cable insertion, the backboard end pin is then changed into low level, and CPLD receives signal change
It is low, that is, know that the interface has cable insertion.
CPLD carries out I2C channel selectings, priority by monitoring the cable signal condition in place of 4 slimline interfaces
Reduced successively from slimline_0 to slimline_3.The CPRNT# level that CPLD passes through 4 slimline interfaces of reading
Know whether cable is (insertion) in place.It is actual only one group of I2C to be selected to be parsed.For example, if detecting
Slimline_0 cables are inserted, then parse slimline_0 I2C signals, and remaining I2C passage is disregarded；If slimline_0
Inserted without cable, and detect that slimline_1 has insertion, then parse slimline_1 I2C signals, the like.So as to real
Existing CPLD parses passage by judging that cable situation in place automatically selects I2C, solves and cable is connected in design before improving
Connect the restricted problem of port.Certain slimline priority can customize, within the scope of the present invention.
Simply the preferred embodiment of the present invention described above, for those skilled in the art,
Without departing from the principles of the invention, some improvements and modifications can also be made, these improvements and modifications are also regarded as this hair
Bright protection domain.
Claims (6)
1. a kind of device for optimizing the transmission of eutergum signal, include the cable of both mainboard, backboard and connection, it is characterized in that：Institute
The both ends for stating cable connect mainboard respectively, corresponding slimline interfaces on backboard, and the multiple slimline interfaces in mainboard end connect
CPU I2C signal output parts are connect, I2C signals are sent to CPLD by backboard end by corresponding slimline interfaces.
2. a kind of device for optimizing the transmission of eutergum signal according to claim 1, it is characterized in that：The mainboard end
Slimline interfacing grounds, backboard end slimline interfaces pull-up, CPLD are believed by detecting backboard end slimline interface levels
Number, I2C signalling channels are gated.
3. a kind of device for optimizing the transmission of eutergum signal according to claim 2, it is characterized in that：The backboard end
Slimline interfaces connect power vd D by pull-up resistor.
4. a kind of method for optimizing the transmission of eutergum signal, it is characterized in that：Comprise the following steps：
Mainboard is connected with backboard by cable, the both ends of the cable connect mainboard respectively, corresponding slimline on backboard
Interface；
Multiple slimline interfaces at mainboard end are all connected with CPU I2C signal output parts, it is corresponding by backboard end
I2C signals are sent to CPLD by slimline interfaces.
5. a kind of method for optimizing the transmission of eutergum signal according to claim 4, it is characterized in that：Methods described also includes
Backboard end gates the step of I2C signals, and specific implementation process is：
By mainboard end slimline interfacing grounds, backboard end slimline interfaces pull-up；
CLPD is gated by detecting the height of backboard end slimline interface level signals to I2C passages.
6. a kind of method for optimizing the transmission of eutergum signal according to claim 5, it is characterized in that：The backboard end
Slimline interfaces connect power vd D by pull-up resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710900309.XA CN107704403B (en) | 2017-09-28 | 2017-09-28 | Device and method for optimizing signal transmission of main back plate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710900309.XA CN107704403B (en) | 2017-09-28 | 2017-09-28 | Device and method for optimizing signal transmission of main back plate |
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| Publication Number | Publication Date |
|---|---|
| CN107704403A true CN107704403A (en) | 2018-02-16 |
| CN107704403B CN107704403B (en) | 2021-05-25 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201710900309.XA Active CN107704403B (en) | 2017-09-28 | 2017-09-28 | Device and method for optimizing signal transmission of main back plate |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110825679A (en) * | 2019-11-08 | 2020-02-21 | 苏州浪潮智能科技有限公司 | Backboard information acquisition method, equipment and storage medium |
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| Publication number | Publication date |
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| CN107704403B (en) | 2021-05-25 |
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