CN107665945A - A kind of resistive random access memory and its manufacture method - Google Patents

A kind of resistive random access memory and its manufacture method Download PDF

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Publication number
CN107665945A
CN107665945A CN201610607593.7A CN201610607593A CN107665945A CN 107665945 A CN107665945 A CN 107665945A CN 201610607593 A CN201610607593 A CN 201610607593A CN 107665945 A CN107665945 A CN 107665945A
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CN
China
Prior art keywords
dielectric layer
cushion
manufacture method
random access
access memory
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CN201610607593.7A
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Chinese (zh)
Inventor
邹陆军
杨芸
仇圣棻
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Priority to CN201610607593.7A priority Critical patent/CN107665945A/en
Publication of CN107665945A publication Critical patent/CN107665945A/en
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)

Abstract

An aspect of of the present present invention provides a kind of manufacture method of resistive random access memory, comprises the following steps:Substrate is provided;Dielectric layer is formed on the substrate;Cushion is formed on the dielectric layer;Opening is formed in the cushion and the dielectric layer;Bottom electrode is formed in said opening.Another aspect of the present invention provides a kind of resistive random access memory manufactured using above-mentioned manufacture method.The resistive random access memory and its manufacture method of the present invention, by adding cushion between dielectric layer and electrode, can strengthen the degree of adhesion of electrode and alleviate high pressure, so as to effectively prevent electrode delamination.

Description

A kind of resistive random access memory and its manufacture method
Technical field
The present invention relates to memory area, in particular to a kind of resistive random access memory and its manufacture method.
Background technology
In memory area, resistive random access memory (RRAM) is as a kind of new, non-easy with bright prospects The property lost memory technology, it easily reduces (can be contracted to 1nm magnitudes) compatible with logic process, in recent years Cause extensive research and development upsurge.
Existing RRAM continues to use the structure of insertion change resistance layer among simple two metal electrode always, i.e., metal-change resistance layer- The structure of metal (MIM).Because RRAM is usually inserted in the back-end process (BEOL) of copper-connection, and the material of metal electrode Usually using titanium nitride (TiN) or tantalum nitride (TaN), technical staff has found that (material is usual when TiN or TaN is deposited on dielectric layer For the carborundum (NDC) or carbonado (BD) of nitrating) on when, TiN or TaN are easy to fall off phenomenon.
Therefore, it is necessary to a kind of new resistive random access memory and its manufacture method are proposed, to solve existing technology Problem.
The content of the invention
A series of concept of reduced forms is introduced in Summary, this will enter in specific embodiment part One step describes in detail.The Summary of the present invention is not meant to attempt to limit technical scheme claimed Key feature and essential features, the protection domain for attempting to determine technical scheme claimed is not meant that more.
In order to overcome the problem of presently, there are, one aspect of the present invention provides a kind of manufacture method of resistive random access memory, Including:
Substrate is provided;
Dielectric layer is formed on the substrate;
Cushion is formed on the dielectric layer;
Opening is formed in the cushion and the dielectric layer;
Bottom electrode is formed in said opening.
Illustratively, method is ald or chemical vapor deposition used by forming cushion on the dielectric layer Product.
Illustratively, the material silicon nitride of the cushion.
Illustratively, method is ald or chemical vapor deposition used by forming dielectric layer on the substrate.
Illustratively, the material of the dielectric layer is the carborundum or carbonado of nitrating.
Illustratively, the material of the bottom electrode includes titanium nitride or tantalum nitride.
Further, in addition to the step of forming resistive material layer is being deposited on the bottom electrode.
Further, in addition in the resistive material layer formed Top electrode the step of.
According to another aspect of the present invention, a kind of resistive random access memory is additionally provided, including:
Substrate;
Dielectric layer, it is formed in substrate;
Cushion, it is formed on the dielectric layer;
Opening, is formed in the cushion and the dielectric layer;
Bottom electrode, it is formed in the opening.
Illustratively, the material of the cushion is silicon nitride.
The resistive random access memory and its manufacture method of the present invention, due to the addition of cushion, cushion can effectively increase Add degree of adhesion and alleviate pressure, therefore can prevent metal electrode from coming off well.
Brief description of the drawings
The drawings below of the present invention is used to understand the present invention in this as the part of the present invention.Shown in the drawings of this hair Bright embodiment and its description, for explaining the principle of the present invention.
In accompanying drawing:
Fig. 1 is the profile of the structure after RRAM insertions back-end process in current technique;
Fig. 2A-Fig. 2 G are the knots formed after the completion of a kind of each step of RRAM according to embodiments of the present invention manufacture method The profile of structure;
Fig. 3 is a kind of flow chart of the RRAM proposed according to embodiments of the present invention manufacture method.
Embodiment
In the following description, a large amount of concrete details are given to provide more thorough understanding of the invention.So And it is obvious to the skilled person that the present invention can be able to without one or more of these details Implement.In other examples, in order to avoid obscuring with the present invention, do not enter for some technical characteristics well known in the art Row description.
It should be appreciated that the present invention can be implemented in different forms, and it should not be construed as being limited to what is proposed here Embodiment.On the contrary, providing these embodiments disclosure will be made thoroughly and complete, and will fully convey the scope of the invention to Those skilled in the art.In the accompanying drawings, for clarity, the size and relative size in Ceng He areas may be exaggerated.From beginning to end Same reference numerals represent identical element.
It should be understood that when element or layer be referred to as " ... on ", " with ... it is adjacent ", " being connected to " or " being coupled to " other members When part or layer, its can directly on other elements or layer, it is adjacent thereto, be connected or coupled to other elements or layer, or There may be element or layer between two parties.On the contrary, when element be referred to as " on directly existing ... ", " with ... direct neighbor ", " be directly connected to To " or when " being directly coupled to " other elements or layer, then element or layer between two parties is not present.It should be understood that although art can be used Language first, second, third, etc. describe various elements, part, area, floor and/or part, these elements, part, area, floor and/or portion Dividing to be limited by these terms.These terms are used merely to distinguish an element, part, area, floor or part and another Element, part, area, floor or part.Therefore, do not depart from present invention teach that under, the first element discussed below, part, area, Floor or part are represented by the second element, part, area, floor or part.
Spatial relationship term for example " ... under ", " ... below ", " below ", " ... under ", " ... on ", " above " etc., herein can for convenience description and by using so as to describe an element shown in figure or feature with it is other The relation of element or feature.It should be understood that in addition to the orientation shown in figure, spatial relationship term be intended to also including the use of with The different orientation of device in operation.For example, if the device upset in accompanying drawing, then, is described as " below other elements " Or " under it " or " under it " element or feature will be oriented to other elements or feature " on ".Therefore, exemplary term " ... below " and " ... under " it may include upper and lower two orientations.Device, which can be additionally orientated, (to be rotated by 90 ° or other takes To) and spatial description language as used herein correspondingly explained.
The purpose of term as used herein is only that description specific embodiment and not as the limitation of the present invention.Make herein Used time, " one " of singulative, "one" and " described/should " be also intended to include plural form, unless context is expressly noted that separately Outer mode.It is also to be understood that term " composition " and/or " comprising ", when in this specification in use, determining the feature, whole Number, step, operation, the presence of element and/or part, but be not excluded for one or more other features, integer, step, operation, The presence or addition of element, part and/or group.Herein in use, term "and/or" includes any and institute of related Listed Items There is combination.
In order to thoroughly understand the present invention, detailed structure and step will be proposed in following description, to explain this Invent the technical scheme proposed.Presently preferred embodiments of the present invention is described in detail as follows, but in addition to these detailed descriptions, this hair It is bright to have other embodiment.
Existing RRAM continues to use the structure of insertion change resistance layer among simple two metal electrode always, i.e., metal-change resistance layer- The structure of metal (MIM).RRAM is usually inserted in the back-end process (BEOL) of copper-connection, and the material of metal electrode is usual Use titanium nitride (TiN) or tantalum nitride (TaN).It is the structure that RRAM is inserted after back-end process in current technique as shown in Figure 1 Profile.Technical staff has found that (material is usually the carborundum (NDC) or black of nitrating when TiN or TaN is deposited on dielectric layer Diamond (BD)) on when, due to adhering to the effect of very poor and high pressure, TiN or TaN are easy to fall off phenomenon.
In order to solve the above-mentioned technical problem, the invention provides a kind of manufacture method of resistive random access memory, such as Fig. 3 institutes Show, comprise the following steps:
Step S0:Substrate is provided;
Step S1:Dielectric layer is formed on the substrate;
Step S2:Cushion is formed on the dielectric layer;
Step S3:Opening is formed in the cushion and the dielectric layer;
Step S4:Bottom electrode is formed in said opening.
Further, the manufacture method of the resistive random access memory also comprises the following steps:
Step S5:Resistive material layer is formed on the bottom electrode;
Step S6:Top electrode is formed in the resistive material layer.
The resistive random access memory manufactured using the method for the present invention, due to the addition of cushion, cushion can be effective Increase degree of adhesion simultaneously alleviates pressure, therefore can prevent metal electrode from coming off well.
Describe the resistive random access memory and its manufacture method of the present invention in detail with reference to specific embodiment.
Embodiment 1
Below, reference picture 2A-2G describes an example of the manufacture method of resistive random access memory proposed by the present invention The detailed step of property method.Wherein Fig. 2A-Fig. 2 G are a kind of according to embodiments of the present invention 1 resistive random access memory (RRAM) The profile of the structure formed after the completion of each step of manufacture method.
The manufacture method for the RRAM that the present embodiment provides, specifically comprises the following steps:
Step S0:Substrate 200 is provided, structure is as shown in Figure 2 A.
The substrate 200 can be silicon substrate, can be semiconductor devices IMD (metal intermetallic dielectric layer) or its The substrate of his material.Embodiments of the invention are not defined to shape, structure, material of substrate 200 etc..
Step S1:Dielectric layer 210 is formed in the substrate 200, the structure after formation is as shown in Figure 2 B.
Illustratively, the material of dielectric layer 210 can be the carborundum (NDC) of nitrating, or carbonado (BD), also Can be other dielectric materials.Ald (ALD) or chemical vapor deposition can be used by forming the dielectric layer 210 (CVD) the methods of.In this embodiment, it is preferred that the material of dielectric layer 210 is NDC or BD, using chemical vapor deposition CVD Method is formed, and thickness is 2nm~50nm.The material of above-mentioned dielectric layer and the method and step for forming dielectric layer have been this area skill Known to art personnel, it is not described in detail herein.
Step S2:Cushion 220 is formed on the dielectric layer 210, the structure after formation is as shown in Figure 2 C.
Illustratively, the cushion 220 can be thin SiN (silicon nitride) layer, and thickness isCushion 220 Material can also be the cushioning layer material known to other skilled in the art, such as GaN (gallium nitride), NiFe (nickel iron) Deng.Illustratively, the methods of cushion 220 can use ald (ALD) or chemical vapor deposition (CVD) is formed.
Step S3:Opening 230, structure such as Fig. 2 D after formation are formed in the cushion 220 and the dielectric layer 210 It is shown.
Illustratively, the step of being open 230 being formed in the cushion 220 and the dielectric layer 210 can be:Buffering The photoresist of a pattern layers is formed on layer 220, to be formed on the photoresist covering cushion 220 of the patterning beyond bottom electrode Region;By etch remove region on the cushion 220 and the dielectric layer 210 that the photoresist that is not patterned covers with Form opening 230.
Wherein, illustratively, the etching can be dry etching or wet etching.It is, of course, also possible to using this area skill Other method known to art personnel is performed etching to cushion 220 and dielectric layer 210 to form opening 230, no longer superfluous herein State.
Step S4:Bottom electrode 240 is formed in the opening 230, the structure after formation is as shown in Figure 2 E.
Illustratively, can be the step of formation bottom electrode 240 in the opening 230:The deposited metal in opening 230; (CMP) processing is chemically-mechanicapolish polished, removes the metal overflowed in opening, forms the bottom electrode positioned at the opening 230 240。
Wherein, illustratively, the material of the metal can be TiN (titanium nitride) or TaN (tantalum nitride).Certainly, the gold The material of category can also be other electrode materials known to described in those skilled in the art, will not be repeated here.
So far the creation of the present invention is completed, however, in order to manufacture complete resistive random access memory, the present invention can also enter One step comprises the following steps.
Step S5:Resistive material layer 250 is formed on the bottom electrode 240, the structure after formation is as shown in Figure 2 F.
Illustratively, sputtering (Sputtering), chemical vapor deposition can be used by forming the resistive material layer 250 (CVD), the methods of pulsed laser deposition (PLD), electron beam evaporation, atomic layer deposition (ALD).Illustratively, the resistive material The material of layer 250 can be transiton metal binary oxides (TMO), such as NiO, TiO2、ZnO;Solid electrolyte, such as Ag2S、 GeSe;Perovskite structure compound;Nitride;Non-crystalline silicon and organic dielectric material.Illustratively, can be to resistive material layer 250 material carries out ion doping, introduces nano-crystalline granule, or improves interfacial characteristics (for example, being moved back in the hydrogen gas atmosphere Fire) etc., to improve the performance of resistive random access memory.
Step S6:Top electrode 260 is formed in the resistive material layer 250, the structure after formation is as shown in Figure 2 G.
Illustratively, can be in the step of formation Top electrode 260 in the resistive material layer 250:In the resistive material Deposited metal layer on layer 250, the photoresist of a pattern layers, the photoresist covering metal level of the patterning are formed in the metal level On to form the region of Top electrode;By etching the region on the metal level for removing the photoresist not being patterned covering, to remaining Under the metal level not being etched chemically-mechanicapolish polished (CMP) handle to remove photoresist, that is, formed be located at resistive material Top electrode 260 on layer 250.
Wherein, illustratively, the etching can be dry etching or wet etching.It is, of course, also possible to using this area skill Other method known to art personnel is performed etching to metal level to form Top electrode 260, will not be repeated here.
Wherein, illustratively, the material of the metal can be traditional metal simple-substance, such as Au, Pt, Cu, Al.Certainly, The material of the metal can also be other electrode materials known to described in those skilled in the art, will not be repeated here.
Embodiment 2
Embodiments of the invention 2 provide a kind of resistive random access memory, can use manufacturer's legal system described in embodiment 1 .Its concrete structure is as follows:
Substrate 200;
The dielectric layer 210 being formed in substrate 200;
The cushion 220 being formed on the dielectric layer 210;
The opening 230 being formed in the cushion 220 and the dielectric layer 210;
The bottom electrode 240 being formed in opening 230.
Further, the resistive random access memory also includes having structure:
The resistive material layer 250 being formed on the bottom electrode 240;
The Top electrode 260 being formed in the resistive material layer 250.
Wherein, the substrate can be silicon substrate, can be the IMD (metal intermetallic dielectric layer) of semiconductor devices, can also It is the substrate of other materials.
Wherein, the material of dielectric layer 210 can be the carborundum (NDC) of nitrating, or carbonado (BD), may be used also Think other dielectric materials, thickness is 2nm~50nm.
Wherein, the cushion 220 can be thin SiN (silicon nitride) layer, and thickness isThe material of cushion 220 Expect can also to be the cushioning layer material known to other skilled in the art, such as GaN (gallium nitride), NiFe (nickel iron) Deng.
Wherein, the material of the bottom electrode can be TiN (titanium nitride) or TaN (tantalum nitride).Certainly, the material of the metal Material can also be other electrode materials known to described in those skilled in the art, will not be repeated here.
Illustratively, the material of the resistive material layer 250 can be transiton metal binary oxides (TMO), as NiO, TiO2、ZnO;Solid electrolyte, such as Ag2S、GeSe;Perovskite structure compound;Nitride;Non-crystalline silicon and organic media material Material.Illustratively, ion doping can be carried out to the material of resistive material layer 250, introduce nano-crystalline granule, or improve interfacial characteristics (for example, being annealed in the hydrogen gas atmosphere) etc., to improve the performance of resistive random access memory.
Illustratively, the material of the Top electrode 260 can be traditional metal simple-substance, such as Au, Pt, Cu, Al.Certainly, The material of the metal can also be other electrode materials known to described in those skilled in the art, will not be repeated here.
The resistive random access memory and its manufacture method of the present invention, by adding cushion between dielectric layer and electrode, The degree of adhesion of electrode can be strengthened and alleviate high pressure, so as to effectively prevent electrode delamination.
The present invention is illustrated by above-described embodiment, but it is to be understood that, above-described embodiment is only intended to Citing and the purpose of explanation, and be not intended to limit the invention in described scope of embodiments.In addition people in the art Member can also make more kinds of it is understood that the invention is not limited in above-described embodiment according to the teachings of the present invention Variants and modifications, these variants and modifications are all fallen within scope of the present invention.Protection scope of the present invention by The appended claims and its equivalent scope are defined.

Claims (10)

1. a kind of manufacture method of resistive random access memory, it is characterised in that comprise the following steps:
Substrate is provided;
Dielectric layer is formed on the substrate;
Cushion is formed on the dielectric layer;
Opening is formed in the cushion and the dielectric layer;
Bottom electrode is formed in said opening.
2. manufacture method as claimed in claim 1, it is characterised in that side used by cushion is formed on the dielectric layer Method is ald or chemical vapor deposition.
3. manufacture method as claimed in claim 1, it is characterised in that the material of the cushion includes silicon nitride.
4. manufacture method as claimed in claim 1, it is characterised in that form method used by dielectric layer on the substrate For ald or chemical vapor deposition.
5. manufacture method as claimed in claim 1, it is characterised in that the material of the dielectric layer is the carborundum or black of nitrating Diamond.
6. manufacture method as claimed in claim 1, it is characterised in that the material of the bottom electrode includes titanium nitride or nitridation Tantalum.
7. manufacture method as claimed in claim 1, it is characterised in that also include the deposition on the bottom electrode and form resistive material The step of bed of material.
8. manufacture method as claimed in claim 7, it is characterised in that also include forming Top electrode in the resistive material layer The step of.
A kind of 9. resistive random access memory, it is characterised in that including:
Substrate;
Dielectric layer, it is formed in substrate;
Cushion, it is formed on the dielectric layer;
Opening, is formed in the dielectric layer and the cushion;
Bottom electrode, it is formed in the opening.
10. resistive random access memory as claimed in claim 9, it is characterised in that the material of the cushion is silicon nitride.
CN201610607593.7A 2016-07-28 2016-07-28 A kind of resistive random access memory and its manufacture method Pending CN107665945A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021097894A1 (en) * 2019-11-19 2021-05-27 中国科学院微电子研究所 Method for preparing ag2s thin film

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Publication number Priority date Publication date Assignee Title
TW200725698A (en) * 2005-12-26 2007-07-01 Ind Tech Res Inst MIM capacitor structure and method of manufacturing the same
CN103715353A (en) * 2012-09-28 2014-04-09 台湾积体电路制造股份有限公司 Resistance variable memory structure and method of forming the same
CN104576926A (en) * 2013-10-25 2015-04-29 华邦电子股份有限公司 Resistive random access memory and manufacturing method thereof
US20160087199A1 (en) * 2014-09-24 2016-03-24 Winbond Electronics Corp. Resistive random access memory device and method for fabricating the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200725698A (en) * 2005-12-26 2007-07-01 Ind Tech Res Inst MIM capacitor structure and method of manufacturing the same
CN103715353A (en) * 2012-09-28 2014-04-09 台湾积体电路制造股份有限公司 Resistance variable memory structure and method of forming the same
CN104576926A (en) * 2013-10-25 2015-04-29 华邦电子股份有限公司 Resistive random access memory and manufacturing method thereof
US20160087199A1 (en) * 2014-09-24 2016-03-24 Winbond Electronics Corp. Resistive random access memory device and method for fabricating the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021097894A1 (en) * 2019-11-19 2021-05-27 中国科学院微电子研究所 Method for preparing ag2s thin film
CN112899654A (en) * 2019-11-19 2021-06-04 中国科学院微电子研究所 Ag2Preparation method of S film

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Application publication date: 20180206