CN107658262B - Three-dimensional through silicon via vertical interconnection method based on graphene composite structure - Google Patents
Three-dimensional through silicon via vertical interconnection method based on graphene composite structure Download PDFInfo
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- CN107658262B CN107658262B CN201710899647.6A CN201710899647A CN107658262B CN 107658262 B CN107658262 B CN 107658262B CN 201710899647 A CN201710899647 A CN 201710899647A CN 107658262 B CN107658262 B CN 107658262B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
Abstract
The invention discloses a three-dimensional through silicon via vertical interconnection method based on a graphene composite structure, which comprises the steps of manufacturing a silicon via on a silicon substrate; depositing an insulating layer on the surface of the silicon substrate and the inner wall of the silicon hole; depositing a barrier layer on the insulating layer, and depositing a catalytic metal layer on the barrier layer; growing a graphene composite structure layer on the surface of the catalytic metal layer; pasting a dry film on the surface of the graphene composite structure layer on the silicon substrate, exposing and developing to form a dry film layer; depositing a seed layer on the bottom surface of the silicon hole and the surface of the dry film layer; and filling the silicon hole with a conductive material. According to the method, holes are formed in a silicon substrate, an insulating layer, a barrier layer and a catalytic metal layer are sequentially deposited, a graphene composite structure layer is grown, a dry film is attached, a seed layer is deposited and then a conductive material is filled, and the problem of high-frequency signal electromagnetic coupling crosstalk of a 3D TSV structure is solved by utilizing good thermodynamic, mechanical and material characteristics of the graphene material.
Description
Technical Field
The invention relates to a vertical interconnection method of through silicon vias, in particular to a three-dimensional vertical interconnection method of through silicon vias based on a graphene composite structure, and belongs to the technical field of microelectronic packaging.
Background
The three-dimensional packaging technology fully utilizes the space in the z direction, greatly reduces the interconnection length, improves the packaging density, reduces the power consumption and has higher chip function integration level. Through Silicon Via (TSV) technology realizes signal interconnection of multilayer planar devices in the z-axis direction by making vertical vias in a wafer or chip and filling metal in the vias. The TSV technology has been widely studied in the industry because of its distinctive process characteristics.
For the highly dense TSV structure with small aperture and high depth-to-width ratio, electromagnetic wave transverse transmission occurs in the TSV array, the number of TSV channels which can be affected is increased, the interference strength is obviously increased, strong electromagnetic coupling exists between adjacent interconnection structures, the crosstalk and distortion equivalent effects are obviously enhanced, the crosstalk is an important problem in interconnection line application, and causes signal delay and crosstalk noise, so that the performance of a circuit is affected. In addition, high heat flux density causes thermal coupling aggravation, electric signal distortion, delay and loss, and magnetic state changes at high temperature seriously affect signal transmission and are difficult to regulate and control.
Disclosure of Invention
Aiming at the problems in the prior art, the invention provides a three-dimensional through silicon via vertical interconnection method based on a graphene composite structure, which solves the problem of high-frequency signal electromagnetic coupling crosstalk of a 3D TSV structure by utilizing good thermodynamic, mechanical and material characteristics of graphene.
In order to achieve the purpose, the invention adopts the technical scheme that: a three-dimensional through silicon via vertical interconnection method based on a graphene composite structure comprises the following steps:
a. manufacturing a silicon hole on a silicon substrate;
b. depositing an insulating layer on the surface of the silicon substrate and the inner wall of the silicon hole;
c. depositing a barrier layer on the insulating layer, and depositing a catalytic metal layer on the barrier layer;
d. growing a graphene composite structure layer by utilizing the catalytic metal layer;
e. pasting a dry film on the surface of the graphene composite structure layer on the silicon substrate, and exposing, developing and photoetching to form a dry film layer;
f. depositing a seed layer on the bottom surface of the silicon hole and the surface of the dry film layer;
g. and filling the silicon hole with a conductive material.
Furthermore, the catalytic metal layer in the step c is made by an ion beam sputtering method or a physical vapor deposition method, and the catalytic metal layer is made of cobalt or iron.
Further, in the step d, the graphene composite structure layer is manufactured by a thermal chemical vapor deposition method, acetylene is used as a carbon source gas, argon is used as a protective gas, and the pressure of the thermal chemical deposition chamber is stabilized at 1 kPa.
Furthermore, the structure of the grown graphene composite structure layer is divided into two layers, the upper layer is horizontal multi-layer graphene, and the lower layer is vertical graphene.
Furthermore, in the step e, the diameter of the hole of the dry film layer is smaller than that of the silicon hole, and the hole of the dry film layer is coaxial with the silicon hole.
Furthermore, in the step g, the seed layer is used as a guide to perform electroplating filling on the conductive material in the silicon hole.
Compared with the prior art, the method has the advantages that holes are formed in the silicon substrate, then the insulating layer, the barrier layer and the catalytic metal layer are deposited in sequence, the graphene composite layer is grown again, the dry film is attached, the seed layer is deposited and then the conductive material is filled, and the problem of high-frequency signal electromagnetic coupling crosstalk of the 3D TSV structure is solved by utilizing good thermodynamic, mechanical and material characteristics of graphene.
Drawings
FIG. 1 is a schematic diagram of a structure for forming a silicon via according to the present invention;
FIG. 2 is a schematic structural view of an insulating layer, a barrier layer and a catalytic metal layer deposited successively in accordance with the present invention;
FIG. 3 is a schematic structural diagram of a graphene composite structure layer grown by using a catalytic metal layer according to the present invention;
fig. 4 is a schematic structural diagram of a graphene composite structure layer;
FIG. 5 is a schematic view of the structure of the dry film layer of the present invention;
FIG. 6 is a schematic diagram of a structure of depositing a seed layer and filling with a conductive material according to the present invention;
fig. 7 is a schematic diagram of electromagnetic signal propagation in the graphene composite structure layer according to the present invention.
In the figure: 1. the device comprises a silicon substrate, 2 a insulating layer, 3 a barrier layer, 4 a catalytic metal layer, 5 a graphene composite structure layer, 6 a dry film layer, 7 a seed layer, 8 a conductive material, 9 and a silicon hole.
Detailed Description
The invention will be further explained with reference to the drawings.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 6, the present invention includes the steps of:
a. manufacturing a silicon hole 9 on a silicon substrate 1;
b. depositing an insulating layer 2 on the surface of the silicon substrate 1 and the inner wall of the silicon hole 9;
c. depositing a barrier layer 3 on the insulating layer 2, and depositing a catalytic metal layer 4 on the barrier layer 3;
d. growing a graphene composite structure layer 5 by using the catalytic metal layer 4;
e. pasting a dry film on the surface of the graphene composite structure layer 5 on the silicon substrate 1, and exposing, developing and photoetching to form a dry film layer 6;
f. depositing a seed layer 7 on the bottom surface of the silicon hole 9 and the surface of the dry film layer 6;
g. the silicon holes 9 are filled with a conductive material 8.
Example (b):
as shown in fig. 1, a silicon substrate 1 is etched and manufactured with a deep reactive etching method, a laser etching method or a wet etching method to form a silicon hole 9; the diameter of the silicon hole 9 is 1-100 microns, the cross section of the silicon hole 9 is generally circular, and the depth-to-width ratio of the silicon hole 9 is generally 1-30.
As shown in fig. 2, the insulating layer 2 is deposited on the surface of the silicon substrate 1 and on the inner walls (circumferential surface and bottom surface) of the silicon holes 9, the insulating layer 2 is deposited by thermal oxidation, chemical vapor deposition or physical vapor deposition, and the material of the insulating layer 2 can be selected from inorganic substances such as silicon dioxide, aluminum oxide or silicon nitride; depositing a barrier layer 3 on the insulating layer 2, wherein the barrier layer 3 is deposited by adopting a physical vapor deposition or chemical vapor deposition method, and the barrier layer 3 can be made of titanium, titanium nitride, tantalum nitride and the like; depositing a catalytic metal layer 4 on the barrier layer 3, wherein the catalytic metal layer 4 is made by an ion beam sputtering method or a physical vapor deposition method, and the material is generally cobalt.
As shown in fig. 3, a graphene composite structure layer 5 grows on the catalytic metal layer 4, the graphene composite structure layer 5 is manufactured by a thermal chemical vapor deposition method, the source gas and the protective gas of the growing graphite carbon are respectively acetylene and argon, the ratio of acetylene to argon is 1:9, the flow rate of the mixed gas is 200 cubic centimeters per minute, the total gas pressure of a thermal chemical deposition chamber is stabilized at 1kPa, and the growth temperature is 450 ℃; as shown in fig. 4, the grown graphene composite structure layer 5 is structurally divided into two layers, the upper layer is a plurality of layers of horizontal graphene, and the lower layer is a plurality of layers of vertical graphene.
As shown in fig. 5, a dry film is attached to the surface of the graphene composite structure layer 5 on the silicon substrate 1, a structure of the silicon hole 9 is exposed through exposure and development, then a multi-layer dry film is attached to the surface of the silicon substrate 1 by a hot pressing method, a photoetching machine is used for exposure, the exposed silicon substrate 1 is placed in a developing solution, a part of the dry film is removed, a dry film layer 6 with a required pattern is formed, the hole diameter of the dry film layer 6 is smaller than that of the silicon hole 9, and the hole of the dry film layer 6 is coaxial with the silicon hole 9.
As shown in fig. 6, a seed layer 7 is deposited on the bottom surface of the silicon via 9 and the surface of the dry film layer 6, the seed layer 7 is deposited on the bottom surface of the silicon via 9 and the surface of the dry film layer 6 by using the dry film layer 6 as a mask and adopting an electron beam evaporation or magnetron sputtering method, and the seed layer 7 is generally made of gold or copper; the seed layer 7 is used as a guide to carry out electroplating filling on the conductive material 8 in the silicon hole 9, the conductive material 8 is filled by adopting an electroplating method, and the conductive material 8 is generally copper; the inhibitor and accelerator are added to the plating solution to realize high-speed and high-quality filling of the conductive material 8 from bottom to top.
As shown in fig. 7, after the filling is completed, the bottom of the TSV channel is removed by chemical mechanical polishing and planarization is achieved. During high-frequency signal transmission, electromagnetic waves which are longitudinally and transversely transmitted in the dense TSV array enter the graphene composite structure layer 5 and are reflected and attenuated for multiple times between the vertical and horizontal multi-layer graphene layers, so that crosstalk strength is reduced, the number of interfering TSV channels is reduced, and fidelity transmission of high-frequency signals is facilitated.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and any minor modifications, equivalent replacements and improvements made to the above embodiment according to the technical spirit of the present invention should be included in the protection scope of the technical solution of the present invention.
Claims (5)
1. A three-dimensional through silicon via vertical interconnection method based on a graphene composite structure is characterized by comprising the following steps:
a. manufacturing a silicon hole (9) on a silicon substrate (1);
b. depositing an insulating layer (2) on the surface of the silicon substrate (1) and the inner wall of the silicon hole (9);
c. depositing a barrier layer (3) on the insulating layer (2), depositing a catalytic metal layer (4) on the barrier layer (3);
d. growing a graphene composite structure layer (5) by using the catalytic metal layer (4), wherein the graphene composite structure layer (5) is structurally divided into two layers, the upper layer is horizontal multi-layer graphene, and the lower layer is vertical multi-layer graphene;
e. pasting a dry film on the surface of the graphene composite structure layer (5) on the silicon substrate (1), and exposing and developing to form a dry film layer (6);
f. depositing a seed layer (7) on the bottom surface of the silicon hole (9) and the surface of the dry film layer (6);
g. and filling the silicon hole (9) with a conductive material (8).
2. The three-dimensional through silicon via vertical interconnection method based on the graphene composite structure as claimed in claim 1, wherein in the step c, the catalytic metal layer (4) is manufactured by an ion beam sputtering method or a physical vapor deposition method, and the material of the catalytic metal layer (4) is cobalt or iron.
3. The three-dimensional through silicon via vertical interconnection method based on the graphene composite structure, according to claim 1, wherein in the step d, the graphene composite structure layer (5) is manufactured by a thermal chemical vapor deposition method, a carbon source gas is acetylene, a protective gas is argon, and the total gas pressure of a thermal chemical deposition chamber is stabilized at 1 kPa.
4. The method for vertically interconnecting three-dimensional through silicon vias based on graphene composite structures as claimed in claim 1, wherein the hole diameter of the dry film layer (6) in the step e is smaller than the diameter of the silicon holes (9).
5. The method for vertically interconnecting three-dimensional through silicon vias based on graphene composite structures as claimed in claim 1, wherein the step g is performed by filling conductive materials (8) into the silicon vias (9) by electroplating with the seed layer (7) as a guide.
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| CN110379768B (en) * | 2019-07-23 | 2021-08-17 | 合肥工业大学 | TSV manufacturing method based on graphene slurry filling |
| US11398431B2 (en) * | 2020-01-28 | 2022-07-26 | Marvell Asia Pte Ltd | Through-silicon via for high-speed interconnects |
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| US7084507B2 (en) * | 2001-05-02 | 2006-08-01 | Fujitsu Limited | Integrated circuit device and method of producing the same |
| CN102569183B (en) * | 2012-03-02 | 2015-07-29 | 北京大学 | Manufacturing method of multi-layer graphene vertical interconnected structure |
| CN103456677A (en) * | 2012-06-05 | 2013-12-18 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device and manufacturing method thereof |
| CN103258789A (en) * | 2013-04-17 | 2013-08-21 | 华中科技大学 | Manufacturing method of through hole interconnection structure and product of through hole interconnection structure |
| CN103779292B (en) * | 2013-12-31 | 2017-03-15 | 中国科学院上海微系统与信息技术研究所 | A kind of preparation method of the chip cooling material based on Graphene |
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