CN107611547B - Millimeter wave power synthesis device - Google Patents
Millimeter wave power synthesis device Download PDFInfo
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- CN107611547B CN107611547B CN201710823574.2A CN201710823574A CN107611547B CN 107611547 B CN107611547 B CN 107611547B CN 201710823574 A CN201710823574 A CN 201710823574A CN 107611547 B CN107611547 B CN 107611547B
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Abstract
The invention discloses a millimeter wave power synthesis device, and relates to the technical field of millimeter wave power devices; the power synthesis device comprises a first layer of silicon chip and a second layer of silicon chip, wherein the top surface of the first layer of silicon chip and the back surface of the second layer of silicon chip are bonded together by wafer level packaging gold; a power distribution network, a power amplifier chip and a power synthesis network formed by through holes are arranged on the first layer of silicon wafer, and a blind groove etched by a wet process is arranged at a branch port of the power distribution network and the power synthesis network on the back surface of the first layer of silicon wafer; the first layer of silicon chip is realized by etching a blind slot by a wet method, placing an amplifier chip, and etching a through hole by a silicon-based MEMS (micro-electromechanical systems) process to form a substrate integrated waveguide structure by a power distribution network and a power synthesis network.
Description
Technical Field
The invention relates to the technical field of millimeter wave power devices.
Background
The millimeter wave refers to electromagnetic waves with the frequency of 30GHz-300GHz and the wavelength of 10mm-1 mm. The millimeter wave band has characteristics such as a short wavelength and a wide frequency band, and thus is widely used in various fields. Especially in the aspect of guidance technology, because the frequency of the millimeter wave frequency band is higher, the millimeter wave guidance technology has certain photoelectric guidance characteristic while having the microwave guidance characteristic, so the millimeter wave guidance technology can combine the characteristics of strong penetrability of the microwave guidance technology, small volume of a photoelectric guidance device and high angle resolution, and has very excellent guidance performance. One key technology in the design of millimeter wave systems is the design of high-efficiency and high-power devices. However, with the increase of frequency, the power synthesis technology form of the traditional microstrip line and the metal box body has many problems in the millimeter wave frequency band.
For example, the power combining technique using the microstrip line method affects the efficiency of power combining due to low quality factor and large insertion loss; the power synthesizer adopting the metal waveguide mode has high synthesis efficiency, but in a millimeter wave frequency band, a low-precision metal processing waveguide method is not used, the high-precision metal processing waveguide is expensive in manufacturing cost, and in addition, the structure has large size and high cross section, so that the requirements of miniaturization and easy integration of a modern millimeter wave radio frequency front end are difficult to achieve.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a millimeter wave power synthesis device, which has a large quality factor, causes less loss, has high synthesis efficiency, and is easy to meet the requirements of miniaturization and easy integration of the modern millimeter wave radio frequency front end.
In order to solve the technical problems, the technical scheme adopted by the invention is as follows: the packaging structure comprises a first layer of silicon chip and a second layer of silicon chip, wherein the top surface of the first layer of silicon chip and the back surface of the second layer of silicon chip are bonded together through wafer-level packaging gold; a power distribution network, a power amplifier placing block and a power synthesis network are arranged on the first layer of silicon chip; the back of the second layer of silicon wafer is provided with a power distribution network and a power synthesis network which are the same as those of the first layer of silicon wafer; a through groove matched with the power amplifier chip placement block on the first layer of silicon chip is arranged between the power distribution network and the power synthesis network; the back of the first layer of silicon chip is completely plated with metal, and the power distribution network, the power amplifier placing block and the power synthesis network on the top of the first layer of silicon chip are partially plated with metal; the power distribution network and the power synthesis network on the back of the second layer of silicon wafer are plated with metal, the plated metal on the top of the second layer of silicon wafer connects the power-up points of the power amplifier chip through the through silicon via and leads out to the power-up position of the second layer of silicon wafer, the grid electrode of the power amplifier chip is connected with the grid electrode, and the drain electrode is connected with the drain electrode and used for powering up the power amplifier chip; the method is characterized in that: the power distribution network, the power amplifier placing block and the power synthesis network are arranged on the first layer of silicon wafer and are formed by arranging a plurality of independent first through holes, and metal is electroplated on the inner sides of the first through holes to form a substrate integrated planar transmission waveguide structure.
Preferably, a branch port of the back power distribution network and the power synthesis network of the first layer of silicon wafer is provided with a blind groove and a second through hole; to achieve broadband matching and power distribution.
Preferably, the power distribution network structure is: the input end of the power distribution network is divided into two first-stage branches, wherein each first-stage branch is divided into two second-stage branches, each second-stage branch is divided into two third-stage branches, each third-stage branch is led out and converted into a CPWG interface, a power amplifier chip is bonded on a power amplifier placing plate block through high-temperature baking of conductive adhesive, and the CPWG interface and the radio frequency input end of the power amplifier chip are bonded together through a micro-assembly technology; the power synthesis network structure is as follows: each path in the third-stage branch is connected with the radio-frequency output end of one power amplifier chip, the port of each path in the third-stage branch is also in a CPWG form, the port of each path in the third-stage branch bonds the radio-frequency output end of the power amplifier chip on the CPWG port of each path in the third-stage branch through a micro-assembly technology, the two paths of third-stage branches synthesize one path of second-stage branch, and the two paths of second-stage branches synthesize one path of first-stage branch for output.
Preferably, the first via hole and the second via hole are formed by dry etching.
preferably, the blind trench is formed by wet etching.
Preferably, the blind slot is rectangular.
preferably, third through holes are arranged at the corners of the power distribution network and the power synthesis network.
Adopt the produced beneficial effect of above-mentioned technical scheme to lie in: the invention has simple structure, wide frequency band, low loss, low profile and easy integrated power synthesis structure; the first through hole forms a power distribution network, a power amplifier placing block and a power synthesis network, the inner side of the first through hole is metalized to form a substrate integrated waveguide structure which is a planar transmission structure and is easy to integrate with a planar amplifier circuit; the power distribution and matching of the power distribution network can be realized by adjusting the position of the second through hole 12, the position of the second through hole 12 in the horizontal direction can adjust the proportion of the power distribution, and the position of the second through hole 12 in the vertical direction can adjust the matching of the power divider; the third through hole is used for eliminating mismatch caused by discontinuity in electromagnetic wave transmission; the matching of the broadband is realized by wet etching a blind slot on the back of the first layer of silicon wafer and metalizing, and the blind slot expands the working bandwidth; the through holes are etched in a dry method and metallized at the bent part of the waveguide, so that the matching of a wide frequency band can be realized; in the aspect of processing precision, a semiconductor processing technology is adopted, so that the processing precision can be ensured; in the aspect of reducing loss, the power synthesis structure has a waveguide structure, so that the power synthesis structure has a larger quality factor, the loss is smaller, and the synthesis efficiency is high.
Drawings
FIG. 1 is a schematic plan view of a transition structure of a CPWG-SIW-CPWG (grounded coplanar waveguide-substrate integrated waveguide-grounded coplanar waveguide) of the present invention;
FIG. 2 is a schematic backside view of a first layer of silicon wafers of the present invention;
FIG. 3 is a schematic top view of a first layer of silicon wafers of the present invention;
FIG. 4 is a schematic backside view of a second layer of silicon wafers according to the present invention;
FIG. 5 is a schematic top view of a second layer of silicon wafer according to the present invention.
In the figure: 1. a power distribution network; 2. a power combining network; 3. a power amplifier placement block; 4. a blind groove; 5. a first through hole; 6. a first stage branch; 7. a second stage branch circuit; 8. a third stage branch; 9. a power-up point; 10. a through groove; 11. a power-up position; 12. a second through hole; 13. a third via.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
As shown in fig. 1-5, an embodiment of a millimeter wave power combiner according to the present invention includes a first layer of silicon chip and a second layer of silicon chip, wherein a top surface of the first layer of silicon chip and a back surface of the second layer of silicon chip are bonded together by a wafer level package gold; the first layer of silicon chip is provided with a power distribution network 1, a power amplifier placing block 3 and a power synthesis network 2; the back of the second layer of silicon wafer is provided with a power distribution network 1 and a power synthesis network 2 which are the same as those of the first layer of silicon wafer; the second layer of silicon wafer leads out the power-on position of the power amplifier chip, so that the difficulty of power-on of the probe during testing is reduced; a through groove 10 matched with the power amplifier placing block 3 on the first layer of silicon chip is arranged between the power distribution network 1 and the power synthesis network 2; the back of the first layer of silicon chip is completely plated with metal, and the power distribution network 1, the power amplifier placing block 3 and the power synthesis network 2 on the top of the first layer of silicon chip are partially plated with metal; the power distribution network 1 and the power synthesis network 2 on the back of the second layer of silicon wafer are plated with metal, the plated metal on the top of the second layer of silicon wafer connects the power-up points 9 of the power amplifier chip through the through silicon vias and is led out to the power-up position 11 of the second layer of silicon wafer, the grid electrode of the power amplifier chip is connected with the grid electrode, and the drain electrode is connected with the drain electrode and is used for powering up the power amplifier chip; the method is characterized in that: the power distribution network 1, the power amplifier placing block 3 and the power synthesis network 2 are arranged on the first layer of silicon wafer and are formed by arranging a plurality of independent first through holes 5, and metal is electroplated on the inner sides of the first through holes 5 to form a substrate integrated plane transmission waveguide structure.
The top surface of the first layer of silicon wafer and the back surface of the second layer of silicon wafer are bonded together through gold; the power distribution network 1 and the power synthesis network 2 on the first layer of silicon chip are formed by combining a plurality of first through holes 5, the inner sides of the first through holes 5 are metalized to form a substrate integrated waveguide structure which is a planar transmission structure and is easy to integrate with a planar amplifier circuit, the power distribution network 1 is connected with a power amplifier placing plate 3, the power amplifier placing plate 3 is connected with the power synthesis network 2, and the power amplifier placing plate 3 is used for placing a power amplifier chip.
In the aspect of processing precision, a semiconductor processing technology is adopted, so that the processing precision can be ensured; in the aspect of reducing loss, the power synthesis structure has a waveguide structure, so that the power synthesis structure has a larger quality factor, the loss is smaller, and the synthesis efficiency is high.
The transmission of microwave signals adopts a substrate integrated waveguide structure, so that the quality factor is higher, the loss of power synthesis can be reduced, and the power synthesis efficiency is improved; the silicon substrate plated with metal is bonded by utilizing the silicon-based MEMS technology, so that the miniaturization and low profile of the power synthesis device can be realized, and the integration is easy.
Example 1:
the structure of the first layer of silicon wafer and the second layer of silicon wafer is the same as that described above.
The branch ports of the power distribution network 1 and the power synthesis network 2 on the back of the first layer of silicon wafer are provided with blind grooves 4 and second through holes 12; to achieve broadband matching and power distribution. In the aspect of broadband matching, the power synthesis structure etches a blind slot on the back of the first layer of silicon wafer in a wet method and is metalized, the second through hole 12 is etched and metalized in a waveguide turning place in a dry method, broadband matching can be achieved, and the blind slot expands the working bandwidth.
The power distribution and matching of the power distribution network can be realized by adjusting the position of the second through hole 12, the position of the second through hole 12 in the horizontal direction can adjust the proportion of the power distribution, and the position of the second through hole 12 in the vertical direction can adjust the matching of the power divider.
example 2:
The structure of the first layer of silicon wafer and the second layer of silicon wafer is the same as that described above.
The structure of the power distribution network 1 is as follows: the input end of the power distribution network 1 is divided into two first-stage branches, wherein each first-stage branch is divided into two second-stage branches 7, each second-stage branch 7 is divided into two third-stage branches 8, each lead-out in each third-stage branch 8 is converted into a CPWG (coplanar waveguide ground) interface, a power amplifier chip is bonded on a power amplifier placing plate 3 through conductive adhesive high-temperature baking, and the CPWG interfaces and the radio frequency input end of the power amplifier chip are bonded together through a micro-assembly technology; the structure of the power synthesis network 2 is as follows: each of the third stage branches 8 is connected to the rf output of one of the power amplifier chips. The port of each path in the third-stage branch 8 is also in a CPWG form, the port of each path in the third-stage branch 8 bonds the radio frequency output end of the power amplifier chip to the CPWG port of each path in the third-stage branch 8 through a micro-assembly technology, the two paths of the third-stage branches 8 synthesize one path of the second-stage branch 7, and the two paths of the branch 7 synthesize one path to output. The power combining network 2 and the power distribution network 1 are both 8-way.
the branch ports of the power distribution network 1 and the power synthesis network 2 on the back of the first layer of silicon wafer are provided with blind grooves and second through holes 12.
And the power amplifier placing plate 3 on the top surface of the first layer of silicon wafer, the through groove 10 on the back surface of the second layer of silicon wafer and the through groove 10 on the top surface of the second layer of silicon wafer are provided with power-on points 9 at the same positions for powering on the power amplifier chip.
The power distribution network 1 and the power synthesis network 2 on the back of the second layer of silicon wafer are the same as those on the first layer of silicon wafer, because the silicon-based MEMS metal bonding process needs a certain dead-against area between two layers of silicon wafer metals.
Example 3:
The structure of the first layer of silicon wafer and the second layer of silicon wafer is the same as that described above.
The first via hole 5 and the second via hole 12 are formed by dry etching.
Example 4:
The structure of the first layer of silicon wafer and the second layer of silicon wafer is the same as that described above.
The blind trenches 4 are formed by wet etching.
example 5:
The structure of the first layer of silicon wafer and the second layer of silicon wafer is the same as that described above.
The blind slot 4 is rectangular. The broadband matching of the power distribution network and the power synthesis network is adjusted by adjusting the position, the length and the width of the blind slot 4 and the depth of the blind slot.
Example 6:
The third through holes 13 are arranged at the corners of the power distribution network 1 and the power synthesis network 2, and the third through holes 13 can eliminate the mismatch phenomenon caused by discontinuity in the transmission process of the electromagnetic waves.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (7)
1. A millimeter wave power synthesis device is characterized in that: the packaging structure comprises a first layer of silicon chip and a second layer of silicon chip, wherein the top surface of the first layer of silicon chip and the back surface of the second layer of silicon chip are bonded together through wafer-level packaging gold; the first layer of silicon chip is provided with a power distribution network (1), a power amplifier placing block (3) and a power synthesis network (2); the power amplifier chip is bonded on the power amplifier placing plate block (3) through high-temperature baking of conductive adhesive; the back of the second layer of silicon wafer is provided with a power distribution network (1) and a power synthesis network (2) which are the same as those of the first layer of silicon wafer; a through groove (10) matched with the power amplifier placing plate block (3) on the first layer of silicon chip is arranged between the power distribution network (1) and the power synthesis network (2) on the back of the second layer of silicon chip; the back of the first layer of silicon chip is completely plated with metal, and the power distribution network (1), the power amplifier placing block (3) and the power synthesis network (2) on the top of the first layer of silicon chip are partially plated with metal; the power distribution network (1) and the power synthesis network (2) on the back of the second layer of silicon wafer are plated with metal, and the plated metal on the top of the second layer of silicon wafer is used for connecting the power-on points (9) of the power amplifier chip through the through silicon vias and leading out to the power-on position (11) of the second layer of silicon wafer; the grid electrode of the power amplifier chip is connected with the grid electrode, and the drain electrode of the power amplifier chip is connected with the drain electrode and used for electrifying the power amplifier chip; the method is characterized in that: the power distribution network (1), the power amplifier placing block (3) and the power synthesis network (2) are arranged on the first layer of silicon wafer and are formed by arranging a plurality of independent first through holes (5), and metal is electroplated on the inner sides of the first through holes (5) to form a substrate integrated planar transmission waveguide structure.
2. The millimeter wave power synthesis device according to claim 1, wherein a blind slot (4) and a second through hole (12) are formed at a branch of the power distribution network (1) and the power synthesis network (2) on the back side of the first silicon wafer; to achieve broadband matching and power distribution.
3. A millimeter wave power combining device according to claim 1 or 2, characterized in that the power distribution network (1) is structured as: the input end of the power distribution network (1) is divided into two first-stage branches (6), wherein each first-stage branch (6) is divided into two second-stage branches (7), each second-stage branch (7) is divided into two third-stage branches (8), each lead-out of each third-stage branch (8) is converted into a CPWG interface, a power amplifier chip is bonded on a power amplifier placing plate block (3) through conductive adhesive high-temperature baking, and the CPWG interface is bonded with the radio frequency input end of the amplifier chip through a micro-assembly technology; the structure of the power synthesis network (2) is as follows: each path in the third-stage branch (8) is connected with the radio frequency output end of a power amplifier, the port of each path in the third-stage branch (8) is also in a CPWG form, the port of each path in the third-stage branch (8) bonds the radio frequency output end of a power amplifier chip on the CPWG port of each path in the third-stage branch (8) through a micro-assembly technology, the two paths of the third-stage branches (8) synthesize a path of the second-stage branch (7), and the two paths of the second-stage branches (7) synthesize a path of the first-stage branch (6) so as to output.
4. A millimeter wave power combining device according to claim 2, characterized in that said first via (5) and said second via (12) are formed by dry etching.
5. A millimeter wave power combining device according to claim 2, characterized in that the blind trench (4) is formed by wet etching.
6. A millimeter wave power combining device according to claim 2 or 5, characterized in that the blind slot (4) is rectangular.
7. a millimeter wave power combining device according to claim 1, characterized in that the corners of the power distribution network (1) and the power combining network (2) are provided with third through holes (13).
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| CN109755697B (en) * | 2018-11-27 | 2020-06-09 | 西安电子科技大学 | Substrate integrated folded waveguide filter based on silicon through hole and preparation method thereof |
| CN110380178B (en) * | 2019-07-29 | 2021-07-13 | 中国电子科技集团公司第五十五研究所 | Millimeter wave radial multi-path power divider based on silicon micromachining |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101621149A (en) * | 2008-07-01 | 2010-01-06 | 电子科技大学 | Method for designing microwave and millimeter-wave spatial power synthesis amplifier |
| CN105826275A (en) * | 2016-03-21 | 2016-08-03 | 中国电子科技集团公司第五十五研究所 | Silicon-based multichannel TR assembly and design method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101621149A (en) * | 2008-07-01 | 2010-01-06 | 电子科技大学 | Method for designing microwave and millimeter-wave spatial power synthesis amplifier |
| CN105826275A (en) * | 2016-03-21 | 2016-08-03 | 中国电子科技集团公司第五十五研究所 | Silicon-based multichannel TR assembly and design method |
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