CN107577568A - A kind of tool and method of free removal spi bus FW guiding - Google Patents
A kind of tool and method of free removal spi bus FW guiding Download PDFInfo
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- CN107577568A CN107577568A CN201710779194.3A CN201710779194A CN107577568A CN 107577568 A CN107577568 A CN 107577568A CN 201710779194 A CN201710779194 A CN 201710779194A CN 107577568 A CN107577568 A CN 107577568A
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Abstract
The invention discloses the tool and method of a kind of free removal spi bus FW guiding, for the IC chip being connected on computer motherboard, its structure includes chip gripper, wire and IC chip, the chip gripper is a spring clip, the PIN that may be connected on mainboard is configured with the inside of the leading section of the chip gripper, the chip gripper is wired to IC chip.The tool and method of a kind of free removal spi bus FW guiding of the present invention are compared with prior art, it is easy to use, only need to clamp on the corresponding pin pin of clip alignment on tool, it is widely used and can be used with domestic consumer after sale in factory repair and product, flexibility is good, it can be transferred and extended by extended line in the narrow place of mainboard chip, it is practical, it is easy to spread.
Description
Technical field
The present invention relates to server technology field, the tool of specifically a kind of free removal spi bus FW guiding and side
Method.
Background technology
Cloud computing era, server are widely applied, and the element on the mainboard that increasing high-performance server uses is high
Degree is integrated, and density is increasing, BIOS and BMC chip on the mainboard that most servers use, generally using the side of welding encapsulation
Method is integrated on mainboard, and during mainboard production and IC FW upgrading uses, FW content is likely to result in loss damage, causes
Mainboard can not be booted up, and need to use this when the instruments such as welding stage and heat gun to pull down IC, use special replication tool weight
New burning FW files, retracting IC process easily causes PCBA on a series of failures such as pad damages, IC elements damage in itself.Take
When, it is laborious and be not easy to ensure PCBA quality.
Therefore, a kind of new technology is needed badly, the IC of encapsulation need not be pulled down by, which reaching, can carry out spi bus FW guiding.
The content of the invention
The technical assignment of the present invention is to be directed to above weak point, there is provided a kind of practical free removal spi bus FW
The tool and method of guiding.
A kind of tool of free removal spi bus FW guiding, for the IC chip being connected on computer motherboard, its structure bag
Chip gripper, wire and IC chip are included, the chip gripper is a spring clip, and being configured with the inside of the leading section of the chip gripper to connect
PIN on to mainboard, the chip gripper are wired to IC chip.
The IC chip is fixed by chip pad, and above-mentioned wire is configured with through the chip pad and in chip pad
Interface, IC chip is by being connected the connection realized with chip gripper with the interface.
The IC chip is 8pin pin BIOS chips or 16pin pin BIOS chips.
A kind of method of free removal spi bus FW guiding, is realized, its implementation process is using above-mentioned tool：It will control first
Chip gripper on tool is directed at the pin pin of IC chip to be replaced, after the pin pin of the IC chip are pulled into low level, shielding master
IC chip on plate, mainboard do not recall the content in the IC chip being welded on mainboard in POST process of self-test is powered up, directly
The data in IC chip on calling tool are connect, tool is finally removed, writes with a brush dipped in Chinese ink onboard IC FW information again, realize free removal SPI
Bus FW is guided.
The content that mainboard is not recalled in the IC chip being welded on mainboard in POST process of self-test is powered up passes through following
Two steps are realized：
First, the IC chip on mainboard is short-circuited to low level first, mainboard acquiescence is not read the IC chip information and added
Electric POST self-tests；
Two and then the IC chip on tool is pulled to high level, mainboard acquiescence is started self-test in IC chip power-up POST.
IC chip on the mainboard is 8pin BIOS chips, is configured with the BIOS chips and controls whether work
HOLD_IN pins, ground pin VSS, wherein HOLD_IN pins are the switches whether control chip works, self-test complete and by
After CPU takes over management, the chip no longer works；Corresponding, the implementation process of step 1 is：Will by the chip gripper on tool
The HOLD_IN pins of IC chip on mainboard are short-circuited to ground pin VSS, make the HOLD_IN pin low levels, and work as HOLD_
Mainboard acquiescence will not read the IC chip information and carry out POST startups during IN low levels.
IC chip on the tool is 8pin BIOS chips, is configured with the BIOS chips and controls whether work
HOLD_IN pins, ground pin VSS, wherein HOLD_IN pins are the switches whether control chip works, self-test complete and by
After CPU takes over management, the chip no longer works；Corresponding, the implementation process of step 2 is：IC in tool chip pad
The HOLD_IN pins of chip install pull-up resistor additional, are accessed power input, the HOLD_IN pins on tool are pulled into height
Level, now mainboard acquiescence is in IC POST startups.
IC chip on the mainboard is 16pin BIOS chips, is configured with the BIOS chips and controls whether work
HOLD_IN pins, ground pin VSS, wherein HOLD_IN pins are the switches whether control chip works, self-test complete and by
After CPU takes over management, the chip no longer works；Corresponding, the implementation process of step 1 is：Will by the chip gripper on tool
The HOLD_IN pins of IC chip on mainboard are short-circuited to ground pin VSS, make the HOLD_IN pin low levels, and work as HOLD_
Mainboard acquiescence will not read the IC chip information and carry out POST startups during IN low levels.
IC chip on the tool is 16pin BIOS chips, is configured with the BIOS chips and controls whether work
HOLD_IN pins, ground pin VSS, wherein HOLD_IN pins are the switches whether control chip works, self-test complete and by
After CPU takes over management, the chip no longer works；Corresponding, the implementation process of step 2 is：IC in tool chip pad
The HOLD_IN pins of chip install pull-up resistor additional, are accessed power input, the HOLD_IN pins on tool are pulled into height
Level, now mainboard acquiescence is in IC POST startups.
Mainboard enters DOS systems after POST self-tests are powered up, by DOS boot disk, and now mainboard no longer reads IC chip
It is interior including internal memory, CPU, PCI, south bridge, sas controllers, network card chip, display chip self-test information, remove tool, pass through
DOS writes with a brush dipped in Chinese ink onboard IC FW information again, is implemented without removing spi bus FW guiding.
Compared to the prior art the tool and method of a kind of free removal spi bus FW guiding of the present invention, have with following
Beneficial effect：
The tool and method of a kind of free removal spi bus FW guiding of the present invention, when the IC softwares on mainboard because certain reason is led
It can not start after causing damage, the tool in the invention be clipped on mainboard corresponding to IC chip on pin pin, start is channeled into
Enter PCBA POST self-tests, after the completion of guiding, corresponding IC softwares can be carried out and refreshed, whole process need not use specialized maintenance
The instruments such as instrument flatiron heat gun, it is easy to use, it is only necessary to clip on tool is directed at corresponding pin pin and clamped, is applied
It can be used with domestic consumer after sale in factory repair and product extensively, modular construction, different product, which only needs to change, to be corresponded to
It can be used in the IC chip and guidance tool of product, applicability is wide, suitable for conventional 8pin and 16pin IC chip, flexibly
Property it is good, the narrow place of mainboard chip can by extended line transfer extend, it is practical, it is easy to spread.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
The embodiment of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
The accompanying drawing of offer obtains other accompanying drawings.
Accompanying drawing 1 implements schematic diagram for the jig structure of the present invention.
Accompanying drawing 2 is HOLD_IN pin short circuit exemplary plots in the 8pin BIOS chips of mainboard.
Accompanying drawing 3 draws high level exemplary plot for HOLD_IN pins in the 8pin BIOS chips of tool.
Accompanying drawing 4 is HOLD_IN pin short circuit exemplary plots in the 16pin BIOS chips of mainboard.
Accompanying drawing 5 draws high level exemplary plot for HOLD_IN pins in the 16pin BIOS chips of tool.
Embodiment
In order that those skilled in the art more fully understand the solution of the present invention, with reference to embodiment to this
Invention is described in further detail.Obviously, described embodiment is only part of the embodiment of the present invention, rather than all
Embodiment.Based on the embodiment in the present invention, those of ordinary skill in the art institute under the premise of creative work is not made
The every other embodiment obtained, belongs to the scope of protection of the invention.
As shown in Figure 1, the present invention provides a kind of tool of free removal spi bus FW guiding, for being connected to computer
IC chip on mainboard, its structure include chip gripper, wire and IC chip, and the chip gripper is a spring clip, in the chip gripper
Leading section on the inside of be configured with the PIN that may be connected on mainboard, the chip gripper is wired to IC chip.
The IC chip is fixed by chip pad, and above-mentioned wire is configured with through the chip pad and in chip pad
Interface, IC chip is by being connected the connection realized with chip gripper with the interface.
The IC chip is 8pin pin BIOS chips or 16pin pin BIOS chips.
A kind of method of free removal spi bus FW guiding, is realized, its implementation process is using above-mentioned tool：It will control first
Chip gripper on tool is directed at the pin pin of IC chip to be replaced, after the pin pin of the IC chip are pulled into low level, shielding master
IC chip on plate, mainboard do not recall the content in the IC chip being welded on mainboard in POST process of self-test is powered up, directly
The data in IC chip on calling tool are connect, tool is finally removed, writes with a brush dipped in Chinese ink onboard IC FW information again, realize free removal SPI
Bus FW is guided.
The content that mainboard is not recalled in the IC chip being welded on mainboard in POST process of self-test is powered up passes through following
Two steps are realized：
First, the IC chip on mainboard is short-circuited to low level first, mainboard acquiescence is not read the IC chip information and added
Electric POST self-tests；
Two and then the IC chip on tool is pulled to high level, mainboard acquiescence is started self-test in IC chip power-up POST.
As shown in Fig. 2 the IC chip on the mainboard is 8pin BIOS chips, being configured with control in the BIOS chips is
HOLD_IN pins, the ground pin VSS of no work, wherein HOLD_IN pins are the switches whether control chip works, self-test
After completing and taking over management by CPU, the chip no longer works；Corresponding, the implementation process of step 1 is：By on tool
The HOLD_IN pins of IC chip on mainboard are short-circuited to ground pin VSS by chip gripper, make the HOLD_IN pin low levels, and
When HOLD_IN low levels, mainboard acquiescence will not read the IC chip information and carry out POST startups.
As shown in figure 3, the IC chip on the tool is 8pin BIOS chips, being configured with control in the BIOS chips is
HOLD_IN pins, the ground pin VSS of no work, wherein HOLD_IN pins are the switches whether control chip works, self-test
After completing and taking over management by CPU, the chip no longer works；Corresponding, the implementation process of step 2 is：At tool chip bottom
The HOLD_IN pins of IC chip on seat install pull-up resistor additional, are accessed power input, and the HOLD_IN on tool is managed
Pin is pulled to high level, and now mainboard acquiescence starts in the IC POST.
As shown in figure 4, the IC chip on the mainboard is 16pin BIOS chips, being configured with control in the BIOS chips is
HOLD_IN pins, the ground pin VSS of no work, wherein HOLD_IN pins are the switches whether control chip works, self-test
After completing and taking over management by CPU, the chip no longer works；Corresponding, the implementation process of step 1 is：By on tool
The HOLD_IN pins of IC chip on mainboard are short-circuited to ground pin VSS by chip gripper, make the HOLD_IN pin low levels, and
When HOLD_IN low levels, mainboard acquiescence will not read the IC chip information and carry out POST startups.
As shown in figure 5, the IC chip on the tool is 16pin BIOS chips, being configured with control in the BIOS chips is
HOLD_IN pins, the ground pin VSS of no work, wherein HOLD_IN pins are the switches whether control chip works, self-test
After completing and taking over management by CPU, the chip no longer works；Corresponding, the implementation process of step 2 is：At tool chip bottom
The HOLD_IN pins of IC chip on seat install pull-up resistor additional, are accessed power input, and the HOLD_IN on tool is managed
Pin is pulled to high level, and now mainboard acquiescence starts in the IC POST.
Mainboard enters DOS systems after POST self-tests are powered up, by DOS boot disk, and now mainboard post completes to enter DOS
It need not again be transferred after system and start timing information in IC, timing information refers to that mainboard presses a series of internal self-tests after power key
Information, comprising internal memory, CPU, PCI, south bridge, sas controllers, network card chip, display chip etc., that is, press power switch key and exist
Display has the self-checking behavior before display, equipment not to recall the information in BIOS after showing, is taken over by CPU.Now take
Lower tool, write with a brush dipped in Chinese ink onboard IC FW information again by DOS, be implemented without removing spi bus FW guiding.
The guiding that IC chip is replaced can be achieved in the IC that the present invention need not remove encapsulation, wide application, can tie up after sale
Repair, factory manufacture etc. applications, be applicable to conventional 8pin＆16pinIC chips.
By embodiment above, the those skilled in the art can readily realize the present invention.Herein
Apply specific case to be set forth the principle and embodiment of the present invention, the explanation of above example is only intended to help
Understand the method and its core concept of the present invention.It should be pointed out that for those skilled in the art, do not taking off
On the premise of from the principle of the invention, some improvement and modification can also be carried out to the present invention, these are improved and modification also falls into this
In invention scope of the claims.
Claims (10)
1. a kind of tool of free removal spi bus FW guiding, it is characterised in that for the IC cores being connected on computer motherboard
Piece, its structure include chip gripper, wire and IC chip, and the chip gripper is a spring clip, on the inside of the leading section of the chip gripper
The PIN that may be connected on mainboard is configured with, the chip gripper is wired to IC chip.
A kind of 2. tool of free removal spi bus FW guiding according to claim 1, it is characterised in that the IC chip
Fixed by chip pad, above-mentioned wire is through the chip pad and is configured with interface in chip pad, IC chip by with
The connection with chip gripper is realized in interface connection.
A kind of 3. tool of free removal spi bus FW guiding according to claim 1 or 2, it is characterised in that the IC cores
Piece is 8pin pin BIOS chips or 16pin pin BIOS chips.
A kind of 4. method of free removal spi bus FW guiding, it is characterised in that usage right requires that the tool described in 1-3 is realized,
Its implementation process is：Chip gripper on tool is directed to the pin pin of IC chip to be replaced first, by the pin pin of the IC chip
It is pulled to after low level, shields the IC chip on mainboard, mainboard does not recall in POST process of self-test is powered up and is welded on mainboard
On IC chip in content, directly invoke the data in IC chip on tool, finally remove tool, write with a brush dipped in Chinese ink onboard IC's again
FW information, realize that free removal spi bus FW is guided.
5. the method for a kind of free removal spi bus FW guiding according to claim 4, it is characterised in that mainboard is powering up
The content not recalled in POST process of self-test in the IC chip being welded on mainboard is realized by following two steps：
First, the IC chip on mainboard is short-circuited to low level first, mainboard acquiescence is not read the IC chip information and added
Electric POST self-tests；
Two and then the IC chip on tool is pulled to high level, mainboard acquiescence is started self-test in IC chip power-up POST.
6. the method for a kind of free removal spi bus FW guiding according to claim 5, it is characterised in that on the mainboard
IC chip be 8pin BIOS chips, be configured with the HOLD_IN pins for controlling whether work, ground pin in the BIOS chips
VSS, wherein HOLD_IN pins are the switches whether control chip works, after self-test is completed and takes over management by CPU, the chip
No longer work；Corresponding, the implementation process of step 1 is：By the chip gripper on tool by the IC chip on mainboard
HOLD_IN pins are short-circuited to ground pin VSS, make the HOLD_IN pin low levels, and mainboard is write from memory when HOLD_IN low levels
The IC chip information will not be read by, which recognizing, carries out POST startups.
7. the method for a kind of free removal spi bus FW guiding according to claim 6, it is characterised in that on the tool
IC chip be 8pin BIOS chips, be configured with the HOLD_IN pins for controlling whether work, ground pin in the BIOS chips
VSS, wherein HOLD_IN pins are the switches whether control chip works, after self-test is completed and takes over management by CPU, the chip
No longer work；Corresponding, the implementation process of step 2 is：The HOLD_IN pins of IC chip in tool chip pad add
Pull-up resistor is loaded onto, is accessed power input, the HOLD_IN pins on tool are pulled to high level, now mainboard acquiescence exists
The IC POST start.
8. the method for a kind of free removal spi bus FW guiding according to claim 5, it is characterised in that on the mainboard
IC chip be 16pin BIOS chips, be configured with the HOLD_IN pins for controlling whether work, ground pin in the BIOS chips
VSS, wherein HOLD_IN pins are the switches whether control chip works, after self-test is completed and takes over management by CPU, the chip
No longer work；Corresponding, the implementation process of step 1 is：By the chip gripper on tool by the IC chip on mainboard
HOLD_IN pins are short-circuited to ground pin VSS, make the HOLD_IN pin low levels, and mainboard is write from memory when HOLD_IN low levels
The IC chip information will not be read by, which recognizing, carries out POST startups.
9. the method for a kind of free removal spi bus FW guiding according to claim 8, it is characterised in that on the tool
IC chip be 16pin BIOS chips, be configured with the HOLD_IN pins for controlling whether work, ground pin in the BIOS chips
VSS, wherein HOLD_IN pins are the switches whether control chip works, after self-test is completed and takes over management by CPU, the chip
No longer work；Corresponding, the implementation process of step 2 is：The HOLD_IN pins of IC chip in tool chip pad add
Pull-up resistor is loaded onto, is accessed power input, the HOLD_IN pins on tool are pulled to high level, now mainboard acquiescence exists
The IC POST start.
10. the method guided according to a kind of any described free removal spi bus FW of claim 4-8, it is characterised in that mainboard
After POST self-tests are powered up, DOS systems are entered by DOS boot disk, now mainboard no longer read include in IC chip internal memory,
CPU, PCI, south bridge, sas controllers, network card chip, the self-test information of display chip, remove tool, plate are write with a brush dipped in Chinese ink again by DOS
IC FW information is carried, is implemented without removing spi bus FW guiding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710779194.3A CN107577568A (en) | 2017-09-01 | 2017-09-01 | A kind of tool and method of free removal spi bus FW guiding |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710779194.3A CN107577568A (en) | 2017-09-01 | 2017-09-01 | A kind of tool and method of free removal spi bus FW guiding |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107577568A true CN107577568A (en) | 2018-01-12 |
Family
ID=61030484
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710779194.3A Pending CN107577568A (en) | 2017-09-01 | 2017-09-01 | A kind of tool and method of free removal spi bus FW guiding |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107577568A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201302714Y (en) * | 2008-10-21 | 2009-09-02 | 中兴通讯股份有限公司 | Device for updating module firmware in terminal and clamp |
| CN107025116A (en) * | 2016-01-29 | 2017-08-08 | 佛山市顺德区顺达电脑厂有限公司 | The mainboard that free removal damages chip starts method |
-
2017
- 2017-09-01 CN CN201710779194.3A patent/CN107577568A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201302714Y (en) * | 2008-10-21 | 2009-09-02 | 中兴通讯股份有限公司 | Device for updating module firmware in terminal and clamp |
| CN107025116A (en) * | 2016-01-29 | 2017-08-08 | 佛山市顺德区顺达电脑厂有限公司 | The mainboard that free removal damages chip starts method |
Non-Patent Citations (1)
| Title |
|---|
| 匿名: "宽窄体通用SOP8-1.27带线夹子SOP8免拆测试烧录夹子", 《HTTPS://WWW.NPICP.COM/PRODUCT/11669138.HTML》 * |
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| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20180112 |
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| RJ01 | Rejection of invention patent application after publication |