CN107577139B - When m- digital switching device and method - Google Patents
When m- digital switching device and method Download PDFInfo
- Publication number
- CN107577139B CN107577139B CN201710879837.1A CN201710879837A CN107577139B CN 107577139 B CN107577139 B CN 107577139B CN 201710879837 A CN201710879837 A CN 201710879837A CN 107577139 B CN107577139 B CN 107577139B
- Authority
- CN
- China
- Prior art keywords
- digital
- signal
- time
- code
- quantizer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G04—HOROLOGY
- G04F—TIME-INTERVAL MEASURING
- G04F10/00—Apparatus for measuring unknown time intervals by electric means
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
M- digital switching device and method when the present invention discloses a kind of, the device is in such a way that the when m- digital quantizer being connected in parallel receives the same group of dephased time signal of tool, time signal is converted into digital signal, and the control signal and digital signal that are used to select output translator are exported into data selector together；The digital signal of data selector m- digital quantizer when being corresponded to according to control signal behavior, and export the digital signal；The present invention improves existing system structure PD+MUX+TDC by using the mode of two TDC concurrent workings, saves PD module, realize high speed and it is high-resolution when m- number conversion.
Description
Technical field
The present invention relates to field of signal processing, in particular to m- digital switching device and method when a kind of.
Background technique
Currently, m- digital quantizer TDC when such as this kind of based on dual slope A-D converter ADC, to input signal
Phase have it is required；Therefore it in TDC application, needs to increase phase detecting module PD and data selector MUX before TDC
Two modules.
With reference to Fig. 1, phase detecting module detects the phase information of input time signal Tip and Tim, and generates control signal
Ctrl；The advanced signal of phase in input signal is sent to the port E in TDC by control signal Ctrl control data selector, and
The signal of delayed phase is sent to the port L of TDC；Signal time difference between the end E and the end L is converted into thermometer-code Da by TDC；Da
Binary code Db is converted to by thermometer-code-binary code conversion module, and is spliced with Ctrl signal, complement code output is obtained
Dc；Since under normal circumstances, system requirements output is binary code, so needing additional decoding circuit, complementary circuit is turned
For binary code Dout；
Shown in the conversion time of above-mentioned whole system such as formula (1):
tconv=tPD+tMUX+tTDC+tlogic (1)
Wherein, tconvIndicate the conversion time of whole system, tPDIndicate the phase-detection time of phase detecting module, tMUX
Indicate the delay time of data selector, tTDCThe conversion time of m- digital quantizer, t when expressionlogicIndicate code system conversion and
The time required to splicing.
It can be seen that, the addition of phase detecting module PD needs to consume certain conversion time from formula (1)；This is certain
The conversion speed of m- digital quantizer TDC when being limited in degree；In addition in high-resolution applications, when m- digital quantizer
The resolution ratio of TDC can accomplish subpicosecond magnitude, but phase detecting module PD so high resolution ratio relatively difficult to achieve.
Summary of the invention
The main object of the present invention is m- digital switching device and method when proposing a kind of, and m- number turns when by two
The new structure of parallel operation TDC concurrent working saves phase detecting module PD module, with solve they to the limitation of conversion speed and
The problem of high-resolution relatively difficult to achieve.
To achieve the above object, m- digital switching device when proposed by the present invention a kind of, including data selector, first
When m- digital quantizer, second when m- digital quantizer, thermometer-code-binary code conversion module, splicing module and decoding
Circuit, m- digital quantizer structure is identical when the first time-digital quantizer is with described second and is connected in parallel, described
At the first time-digital quantizer first input end and it is described second when m- digital quantizer the second input terminal be respectively connected to
First time signal, the second input terminal of the first time-digital quantizer and it is described second when m- digital quantizer
One input terminal is respectively connected to have dephased second time signal with first time signal；
First time-the digital quantizer and it is described second when m- digital quantizer, for time signal to be converted to
Digital signal, and the control signal for being used to select output translator and the digital signal are exported together to data selector
In；
The data selector, the digital signal of m- digital quantizer when for being corresponded to according to control signal behavior, and it is defeated
The digital signal out；
The thermometer-code-binary code conversion module, the digital signal that selector exports for receiving data, will be digital
Signal is converted to binary code, i.e., thermometer-code is converted to binary code, and export；
The splicing module, control signal and the thermometer-code-binary system for exporting the data selector
The binary code of code conversion module output is spliced, and splicing result is defeated as input time corresponding numeric results progress
Out；
The decoding circuit, for carrying out code system conversion to input time corresponding numeric results.
Preferably, the control signal is first of any time-digital quantizer output thermometer-code.
Preferably, m- digital switching device further includes at least two groups register group when described, and the register group is used
According to clock cycle, reception, storage and output data.
Preferably, the splicing module control signal that selector exports for receiving data and digital signal, will control
Signal processed and digital signal are spliced, the splicing specifically: using control signal as a high position, using digital signal as low
Position.
M- digital conversion method when the present invention also proposes a kind of, m- digital switching device when being applied to as described above,
This method comprises:
The first input end of the first time-digital quantizer and it is described second when m- digital quantizer it is second defeated
Enter end and be respectively connected to first time signal, the second input terminal of the first time-digital quantizer and it is described second when m- number
The first input end of word converter is respectively connected to have dephased second time signal with first time signal, by time signal
Digital signal is converted to, and for selecting the control signal of output translator and the digital signal to export together；
The digital signal of the data selector m- digital quantizer when being corresponded to according to control signal behavior, and exporting should
Digital signal；
The digital signal that data selector exports is converted into binary code, i.e., thermometer-code is converted into binary code,
And it exports；
Control signal that the data selector exports and the binary code are spliced, and using splicing result as
Input time, corresponding numeric results were exported；
Input time corresponding numeric results are subjected to code system conversion.
The when m- digital quantizer that the present invention is connected in parallel by two receives same group by intersecting received mode
Have dephased time signal, time signal is converted into digital signal, and will be used to select the control of output translator to believe
Number and digital signal export together into data selector；Data selector m- number turn when being corresponded to according to control signal behavior
The digital signal of parallel operation, and export the digital signal；M- digital quantizer TDC parallel work when the present invention is by using two
The mode of work improves existing system structure PD+MUX+TDC, saves phase detecting module PD module, realize high speed and
M- number conversion when high-resolution.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
The structure shown according to these attached drawings obtains other attached drawings.
Fig. 1 m- digital switching device structural schematic diagram when being a kind of；
Fig. 2 m- digital switching device schematic structural diagram of the first embodiment when being the present invention；
Fig. 3 is a kind of delay chain structure time-digital quantizer structural schematic diagram；
Fig. 4 m- digital switching device schematic structural diagram of the second embodiment when being the present invention；
Fig. 5 m- digital conversion method flow chart of first embodiment when being the present invention；
Fig. 6 m- digital conversion method flow chart of the second embodiment when being the present invention；
Fig. 7 m- digital conversion method 3rd embodiment flow chart when being the present invention；
Fig. 8 m- digital conversion method fourth embodiment flow chart when being the present invention；
Fig. 9 m- the 5th embodiment flow chart of digital conversion method when being the present invention.
The embodiments will be further described with reference to the accompanying drawings for the realization, the function and the advantages of the object of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiment is only a part of the embodiments of the present invention, instead of all the embodiments.Base
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts it is all its
His embodiment, shall fall within the protection scope of the present invention.
It is to be appreciated that if relating to directionality instruction (such as up, down, left, right, before and after ...) in the embodiment of the present invention,
Then directionality instruction be only used for explain under a certain particular pose (as shown in the picture) between each component relative positional relationship,
Motion conditions etc., if the particular pose changes, directionality instruction is also correspondingly changed correspondingly.
In addition, being somebody's turn to do " first ", " second " etc. if relating to the description of " first ", " second " etc. in the embodiment of the present invention
Description be used for description purposes only, be not understood to indicate or imply its relative importance or implicitly indicate indicated skill
The quantity of art feature." first " is defined as a result, the feature of " second " can explicitly or implicitly include at least one spy
Sign.It in addition, the technical solution between each embodiment can be combined with each other, but must be with those of ordinary skill in the art's energy
It is enough realize based on, will be understood that the knot of this technical solution when conflicting or cannot achieve when occurs in the combination of technical solution
Conjunction is not present, also not the present invention claims protection scope within.
M- digital switching device when the present invention proposes a kind of.
As shown in Fig. 2, when described m- digital switching device include two be connected in parallel it is identical when it is m- number conversion
Device TDC1 and when m- digital quantizer TDC2 and data selector；The when m- digital quantizer TDC1 being connected in parallel described in two
With when m- digital quantizer TDC2 signal end receive the same group of dephased time signal of tool by intersecting received mode
Time signal Tip and Tim are converted to digital signal, and the control signal that will be used to select output translator by Tip and Tim
Ctrl and the digital signal are exported into data selector together；The data selector is used for according to control signal Ctrl choosing
The digital signal of m- digital quantizer when selecting corresponding, and export digital signal D0.
When described m- digital quantizer TDC1 and when m- digital quantizer TDC2 be identical converter, can be with
Using delay chain structure time-to-digit converter, using differential delay chain structure time-to-digit converter and diclinic can also be based on
The tradition TDC structure such as TDC of rate ADC.
Referring to Fig. 3, circuit shown in Fig. 3 is delay chain structure time-to-digit converter TDC；Between E end signal and L end signal
Phase difference be the time to be converted；Wherein, the end E is the advanced signal of phase, enters in time delay chain and is propagated；The end L is phase
Signal after steric retardation, the clock crawl E end signal as d type flip flop propagate location information in time delay chain；D type flip flop output
As a result enter coding module and obtain Binary Conversion result.
In the present embodiment, by using when m- digital quantizer TDC1 and when m- digital quantizer TDC2 concurrent working
Mode improves existing system structure PD+MUX+TDC, saves phase detecting module PD module, realizes high speed and high score
Resolution when it is m- number conversion.
Referring to Fig. 2, in further carrying out example, when m- digital quantizer TDC1 and when m- digital quantizer TDC2 it is logical
It crosses and intersects received mode and receive the same group of dephased time signal of tool, i.e. input time signal Tip and Tim interconnection
When m- digital quantizer TDC1 and when m- digital quantizer TDC2 the end E and the end L, specific time signal Tip Connection Time-number
The end E of word converter TDC1 and when m- digital quantizer TDC2 the end L, the time signal Tim Connection Time-digital quantizer
The end L of TDC1 and when m- digital quantizer TDC2 the end E；
When time signal Tip phase is ahead of signal Tim, when m- digital quantizer TDC1 will be converted to input time
Digital signal, and be sent into data selector；And due to when m- digital quantizer TDC2 the end E input time signal Tim phase
The end L input time signal Tim is lagged behind, output is fixed as 0.Therefore data selector can according to when m- digital quantizer
TDC1 and when m- digital quantizer TDC2 output judge the phase information of input time signal Tip and Tim；In conjunction with two
The transformation result of TDC, the digital output results D0 of available corresponding input time；Otherwise work as time signal Tip delayed phase
When time signal Tim, then when m- digital quantizer TDC1 output signal be fixed as 0, when m- digital quantizer TDC2 output
Signal is transformation result D0.
In a preferred embodiment, the control signal Ctrl is any time-digital quantizer output thermometer
First of code, i.e., when m- digital quantizer TDC1 and when m- digital quantizer TDC2 between arbitrarily select a converter
Output control signal Ctrl, for example, m- digital quantizer TDC1 output control signal Ctrl, control signal Ctrl are when selection '
0 ' or the output of m- digital quantizer TDC1 is 0 or is not 0 when respectively representing for ' 1 ', while also corresponding to input time signal
The phase relation of Tip and Tim；When controlling signal Ctrl is ' 1 ', data selector m- digital quantizer TDC1 when selecting
Output is as a result, when control signal Ctrl is ' 0 ', the output result of m- digital quantizer TDC2 when data selector selection.
In the present embodiment, by first of the thermometer-code for exporting seclected time-digital quantizer as control
Signal Ctrl, identification can determine the phase relation of input time signal Tip and Tim, substitute existing skill while controlling signal
The function of phase detecting module PD module in art improves and distinguishes speed and efficiency；
Referring to Fig. 2, in further carrying out example, when described m- digital switching device further include thermometer-code-two into
Code conversion module processed, the thermometer-code-binary code conversion module digital signal that selector exports for receiving data
Digital signal D0 is converted to binary code, i.e., thermometer-code is converted to binary code D1, and export by D0.Pass through thermometer
The conversion of code and binary code facilitates the splicing control signal with digital signal of subsequent splicing module.
Referring to Fig. 2, in further carrying out example, m- digital switching device further includes splicing module when described；It is described
Splicing module selector output for receiving data control signal Ctrl and digital signal, will control signal and digital signal
Spliced, and is exported splicing result D2 as input time corresponding numeric results.
When splicing, control signal is used as high position Ctrl, and digital signal obtains spliced signal D2 as low level；Generally
In the case of, thermometer-code-binary code conversion module is set between data selector and splicing module, thermometer-code-two into
The digital signal D0 that code conversion module processed receives data selector output is converted, thermometer-code-binary code conversion module
Output result D1 is exported to splicing module, splicing module is spelled the signal Ctrl and output result D1 after transcoding is controlled
It connects, splicing result D2 is obtained with this.
Referring to Fig. 2, in further carrying out example, m- digital switching device further includes for when will input when described
Between corresponding numeric results be converted to the decoding circuits of other code systems.Due to the addition of decoding circuit, of the invention be applicable in is expanded
Range.
Referring to Fig. 2, when proposed by the invention shown in the conversion time such as formula (2) of m- digital switching device:
tconv=tMUX+tTDC+tlogic (2)
Contrast (1) and formula (2), parallel TDC structure time-to-digit converter conversion time are accelerated.
Referring to Fig. 4, in a preferred embodiment, m- digital switching device further includes at least two groups register when described
Group, the register group are used to receive according to the clock cycle, store simultaneously output data.
In Fig. 2 structure conversion time still by when m- digital quantizer TDC1 and when m- digital quantizer TDC2 turned
Digital delay circuit limitation including the time is changed including data selector etc..Therefore, the present invention improves structure in Fig. 2, such as Fig. 4 institute
Show, increases by two groups of register groups and realize pile line operation to further speed up conversion speed.
Under the control of clock signal clk, circuit structure works in the way of assembly line in Fig. 4.First at first
Clock cycle, when m- digital quantizer TDC1 and when m- digital quantizer TDC2 in a parallel fashion by input time signal
Tip and Tim is converted to digital signal D3 and D4.As described above, at least one group data are 0 in digital signal D3 and D4, represent
The phase information of input time signal Tip and Tim.In second clock cycle, the first register group deposits digital signal D3
It is sent in data selector with D4 and by the data D5 and D6 after deposit；Digital signal D5 and D6 splicing obtain corresponding time input
The complement code of signal exports；According to actual needs by decoding circuit complement code to binary code and Green code etc., generation meets the requirements
Digital signal next one period of D7, D7 deposit and export final output Dout by the second register group.
Based on above-mentioned apparatus, m- digital conversion method when the present invention also proposes a kind of, referring especially to Fig. 5 and Fig. 2, the party
Method includes:
Step S10, the identical time-to-digit converter being connected in parallel described in two are received by intersecting received mode
Time signal is converted to digital signal, and will be used to select output translator by the same group of dephased time signal of tool
Control signal and digital signal export together；
When m- digital quantizer TDC1 and when m- digital quantizer TDC2 by intersecting received mode receive same group
Have dephased time signal, when time signal Tip phase is ahead of signal Tim, when m- digital quantizer TDC1 will be defeated
The angle of incidence is converted to digital signal, and is sent into data selector；And due to when m- digital quantizer TDC2 the input of the end E when
Between signal Tim phase lag behind the end L input time signal Tim, output is fixed as 0.
The described control signal Ctrl is first of any time-digital quantizer output thermometer-code, i.e., when
M- digital quantizer TDC1 and when m- digital quantizer TDC2 between arbitrarily select a converter output control signal Ctrl,
For example, m- digital quantizer TDC1 output control signal Ctrl when selection, control signal Ctrl is that ' 0 ' or ' 1 ' respectively represent
When m- digital quantizer TDC1 output is 0 or is not 0, while the phase for also corresponding to input time signal Tip and Tim is closed
System.
Step S20, the digital signal of the data selector m- digital quantizer when being corresponded to according to control signal behavior,
And export the digital signal.
Data selector can according to when m- digital quantizer TDC1 and when m- digital quantizer TDC2 output judge
The phase information of input time signal Tip and Tim out；When controlling signal Ctrl is ' 1 ', data selector m- number when selecting
The output of word converter TDC1 is as a result, when controlling signal Ctrl is ' 0 ', data selector m- digital quantizer when selecting
The output of TDC2 is as a result, the digital output results D0 of available corresponding input time in turn.
Referring to Fig. 6, after the step S20, m- digital conversion method when described further include:
The digital signal that data selector exports is converted to binary code, i.e., thermometer-code is converted to two by step S30
Ary codes, and export.
Referring to Fig. 7, after the step S20, m- digital conversion method when described further include:
Step S40 splices control signal and digital signal, and using splicing result as input time corresponding number
Word result is exported.
When splicing, control signal is used as high position Ctrl, and digital signal obtains spliced signal D2 as low level；Generally
In the case of, splicing module is spliced the output result D1 after signal Ctrl is converted with thermometer-code-binary code is controlled, with
This obtains splicing result D2；
Referring to Fig. 8, after the step S20, m- digital conversion method when described further include:
Input time corresponding numeric results are converted to other code systems by step S50.
Referring to Fig. 9 and Fig. 4, m- digital conversion method when described, further includes:
Step S60 is received according to the clock cycle, is stored simultaneously output data.
In Fig. 2 structure conversion time still by when m- digital quantizer TDC1 and when m- digital quantizer TDC2 turned
Digital delay circuit limitation including the time is changed including data selector etc..Therefore, the present invention improves structure in Fig. 2, such as Fig. 4 institute
Show, increases by two groups of register groups and realize pile line operation to further speed up conversion speed；
Under the control of clock signal clk, circuit structure works in the way of assembly line in Fig. 4.First at first
Clock cycle, when m- digital quantizer TDC1 and when m- digital quantizer TDC2 in a parallel fashion by input time signal
Tip and Tim is converted to digital signal D3 and D4.As described above, at least one group data are 0 in digital signal D3 and D4, represent
The phase information of input time signal Tip and Tim.In second clock cycle, the first register group deposits digital signal D3
It is sent in data selector with D4 and by the data D5 and D6 after deposit；Digital signal D5 and D6 splicing obtain corresponding time input
The complement code of signal exports；According to actual needs by decoding circuit complement code to binary code and Green code etc., generation meets the requirements
Digital signal next one period of D7, D7 deposit and export final output Dout by the second register group.
tconv=tTDC+tDFF (3)
Wherein, tDFFIndicate the settling time of register group；The settling time of usual register is very short to be ignored；Therefore
Conversion speed can be significantly improved after increasing register group.
The above description is only a preferred embodiment of the present invention, is not intended to limit the scope of the invention, all at this
Under the inventive concept of invention, using equivalent structure transformation made by description of the invention and accompanying drawing content, or directly/use indirectly
It is included in other related technical areas in scope of patent protection of the invention.
Claims (5)
1. m- digital switching device when a kind of, which is characterized in that including data selector, first time-digital quantizer,
M- digital quantizer, thermometer-code-binary code conversion module, splicing module and decoding circuit, the first time-when two
M- digital quantizer structure is identical when digital quantizer is with described second and is connected in parallel, the first time-digital quantizer
First input end and it is described second when m- digital quantizer the second input terminal be respectively connected to first time signal, described
For the moment the second input terminal of m- digital quantizer and it is described second when m- digital quantizer first input end be respectively connected to
First time signal has dephased second time signal；
First time-the digital quantizer and it is described second when m- digital quantizer, for time signal to be converted to number
Signal, and the control signal for being used to select output translator and the digital signal are exported into data selector together；
The data selector, the digital signal of m- digital quantizer when for being corresponded to according to control signal behavior, and exporting should
Digital signal；
The thermometer-code-binary code conversion module, the digital signal that selector exports for receiving data, by digital signal
Binary code is converted to, i.e., thermometer-code is converted into binary code, and export；
The splicing module, control signal and the thermometer-code-binary code for exporting the data selector turn
The binary code of mold changing block output is spliced, and is exported splicing result as input time corresponding numeric results；
The decoding circuit, for carrying out code system conversion to input time corresponding numeric results.
2. m- digital switching device when as described in claim 1, which is characterized in that the control signal, when being any
First of the thermometer-code of m- digital quantizer output.
3. m- digital switching device when as described in claim 1, which is characterized in that m- digital switching device is also when described
Including at least two groups register group, the register group is used to receive according to the clock cycle, store simultaneously output data.
4. m- digital switching device when as described in claim 1, which is characterized in that the splicing module is for receiving number
According to the control signal and digital signal of selector output, control signal and digital signal are spliced, the splicing specifically:
Control signal is regard as a high position, using digital signal as low level.
5. m- digital conversion method when a kind of, applied to the when m- digital converting means as described in Claims 1-4 any one
It sets, which is characterized in that this method comprises:
The first input end of the first time-digital quantizer and it is described second when m- digital quantizer the second input terminal
Be respectively connected to first time signal, the second input terminal of the first time-digital quantizer and it is described second when m- number turn
The first input end of parallel operation is respectively connected to have dephased second time signal with first time signal, and time signal is converted
For digital signal, and for selecting the control signal of output translator and the digital signal to export together；
The digital signal of the data selector m- digital quantizer when being corresponded to according to control signal behavior, and export the number
Signal；
The digital signal that data selector exports is converted into binary code, i.e., thermometer-code is converted into binary code, and defeated
Out；
Control signal that the data selector exports and the binary code are spliced, and using splicing result as input
Time, corresponding numeric results were exported；
Input time corresponding numeric results are subjected to code system conversion.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710879837.1A CN107577139B (en) | 2017-09-25 | 2017-09-25 | When m- digital switching device and method |
| PCT/CN2018/106094 WO2019057017A1 (en) | 2017-09-25 | 2018-09-18 | Time-digital conversion device and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710879837.1A CN107577139B (en) | 2017-09-25 | 2017-09-25 | When m- digital switching device and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107577139A CN107577139A (en) | 2018-01-12 |
| CN107577139B true CN107577139B (en) | 2019-05-21 |
Family
ID=61039078
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710879837.1A Active CN107577139B (en) | 2017-09-25 | 2017-09-25 | When m- digital switching device and method |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN107577139B (en) |
| WO (1) | WO2019057017A1 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107577139B (en) * | 2017-09-25 | 2019-05-21 | 深圳锐越微技术有限公司 | When m- digital switching device and method |
| CN108549006B (en) * | 2018-03-30 | 2021-01-29 | 上海集成电路研发中心有限公司 | Self-error-detecting time-to-digital conversion circuit |
| CN116054865A (en) * | 2022-12-05 | 2023-05-02 | 华南理工大学 | Time-to-digital converter with sub-100 fs resolution of transmission line structure |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1719353A (en) * | 2005-06-21 | 2006-01-11 | 中国科学技术大学 | Time digital converter based on RPGA and its conversion method |
| CN101136632A (en) * | 2006-05-26 | 2008-03-05 | 瑞昱半导体股份有限公司 | Time-to-digital converter and method thereof |
| CN103257569A (en) * | 2013-05-23 | 2013-08-21 | 龙芯中科技术有限公司 | Circuit, method and system for time measurement |
| CN106019923A (en) * | 2016-05-18 | 2016-10-12 | 中国科学技术大学 | FPGA-based time-to-digital converter |
| CN106444345A (en) * | 2016-12-19 | 2017-02-22 | 深圳大学 | Time measurement circuit and method and measuring equipment |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102009047860B3 (en) * | 2009-09-30 | 2011-04-28 | Infineon Technologies Ag | Circuitry, analog-to-digital converter and method for converting time intervals |
| KR20120046843A (en) * | 2010-10-28 | 2012-05-11 | 에스케이하이닉스 주식회사 | Column-parallel cmos image sensor and column-parallel analog-digital conversion method using time to digital converter |
| CN104639165B (en) * | 2015-02-12 | 2017-11-21 | 天津大学 | Two step TDC full time-domain error correction circuit |
| CN105763196B (en) * | 2016-03-10 | 2018-11-27 | 中国科学技术大学 | A kind of delay interpolation type time-to-digit converter |
| CN107577139B (en) * | 2017-09-25 | 2019-05-21 | 深圳锐越微技术有限公司 | When m- digital switching device and method |
-
2017
- 2017-09-25 CN CN201710879837.1A patent/CN107577139B/en active Active
-
2018
- 2018-09-18 WO PCT/CN2018/106094 patent/WO2019057017A1/en active Application Filing
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1719353A (en) * | 2005-06-21 | 2006-01-11 | 中国科学技术大学 | Time digital converter based on RPGA and its conversion method |
| CN101136632A (en) * | 2006-05-26 | 2008-03-05 | 瑞昱半导体股份有限公司 | Time-to-digital converter and method thereof |
| CN103257569A (en) * | 2013-05-23 | 2013-08-21 | 龙芯中科技术有限公司 | Circuit, method and system for time measurement |
| CN106019923A (en) * | 2016-05-18 | 2016-10-12 | 中国科学技术大学 | FPGA-based time-to-digital converter |
| CN106444345A (en) * | 2016-12-19 | 2017-02-22 | 深圳大学 | Time measurement circuit and method and measuring equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107577139A (en) | 2018-01-12 |
| WO2019057017A1 (en) | 2019-03-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107577139B (en) | When m- digital switching device and method | |
| CN101897121B (en) | Time domain interpolation scheme for flash A/D converters | |
| CN102012717B (en) | Clock switching method and device | |
| CN108736897B (en) | Parallel-serial conversion circuit and device applied to high-speed interface physical layer chip | |
| CN101339738A (en) | Single line cascade chip for lamp point display | |
| CN101496367A (en) | Alignment and deskew for multiple lanes of serial interconnect | |
| CN100489821C (en) | Communication system for use between electronic devices and method thereof | |
| CN102832941B (en) | A kind of can the gradual approaching A/D converter of pre-detection comparator input range | |
| CN110120798A (en) | A kind of double DPWM circuits and its control method along triggering mixed structure | |
| CN207440315U (en) | A kind of photoelectric detection system | |
| CN109308275B (en) | System and method for converting orthogonal coding pulse | |
| CN106374898B (en) | Multichannel exports gating switch timing and generates structure | |
| KR100800487B1 (en) | Method of data coding in initial action and semiconductor memory device using the method | |
| CN201355878Y (en) | System for implementing synchronous renovation | |
| US6480512B1 (en) | Method and device for converting bit rate of serial data | |
| CN203813760U (en) | Shift frequency divider circuit | |
| CN102541797A (en) | Realizing method and system supporting multiple main machine interfaces | |
| CN102170290B (en) | Current mode analogue-to-digital converter capable of improving conversion accuracy | |
| US8593323B2 (en) | A/D conversion device | |
| CN102035548B (en) | Frequency divider | |
| CN207283515U (en) | A kind of digit order number increases device | |
| CN110417412A (en) | A kind of clock generation method, sequence circuit and analog-digital converter | |
| CN218299677U (en) | Simple and easy intelligent dial switch of interface that can expand wantonly | |
| CN1034383C (en) | Multibit decade-BCD code quick conversion circuit | |
| CN201682483U (en) | Phase-adjustable clock output circuit of improved high-speed analog-to-digital converter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |