CN107562587A - A kind of method of assessment signal link load - Google Patents
A kind of method of assessment signal link load Download PDFInfo
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- CN107562587A CN107562587A CN201710749138.5A CN201710749138A CN107562587A CN 107562587 A CN107562587 A CN 107562587A CN 201710749138 A CN201710749138 A CN 201710749138A CN 107562587 A CN107562587 A CN 107562587A
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Abstract
The invention provides a kind of method of assessment signal link load, described method includes:S1:Prepare linking element and testing tool to be tested;S2:The output amplitude Ai at mainboard end and the output amplitude Ao at testing backboard end are measured respectively;S3:Utilize formula IL=20logAo/AiCalculate link Insertion Loss value.This programme utilizes ripe signal eye diagram testing method, in the case where not increasing new tester, measurement jig, the test of mainboard external circuitses complete signal link insertion loss can be carried out, or signal cable insertion loss test, meet server product the design verification stage the needs of, greatly improve product quality.
Description
Technical field
The present invention relates to field of computer technology, specifically a kind of method of assessment signal link load.
Background technology
The communication solution of high speed hard-disk backboard, it is to be communicated with PCIe, SAS and SATA bus, in reality
Application in, it is so-called in order to consider use cost and communication quality, it is necessary to accurately be judged the Insertion Loss of signal link
Insertion Loss (English Insertion Loss, abbreviation IL), refer to that signal passes through signaling interface, signal cable and hard disk from mainboard end
The specific insertion loss of backplane interface.
At present, to verify signal quality, signal is carried on the back from hard disk with PCIe test smeltings tool, SAS or SATA test smelting tools
Accurately drawn in plate, signal eye diagram is obtained with reference to oscillograph and test software, finally, judge that signal passes through by line by eye pattern
After the complicated link of cable and some interfaces, whether signal still conforms to SPEC.
In above-mentioned verification process, although full link signal quality situation can be obtained, it is not known that complete chain
The specific Insertion Loss of road signal.
The content of the invention
In order to solve the above problems, there is provided a kind of method of assessment signal link load, utilize existing ripe test
Technology and method carry out the Insertion Loss of indirectly testing signal link or cable.
The embodiments of the invention provide a kind of method of assessment signal link load, described method includes:
S1:Prepare linking element and testing tool to be tested;
S2:The output amplitude Ai at mainboard end and the output amplitude Ao at testing backboard end are measured respectively;
S3:Utilize formula IL=-20log Ao/AiLink Insertion Loss value is calculated, wherein, IL is Insertion Loss value.
Further, in described step S1, linking element to be tested and testing tool include:Server master board,
Adapter, signal cable, high speed hard-disk backboard, oscillograph, signal testing smelting tool.
Further, step S2 specific implementation process is:
S21:Mainboard, adapter, signal testing smelting tool and oscillograph are connected into complete signal loop, start test eye
Scheme and calculate the output amplitude Ai at mainboard end;
S22:By mainboard, signal cable, high speed hard-disk backboard, signal testing smelting tool and oscillograph in same signal link
On connect into complete signal loop, start test eye pattern simultaneously calculates the output amplitude Ao at testing backboard end.
Further, described step S2 also includes:
S23:Repeat step S21, multiple Ai values are obtained, calculate the average value of multiple Ai values;
S24:Repeat step S22, multiple Ao values are obtained, calculate the average value of multiple Ao values.
Further, in described step S2, test eye pattern and calculate concretely comprising the following steps for amplitude:Same signal is measured to exist
Two width eye patterns under same speed, and extract range parameter respectively from two eye patterns, then respectively to being extracted in same eye pattern
To parameter take absolute value and do add operation, obtain two and value, two and value finally done into average value computing, obtain amplitude
Value.
The effect provided in the content of the invention is only the effect of embodiment, rather than whole effects that invention is all, above-mentioned
A technical scheme in technical scheme has the following advantages that or beneficial effect:
1st, this programme is not increasing the situation of new tester, test smelting tool using ripe signal eye diagram testing method
Under, so that it may the test of mainboard external circuitses complete signal link insertion loss, or the test of signal cable insertion loss are carried out, is met
Server product greatly improves product quality in the demand in design verification stage.
2nd, this programme is all by repeatedly measurement for numerical value, avoids the problem of single measurement easily produces error, greatly
The big accuracy for improving measurement result.
Brief description of the drawings
Fig. 1 is the method flow diagram of an embodiment of the present invention;
Fig. 2 is the schematic diagram of the next width eye pattern of one speed of PCIe signals;
Fig. 3 is the schematic diagram of another width eye pattern under the same speed of Fig. 2;
Fig. 4 is the PCIe Gen3 range parameters extracted from Fig. 2, Fig. 3;
Fig. 5 is the method flow diagram of another embodiment of the present invention.
Embodiment
For the technical characterstic for illustrating this programme can be understood, below by embodiment, and its accompanying drawing is combined, to this hair
It is bright to be described in detail.Following disclosure provides many different embodiments or example is used for realizing the different knots of the present invention
Structure.In order to simplify disclosure of the invention, hereinafter the part and setting of specific examples are described.In addition, the present invention can be with
Repeat reference numerals and/or letter in different examples.This repetition is that for purposes of simplicity and clarity, itself is not indicated
Relation between various embodiments are discussed and/or set.It should be noted that part illustrated in the accompanying drawings is not necessarily to scale
Draw.Present invention omits the description to known assemblies and treatment technology and process to avoid being unnecessarily limiting the present invention.
Embodiment 1
A kind of method of assessment signal link load as shown in Figure 1, described method comprise the following steps:
S1:Prepare linking element and testing tool to be tested, because the application is realized using eye pattern test philosophy,
Therefore, linking element to be tested includes server master board, adapter, signal cable, high speed hard-disk backboard, and testing tool includes
Oscillograph, signal testing smelting tool.
S2:The output amplitude Ai at mainboard end and the output amplitude Ao at testing backboard end are measured respectively, and specific implementation process is:
S21:One interface of adapter is connected to mainboard SATA mouths, then by the PCIe being connected with oscillograph test smelting tools
It is connected to another interface of adapter (hard-disk interface) so that mainboard, adapter, signal testing smelting tool and oscillograph connect into completely
Signal circuit, mainboard start, regulation oscillograph obtain waveform and preserved, and the wave file preserved is write into Signal Test
Software, obtain the data of range parameter, through data processing after, Ai can be obtained.
S22:The end of signal cable one is connected to mainboard SATA mouths, the other end and backboard SATA mouth (SATA interface and mainboard
SATA interface is a complete signal link in design principle) connect, the PCIe being connected with oscillograph test smelting tools are connected to
The hard-disk interface of hard disk backboard so that mainboard, signal cable, high speed hard-disk backboard, signal testing smelting tool and oscillograph are same
Complete signal loop, mainboard start are connected on one signal link, regulation oscillograph obtains waveform and preserved, the ripple that will have been preserved
Shape files write Signal Test softwares, obtain the data of range parameter, through data processing after, Ai can be obtained.
For the more preferable apparent principle using eye diagram measurement, tested and illustrated with PCIe, is described with reference to the drawings.
Two width eye patterns under phase same rate can be obtained by the measurement to PCIe signals, as Fig. 2, Fig. 3 composition one is complete
Whole eye pattern, Fig. 4 are PCIe Gen3 (signal rate 8Gbps, frequency 4GHz) relevant parameter of amplitude.By in each frames of Fig. 4
Two values, which take absolute value, to be done add operation and obtains two and value, then the two and value are done into average value computing, with regard to that can obtain target
Range value.
S3:Utilize formula IL=-20log Ao/AiLink Insertion Loss value is calculated, wherein, IL is Insertion Loss value.The principle of the step
It is as follows:
Insertion loss refers to the loss of the bearing power occurred in the somewhere of Transmission system due to the insertion of element or device,
It is expressed as work(received in same load after the upper received power of load before the element or device insertion and insertion
Ratio of the rate in units of decibel.
Original calculation formula is:IL=-10log Po/Pi, wherein:Pi is enter into the luminous power of input port, and unit is
mw;Po is the luminous power received from output port, unit mw.
It can be seen from original calculation formula, as long as the power output for measuring respectively at 2 points can be obtained by corresponding Insertion Loss.
At present, the method that can be utilized is exactly that measuring signal integrality obtains eye pattern, and we can obtain following letter from signal eye diagram
Number parameter:Eye is high, eye is wide, pupil distance degree, eye intersect ratio, level"1", level "0", mean power etc..Signal testing method at present
In (here with PCIe method of testings to illustrate), obtain signal eye diagram, the information such as pupil distance degree, eye are high, eye is wide can be obtained,
And there is specific numerical value.
Eye pattern is to be superimposed by just profound ripple and formed, the energy of a just profound ripple and square directly proportional P ∝ A of amplitude2.Cause
This, as long as respectively obtaining the output amplitude Ai at mainboard end and the output amplitude Ao at testing backboard end, can just utilize original calculation public
The replacement formula of formula calculates.
Substituting formula is:Wherein, Ai is the output amplitude at mainboard end, and Ao is testing backboard end
Output amplitude.
Formula will be substituted according to Computing Principle and carry out equivalence transformation, just finally given calculation formula IL=-20log Ao/
Ai。
Embodiment 2
A kind of method of assessment signal link load as shown in Figure 5, described method comprise the following steps:
S1:Prepare linking element and testing tool to be tested, because the application is realized using eye pattern test philosophy,
Therefore, linking element to be tested includes server master board, adapter, signal cable, high speed hard-disk backboard, and testing tool includes
Oscillograph, signal testing smelting tool.
S2:The output amplitude Ai at mainboard end and the output amplitude Ao at testing backboard end are measured respectively, and specific implementation process is:
S21:One interface of adapter is connected to mainboard SATA mouths, then by the PCIe being connected with oscillograph test smelting tools
It is connected to another interface of adapter (hard-disk interface) so that mainboard, adapter, signal testing smelting tool and oscillograph connect into completely
Signal circuit, mainboard start, regulation oscillograph obtain waveform and preserved, and it is soft that the wave file preserved is write into SignalTest
Part, obtain the data of range parameter, through data processing after, Ai can be obtained.
S22:The end of signal cable one is connected to mainboard SATA mouths, the other end and backboard SATA mouth (SATA interface and mainboard
SATA interface is a complete signal link in design principle) connect, the PCIe being connected with oscillograph test smelting tools are connected to
The hard-disk interface of hard disk backboard so that mainboard, signal cable, high speed hard-disk backboard, signal testing smelting tool and oscillograph are same
Complete signal loop, mainboard start are connected on one signal link, regulation oscillograph obtains waveform and preserved, the ripple that will have been preserved
Shape files write SignalTest softwares, obtain the data of range parameter, through data processing after, Ai can be obtained.
S23:Repeat step S21, multiple Ai values are obtained, calculate the average value of multiple Ai values, and be averaged what is be calculated
Value is brought into final calculation formula as Ai values.
S24:Repeat step S22, multiple Ao values are obtained, calculate the average value of multiple Ao values, and be averaged what is be calculated
Value is brought into final calculation formula as Ao values.
For the more preferable apparent principle using eye diagram measurement, tested and illustrated with PCIe, is described with reference to the drawings.
Two width eye patterns under phase same rate can be obtained by the measurement to PCIe signals, as Fig. 2, Fig. 3 composition one is complete
Whole eye pattern, Fig. 4 are PCIeGen3 (signal rate 8Gbps, frequency 4GHz) relevant parameter of amplitude.By in each frames of Fig. 4
Two values, which take absolute value, to be done add operation and obtains two and value, then the two and value are done into average value computing, with regard to that can obtain target
Range value.
S3:Utilize formula IL=-20log Ao/AiLink Insertion Loss value is calculated, wherein, IL is Insertion Loss value.The principle of the step
It is as follows:
Insertion loss refers to the loss of the bearing power occurred in the somewhere of Transmission system due to the insertion of element or device,
It is expressed as work(received in same load after the upper received power of load before the element or device insertion and insertion
Ratio of the rate in units of decibel.
Original calculation formula is:IL=-10log Po/Pi, wherein:Pi is enter into the luminous power of input port, and unit is
mw;Po is the luminous power received from output port, unit mw.
It can be seen from original calculation formula, as long as the power output for measuring respectively at 2 points can be obtained by corresponding Insertion Loss.
At present, the method that can be utilized is exactly that measuring signal integrality obtains eye pattern, and we can obtain following letter from signal eye diagram
Number parameter:Eye is high, eye is wide, pupil distance degree, eye intersect ratio, level"1", level "0", mean power etc..Signal testing method at present
In (here with PCIe method of testings to illustrate), obtain signal eye diagram, the information such as pupil distance degree, eye are high, eye is wide can be obtained,
And there is specific numerical value.
Eye pattern is to be superimposed by just profound ripple and formed, the energy of a just profound ripple and square directly proportional P ∝ A of amplitude2.Cause
This, as long as respectively obtaining the output amplitude Ai at mainboard end and the output amplitude Ao at testing backboard end, can just utilize original calculation public
The replacement formula of formula calculates.
Substituting formula is:Wherein, Ai is the output amplitude at mainboard end, and Ao is testing backboard end
Output amplitude.
Formula will be substituted according to Computing Principle and carry out equivalence transformation, just finally given calculation formula IL=-20log Ao/
Ai。
Although specification and drawings and examples have been carried out being described in detail to the invention, this area skill
Art personnel should be appreciated that and still the invention can be modified or equivalent substitution;And all do not depart from wound of the present invention
The technical scheme for the spirit and scope made and its improvement, it is encompassed by among the protection domain of the invention patent.
Claims (5)
1. a kind of method of assessment signal link load, it is characterized in that:Described method includes:
S1:Prepare linking element and testing tool to be tested;
S2:The output amplitude Ai at mainboard end and the output amplitude Ao at testing backboard end are measured respectively;
S3:Utilize formula IL=-20log Ao/AiLink Insertion Loss value is calculated, wherein, IL is Insertion Loss value.
2. a kind of method of assessment signal link load according to claim 1, it is characterized in that:In described step S1,
Linking element and testing tool to be tested includes:Server master board, adapter, signal cable, high speed hard-disk backboard, oscillography
Device, signal testing smelting tool.
3. a kind of method of assessment signal link load according to claim 2, it is characterized in that:Step S2 specific implementation
Process is:
S21:Mainboard, adapter, signal testing smelting tool and oscillograph are connected into complete signal loop, start test eye pattern is simultaneously
Calculate the output amplitude Ai at mainboard end;
S22:Mainboard, signal cable, high speed hard-disk backboard, signal testing smelting tool and oscillograph are connected on same signal link
Complete signal loop is connected into, start test eye pattern simultaneously calculates the output amplitude Ao at testing backboard end.
4. a kind of method of assessment signal link load according to claim 3, it is characterized in that:Described step S2 is also wrapped
Include:
S23:Repeat step S21, multiple Ai values are obtained, calculate the average value of multiple Ai values;
S24:Repeat step S22, multiple Ao values are obtained, calculate the average value of multiple Ao values.
5. a kind of method of assessment signal link load according to claim 3, it is characterized in that:In described step S2,
Test eye pattern simultaneously calculates concretely comprising the following steps for amplitude:Measure two width eye patterns of the same signal under same speed, and from two eyes
Range parameter is extracted in figure respectively, then the parameter extracted in same eye pattern is taken absolute value respectively and does add operation, is obtained
Two and value are finally done average value computing, obtain range value by two and value.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN110674000A (en) * | 2019-10-09 | 2020-01-10 | 西安易朴通讯技术有限公司 | Signal testing method and device |
CN115695075A (en) * | 2022-10-24 | 2023-02-03 | 苏州浪潮智能科技有限公司 | Link loss compensation method, device, server, electronic equipment and storage medium |
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CN106771696A (en) * | 2015-11-25 | 2017-05-31 | 中车大连电力牵引研发中心有限公司 | MVB uniformity test frock casees |
CN206402245U (en) * | 2017-02-03 | 2017-08-11 | 北京经纬恒润科技有限公司 | A kind of test board |
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Patent Citations (3)
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CN106771696A (en) * | 2015-11-25 | 2017-05-31 | 中车大连电力牵引研发中心有限公司 | MVB uniformity test frock casees |
CN105703853A (en) * | 2015-12-30 | 2016-06-22 | 国网智能电网研究院 | Broadband wireless channel attenuation test system used for transformer station site |
CN206402245U (en) * | 2017-02-03 | 2017-08-11 | 北京经纬恒润科技有限公司 | A kind of test board |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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CN110674000A (en) * | 2019-10-09 | 2020-01-10 | 西安易朴通讯技术有限公司 | Signal testing method and device |
CN110674000B (en) * | 2019-10-09 | 2023-04-07 | 西安易朴通讯技术有限公司 | Signal testing method and device |
CN115695075A (en) * | 2022-10-24 | 2023-02-03 | 苏州浪潮智能科技有限公司 | Link loss compensation method, device, server, electronic equipment and storage medium |
CN115695075B (en) * | 2022-10-24 | 2024-06-25 | 苏州浪潮智能科技有限公司 | Link loss compensation method, device, server, electronic equipment and storage medium |
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