CN107547025A - The redundancy fault-tolerant control system and method for ultrahigh speed permagnetic synchronous motor - Google Patents
The redundancy fault-tolerant control system and method for ultrahigh speed permagnetic synchronous motor Download PDFInfo
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Abstract
The invention discloses a kind of redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor and method.The system includes two sets of identical remaining control units, wherein each comprising DSP module, FPGA module, AD sampling modules, Signal-regulated kinase, level switch module, communication module, power management module.Method is:Signal-regulated kinase receives DC bus-bar voltage and threephase stator voltage, current signal, and is nursed one's health;AD sampling modules sample to the signal after conditioning, and send DSP module to by FPGA module;DSP module obtains the 6 road pwm control signals for drive system by the Direct Torque Control algorithm of closed loop;Judge to produce the control signal for blocking PWM simultaneously;FPGA module receives 6 road pwm control signals, judges whether to block the output of the pwm control signal of current channel FPGA module, and enable another set of remaining control unit.The redundancy fault-tolerant that the present invention is applied to ultrahigh speed permagnetic synchronous motor controls, and has the advantages of precision is high, highly reliable.
Description
Technical field
The present invention relates to technical field of motors, particularly a kind of redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor
And method.
Background technology
Process technology develops rapidly, has promoted high speed, the fast development of high-precision numerical control machine, super high speed motor main shaft
As the key feature of high-end numerical control machine, its performance indications directly determines the development level of high-end numerical control machine.It is high
Speed asynchronous induction machine is used widely in every field by more ripe manufacturing process, while corresponding driving
Control technology is also more ripe.Induction rotor is used yet with asynchronous induction machine, torque density is relatively low, rotor damage
Consumption is serious, in fast state rotor can be caused to produce larger heat, and exist motor operation efficiency is low, power density is low,
The problems such as dynamic response is slow, speed stabilizing is difficult, therefore more occasions for being less than 20000r/min used in rotating speed.
As the further improvement of the development of permanent-magnet material, and motor manufacturing technology, permagnetic synchronous motor are low in
High Speed Field is gradually developed into fast field.But current permagnetic synchronous motor due to the limitation of control technology mostly apply with
High speed situation, the requirement of Ultra high Speed CNC Machine Tools can not be met.At the same time, at present using more single control system individual
When other part breaks down, it is easy to cause whole system out of control, have a strong impact on machining accuracy and processing progress.
The content of the invention
It is an object of the invention to provide a kind of ultrahigh speed permagnetic synchronous motor for the high reliability for being capable of stable operation
Redundancy fault-tolerant control system.
The technical solution for realizing the object of the invention is:A kind of redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor
System, comprising two sets of identical remaining control units, wherein including DSP module (1), FPGA moulds in each remaining control unit
Block, AD sampling modules, Signal-regulated kinase, level switch module, communication module, power management module, it is described:
Signal-regulated kinase receives DC bus-bar voltage and threephase stator voltage, current signal, and is nursed one's health;
AD sampling modules FPGA module controlling cycle, to Signal-regulated kinase nurse one's health after DC bus-bar voltage and
Threephase stator electric current is sampled, and sends the data after sampling to DSP module by FPGA module;
DSP module receives the speed command that host computer is sent, the dc bus electricity then collected using AD sampling modules
Pressure and threephase stator current data estimate motor speed and rotor-position, so as to by the Direct Torque Control algorithm of closed loop,
Obtain the 6 road pwm control signals for drive system;DSP module calculates estimation rotating speed simultaneously and the target of host computer output turns
Error between speed, and compared with a upper error, if error persistently increases, output block PWM control signal is extremely
FPGA module;
FPGA module receives 6 road pwm control signals of DSP module output, while judges the direct current of AD sampling modules input
Busbar voltage, threephase stator voltage signal, threephase stator current signal, motor temperature signal, reach setting in above-mentioned signal
Alert if or when receiving the control signal for the block PWM that DSP module is exported, the PWM controls of block current channel FPGA module
The output of signal processed, and another set of remaining control unit is enabled, pwm control signal is exported and isolated to the driving in drive system
Module;
The pwm control signal that level switch module exports to FPGA module carries out power amplification;
Communication module is used to realize the communication between DSP module and host computer;
The voltage conversion that power management module is used to export power module in drive system is into each chip in control system
Required voltage.
Further, the DSP module includes clock circuit, reset circuit and debugging module, and DSP module is female according to direct current
Line voltage and stator current data are estimated to obtain spinner velocity and rotor-position signal, with reference to host computer by serial ports send to
Determine tach signal, the electromagnetic torque, stator magnetic linkage and phase angle information of ultrahigh speed permagnetic synchronous motor is calculated;By torque ratio
Compared with the reference voltage needed for the error input pi regulator acquisition SVPWM modules of device, SVPWM modules are utilized to calculate fundamental voltage arrow
Amount and its action time, export 6 road pwm control signals.
Further, the FPGA module includes clock circuit, reset circuit;
When FPGA module not from drive system obtain over-pressed, under-voltage, excessively stream driving malfunction signal and pwm signal meet it is mutual
During bolt part, by the pwm control signal of process logic judgment by drive system parallel output to drive system;Otherwise, stop
This remaining control unit exports pwm control signal to drive system, and Reflector signal is transferred into DSP module, opens standby
With remaining control unit.
Further, the AD sampling modules use model AD7606 A/D chip, in the controlling cycle of FPGA module
To DC bus-bar voltage, threephase stator electric current and the motor operation measured by the Hall sensor after Signal-regulated kinase
During stator core temperature and the running temperature of driving plate power device sampled, export to FPGA module and carry out logic
Judge.
Further, the Signal-regulated kinase includes DC bus-bar voltage modulate circuit, threephase stator current regulating electricity
Road and temperature detection modulate circuit, wherein:
DC bus-bar voltage modulate circuit is made up of voltage follower and mu balanced circuit, for adjusting Hall voltage sensor
Output voltage;
Threephase stator current regulating circuit realizes the sampling of threephase stator current signal using precision resistance, and adds 5V
Bi-directional voltage stabilizing pipe, adjust the output current of Hall current sensor;
Temperature detection modulate circuit uses surface-mounted PT100 temperature sensors, is close to module to be measured in drive system
Radiator corresponding to device carrys out the temperature of monitoring driving system power module, and in the stator core of ultrahigh speed permagnetic synchronous motor
Adjacent position is provided with temperature detecting resistance, monitors the rectification module of drive system and the running status of inversion module.
Further, the level switch module uses model 74LCX3245 noninverting level conversion transceiver, right
The pwm control signal of FPGA module output carries out power amplification so that 6 road pwm control signals of FPGA module output are by electricity
Multiple light-coupled isolation driving chips of rear direct-driving motor drive system are changed in flat turn, realize the inversion processing of dc source.
Further, the communication module turns ethernet module including CAN module, RS485 modules and serial ports;
In the debugging stage, DSP module uploads permagnetic synchronous motor rotating speed by RS485 modules and current information, host computer lead to
Cross RS485 modules and issue rotating speed of target;
Operation phase, the data for turning ethernet module progress DSP module and host computer by CAN module and serial ports are led to
Letter, realize control and the running state monitoring of synchronous motor.
Further, the power management module is used for the 24V voltages for exporting power module in drive system, is converted into
+ 1.2V ,+1.5V ,+3.3V in control system needed for each chip, ± 15V voltages.
A kind of redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor, comprises the following steps:
Step 1, Hall voltage sensor and Hall current sensor measure the DC bus-bar voltage in drive system respectively
With threephase stator voltage, electric current, and measurement result is output to Signal-regulated kinase;
Step 2, AD sampling modules are in the controlling cycle of FPGA module, the direct current after nursing one's health process Signal-regulated kinase
Busbar voltage and threephase stator electric current are sampled, and the digital data after sampling is transmitted by the SPI modules of FPGA module
To DSP module;
Step 3, DSP module is estimated to obtain spinner velocity and rotor-position according to DC bus-bar voltage and stator current data
Signal, the given rotating speed signal of serial ports transmission is passed through with reference to host computer, the electromagnetism that ultrahigh speed permagnetic synchronous motor is calculated turns
Square, stator magnetic linkage and phase angle information;The error input pi regulator of torque comparator is obtained to the reference needed for SVPWM modules
Voltage, basic voltage vectors and its action time are calculated using SVPWM modules, export 6 road pwm control signals;DSP module simultaneously
The error between estimation rotating speed and the rotating speed of target of host computer output is calculated, and compared with a upper error, if error continues
Increase, then output block PWM control signal to FPGA module;
Step 4, FPGA module receives 6 road pwm control signals of DSP module output, while judges that AD sampling modules input
DC bus-bar voltage, threephase stator voltage signal, threephase stator current signal, motor temperature signal, reach in above-mentioned signal
The alert if of setting or when receiving the control signal for the block PWM that DSP module is exported, blocks current channel FPGA module
The output of pwm control signal, and another set of remaining control unit is enabled, pwm control signal is exported to the drive in drive system
Dynamic isolation module;
Step 5, drive system receives 6 road pwm control signals, and into three-phase alternating current and DC inverter is output into motor
Stator side motor operates.
Compared with prior art, its remarkable advantage is the present invention:(1) using double remaining Redundant Controls, using individually every
Motor speed reaches 20000r/min during one channel control unit;(2) it can stablize when certain a set of control unit breaks down and change
Run using another set of control unit, there is the reliability of broader speed adjustable range and Geng Gao.
Brief description of the drawings
Fig. 1 is the hardware structure diagram of the redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor of the present invention.
Fig. 2 is the structured flowchart of single remaining control unit.
Fig. 3 is FPGA interface relation schematic diagram.
Fig. 4 is active and standby unit redundancy fault-tolerant processing scheme block diagram.
Embodiment
With reference to Fig. 1~4, the redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor of the present invention, two sets of complete phases are included
Same remaining control unit, wherein including DSP module 1, FPGA module 2, AD sampling modules 3, letter in each remaining control unit
Number conditioning module 4, level switch module 5, communication module 6, power management module 7, it is described:
Signal-regulated kinase 4 receives DC bus-bar voltage and threephase stator voltage, current signal, and is nursed one's health;
AD sampling modules 3 are in the controlling cycle of FPGA module 2, the dc bus electricity after nursing one's health Signal-regulated kinase 4
Pressure and threephase stator electric current are sampled, and send the data after sampling to DSP module 1 by FPGA module 2;
DSP module 1 receives the speed command that host computer is sent, the dc bus then collected using AD sampling modules 3
Voltage and threephase stator current data estimate motor speed and rotor-position, so as to be calculated by the Direct Torque Control of closed loop
Method, obtain the 6 road pwm control signals for drive system;DSP module 1 calculates estimation rotating speed and the mesh of host computer output simultaneously
The error between rotating speed is marked, and compared with a upper error, if error persistently increases, output block PWM control signal
To FPGA module 2;
FPGA module 2 receives the 6 road pwm control signals that DSP module 1 exports, while judges that AD sampling modules 3 input straight
Busbar voltage, threephase stator voltage signal, threephase stator current signal, motor temperature signal are flowed, reaches setting in above-mentioned signal
Alert if or when receiving the control signal for the block PWM that DSP module 1 is exported, block current channel FPGA module
The output of 2PWM control signals, and another set of remaining control unit is enabled, pwm control signal is exported to the drive in drive system
Dynamic isolation module;
The pwm control signal that level switch module 5 exports to FPGA module 2 carries out power amplification;
Communication module 6 is used to realize the communication between DSP module 1 and host computer;
The voltage conversion that power management module 7 is used to export power module in drive system is into each chip in control system
Required voltage.
As a kind of specific example, the DSP module 1 includes clock circuit, reset circuit and debugging module, DSP module 1
Estimate to obtain spinner velocity and rotor-position signal according to DC bus-bar voltage and stator current data, with reference to host computer by going here and there
The given rotating speed signal that mouth is sent, electromagnetic torque, stator magnetic linkage and the phase angle letter of ultrahigh speed permagnetic synchronous motor is calculated
Breath;The error input pi regulator of torque comparator is obtained into the reference voltage needed for SVPWM modules, utilizes SVPWM module meters
Basic voltage vectors and its action time are calculated, exports 6 road pwm control signals.
As a kind of specific example, the FPGA module 2 includes clock circuit, reset circuit;
When FPGA module 2 does not obtain over-pressed, under-voltage, excessively stream driving malfunction signal and pwm signal satisfaction from drive system
During interlocking condition, by the pwm control signal of process logic judgment by drive system parallel output to drive system;Otherwise, stop
Remaining control unit exports pwm control signal to drive system here, and Reflector signal is transferred into DSP module 1, opens
Stand-by redundancy control unit.
As a kind of specific example, the AD sampling modules 3 use model AD7606 A/D chip, in FPGA module 2
Controlling cycle to the DC bus-bar voltage, the threephase stator electric current that are measured by the Hall sensor after Signal-regulated kinase 4
And stator core temperature in motor operation course and the running temperature of driving plate power device are sampled, and are exported to FPGA
Module 2 carries out logic judgment.
As a kind of specific example, the Signal-regulated kinase 4 includes DC bus-bar voltage modulate circuit, threephase stator electricity
Modulate circuit and temperature detection modulate circuit are flowed, wherein:
DC bus-bar voltage modulate circuit is made up of voltage follower and mu balanced circuit, for adjusting Hall voltage sensor
Output voltage;
Threephase stator current regulating circuit realizes the sampling of threephase stator current signal using precision resistance, and adds 5V
Bi-directional voltage stabilizing pipe, adjust the output current of Hall current sensor;
Temperature detection modulate circuit uses surface-mounted PT100 temperature sensors, is close to module to be measured in drive system
Radiator corresponding to device carrys out the temperature of monitoring driving system power module, and in the stator core of ultrahigh speed permagnetic synchronous motor
Adjacent position is provided with temperature detecting resistance, monitors the rectification module of drive system and the running status of inversion module.
As a kind of specific example, the level switch module 5 uses model 74LCX3245 noninverting level conversion
Transceiver, power amplification is carried out to the pwm control signal that FPGA module 2 exports so that the 6 road PWM controls that FPGA module 2 exports
Multiple light-coupled isolation driving chips of signal direct-driving motor drive system after level conversion, realize the inverse of dc source
Change is handled.
As a kind of specific example, the communication module 6 turns ether including CAN module, RS485 modules and serial ports
Net module;
In the debugging stage, DSP module 1 uploads permagnetic synchronous motor rotating speed by RS485 modules and current information, host computer lead to
Cross RS485 modules and issue rotating speed of target;
Operation phase, ethernet module is turned by CAN module and serial ports and carries out DSP module 1 and the data of host computer
Communication, realize control and the running state monitoring of synchronous motor.
As a kind of specific example, the power management module 7 is used for the 24V electricity for exporting power module in drive system
Pressure, is converted into+1.2V ,+1.5V ,+3.3V needed for each chip in control system, ± 15V voltages.
A kind of redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor, comprises the following steps:
Step 1, Hall voltage sensor and Hall current sensor measure the DC bus-bar voltage in drive system respectively
With threephase stator voltage, electric current, and measurement result is output to Signal-regulated kinase 4;
Step 2, AD sampling modules 3 FPGA module 2 controlling cycle, to by Signal-regulated kinase 4 nurse one's health after
DC bus-bar voltage and threephase stator electric current are sampled, the SPI modules that the digital data after sampling is passed through into FPGA module 2
Send DSP module 1 to;
Step 3, DSP module 1 is estimated to obtain spinner velocity and rotor position according to DC bus-bar voltage and stator current data
Confidence number, the given rotating speed signal of serial ports transmission is passed through with reference to host computer, the electromagnetism of ultrahigh speed permagnetic synchronous motor is calculated
Torque, stator magnetic linkage and phase angle information;The error input pi regulator of torque comparator is obtained to the ginseng needed for SVPWM modules
Voltage is examined, basic voltage vectors and its action time is calculated using SVPWM modules, exports 6 road pwm control signals;DSP moulds simultaneously
Block 1 calculates the error between estimation rotating speed and the rotating speed of target of host computer output, and compared with a upper error, if error is held
Continue increase, then output block PWM control signal to FPGA module 2;
Step 4, FPGA module 2 receives the 6 road pwm control signals that DSP module 1 exports, while judges that AD sampling modules 3 are defeated
DC bus-bar voltage, threephase stator voltage signal, threephase stator current signal, the motor temperature signal entered, reaches in above-mentioned signal
To the alert if of setting or when receiving the control signal for the block PWM that DSP module 1 is exported, current channel FPGA is blocked
The output of module 2PWM control signals, and another set of remaining control unit is enabled, pwm control signal is exported in drive system
Driving isolation module;
Step 5, drive system receives 6 road pwm control signals, and into three-phase alternating current and DC inverter is output into motor
Stator side motor operates.
Embodiment 1
The embodiment of the present invention is further described below in conjunction with the accompanying drawings:
With reference to Fig. 1, ultrahigh speed permagnetic synchronous motor redundancy fault-tolerant control system include two sets identical controller A with
B, the ultrahigh speed drive control of ultrahigh speed permagnetic synchronous motor is realized by two sets of identical drive systems.
With reference to Fig. 2, in each remaining control unit in ultrahigh speed control system for permanent-magnet synchronous motor comprising DSP module 1,
FPGA module 2, AD sampling modules 3, Signal-regulated kinase 4, level switch module 5, communication module 6, power management module 7, together
When devise fault-tolerant processing scheme between main-slave control cell.
DSP module 1 is mainly made up of clock circuit, reset circuit and debugging module, for receiving the speed of host computer transmission
Degree instruction, the DC bus-bar voltage and stator three-phase current signal data estimation then collected using AD sampling modules 3 go out electricity
Machine speed and rotor-position, so as to by the Direct Torque Control algorithm of closed loop, obtain the 6 road PWM controls for drive system
Semaphore.
FPGA module 2 also includes the chip groundwork parts such as clock circuit, reset circuit, as shown in Figure 3.FPGA module
2 as aid decision mechanism, when it does not obtain the driving malfunction such as over-pressed, under-voltage, excessively stream signal and pwm signal from drive system
When meeting interlocking condition, by by the pwm control signal of logic judgment by drive system parallel output to drive system, otherwise
Stop this control unit and export pwm control signal to drive system, and Reflector signal is transferred to DSP module 1, open standby
With control unit, using standby driving control system, ensure the safety continuous operation of ultrahigh speed permagnetic synchronous motor system.FPGA
Module 2 controls the work schedule of AD sampling modules 3 and therefrom reads the DC bus-bar voltage and stator three-phase current by conversion
Data output to DSP module 1 carries out speed estimate.
AD sampling modules 3 use model AD7606 A/D chip, to passing through signal condition mould in FPGA controlling cycles
Determine in DC bus-bar voltage, stator three-phase current and motor operation course that Hall sensor after the conditioning of block 4 measures
Sub- iron core temperature and the running temperature of driving plate power device are sampled, and are exported to FPGA module 2 and are carried out logic judgment.
Signal-regulated kinase 4 includes DC bus-bar voltage modulate circuit, threephase stator current regulating circuit and temperature detection
Modulate circuit.Wherein, DC bus-bar voltage modulate circuit is made up of voltage follower and mu balanced circuit, makes Hall voltage sensor
Output voltage is more steady.Stator three-phase current modulate circuit realizes stator three-phase current signal using high-precision precision resistance
Sampling, and 5V bi-directional voltage stabilizing pipe is added, it ensure that the outputting current steadily of Hall current sensor.Temperature detection conditioning electricity
Radiator in drive system near module device to be measured is close to using surface-mounted PT100 temperature sensors and driven to monitor in road
The temperature of dynamic system power module, and the built-in temperature detecting resistance near the stator core of ultrahigh speed permagnetic synchronous motor, exactly
Monitor the rectification module of drive system and the running status of inversion module.
Level switch module 5 uses model 74LCX3245 noninverting level conversion transceiver, defeated to FPGA module 2
The pwm control signal gone out carries out power amplification so that the 6 road pwm signals that FPGA module 2 exports can be straight after level conversion
Multiple light-coupled isolation driving chips of motor drive system are connect, realize the inversion processing of dc source.
Communication module 6 turns ethernet module including CAN module, RS485 modules and serial ports.Debugging stage, DSP moulds
Block 1 uploads permagnetic synchronous motor rotating speed and current information by RS485 modules, and host computer issues target by RS485 modules and turned
Speed, it is simple and easy.Operation phase, above- mentioned information then by CAN module and serial ports turn ethernet module carry out DSP module with
The data communication of host computer, realize control and the running state monitoring of synchronous motor.
Power management module 7 is used for the 24V voltage conversions that power module in drive system exports into each in control system
The voltages such as+the 1.2V needed for chip ,+1.5V ,+3.3V, ± 15V, the normal operation of Guarantee control system.
The redundancy fault-tolerant processing scheme includes sentencing wrong treatment mechanism and interlocking mechanism, as shown in Figure 4.Sentence wrong treatment mechanism
Sentence wrong and software including hardware and sentence mistake, be judged to when FPGA module 2 obtains the fault-signal such as over-pressed, under-voltage, excessively stream from drive system
Drive system failure, this is that hardware sentences mistake.Estimation rotating speed and the speed error required by host computer are calculated in DSP module 1, and
Compared with a upper error, controller failure is judged to if its lasting increase, this is that software sentences mistake.Sentence wrong can successfully close to work as
Preceding control unit simultaneously opens standby control unit, ensures the safety continuous operation of ultrahigh speed permagnetic synchronous motor system.Meanwhile it is
The guarantee same time has and only a set of control unit operation, adds interlocking mechanism, two control units all provide interlocking and patrolled
Collect signal so that when a set of control unit is run, another control unit mechanism strictly turns off, and realizes double redundant control systems
Stable operation.
Further, ultrahigh speed control system for permanent-magnet synchronous motor monocycle Whole Work Flow is as follows:
Step 1, Hall voltage sensor and Hall current sensor measure the DC bus-bar voltage in drive system respectively
With threephase stator voltage, electric current, and measurement result is output to Signal-regulated kinase 4.
Step 2, A/D module 3 FPGA module controlling cycle to by Signal-regulated kinase 4 nurse one's health after to direct current
Busbar voltage and stator current are sampled, and the digital data after sampling is sent to by the SPI modules of FPGA module 2
DSP module 1.
Step 3, the spinner velocity and rotor that DSP module 1 is estimated to obtain according to DC bus-bar voltage and stator current data
Position signalling, the given rotating speed signal of serial ports transmission is passed through with reference to host computer, passes through coordinate transform and permagnetic synchronous motor mathematics
The information such as the electromagnetic torque, stator magnetic linkage and its phase angle of ultrahigh speed permagnetic synchronous motor are calculated in model.By torque ratio compared with
The error input pi regulator of device obtains the reference voltage needed for SVPWM modules.Basic voltage vectors are calculated using SVPWM modules
And its action time, export 6 road pwm control signals.DSP module 1 calculates estimation rotating speed simultaneously and the target of host computer output turns
Error between speed, and compared with a upper error, if error persistently increases, output block PWM control signal is extremely
FPGA module 2.
Step 4, FPGA module 1 receives the 6 road pwm control signals that DSP module 2 exports, while judges what A/D module 3 inputted
Stator three-phase voltage, electric current, busbar voltage, motor temperature signal, reach the alert if of setting in above-mentioned signal or receive
During the locking signal of DSP module 1, the output of the FPGA module pwm control signal of current channel is blocked, and enables another set of control
Unit, then pwm control signal amount is exported to the driving isolation module in drive system.
Step 5, drive system receives 6 road pwm control signals, and into three-phase alternating current and DC inverter is output into motor
Stator side motor stably runs at high speed.
In summary, the system uses motor speed during independent each channel control unit using double remaining Redundant Controls
Reach 20000r/min, conversion can be stablized when certain a set of control unit breaks down and run using another set of control unit, compared
There is the reliability of broader speed adjustable range and Geng Gao in common electric machine system.
Claims (9)
1. a kind of redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor, it is characterised in that identical comprising two sets
Remaining control unit, wherein each remaining control unit in comprising DSP module (1), FPGA module (2), AD sampling modules (3),
Signal-regulated kinase (4), level switch module (5), communication module (6), power management module (7), it is described:
Signal-regulated kinase (4) receives DC bus-bar voltage and threephase stator voltage, current signal, and is nursed one's health;
AD sampling modules (3) are in the controlling cycle of FPGA module (2), the dc bus after nursing one's health Signal-regulated kinase (4)
Voltage and threephase stator electric current are sampled, and send the data after sampling to DSP module (1) by FPGA module (2);
DSP module (1) receives the speed command that host computer is sent, the dc bus then collected using AD sampling modules (3)
Voltage and threephase stator current data estimate motor speed and rotor-position, so as to be calculated by the Direct Torque Control of closed loop
Method, obtain the 6 road pwm control signals for drive system;DSP module (1) calculates estimation rotating speed and host computer output simultaneously
Error between rotating speed of target, and compared with a upper error, if error persistently increases, output block PWM control letter
Number to FPGA module (2);
FPGA module (2) receives 6 road pwm control signals of DSP module (1) output, while judges AD sampling modules (3) input
DC bus-bar voltage, threephase stator voltage signal, threephase stator current signal, motor temperature signal, reach in above-mentioned signal and set
Fixed alert if or when receiving the control signal for the block PWM that DSP module (1) is exported, blocks current channel FPGA moulds
The output of block (2) pwm control signal, and another set of remaining control unit is enabled, pwm control signal is exported in drive system
Driving isolation module;
The pwm control signal that level switch module (5) exports to FPGA module (2) carries out power amplification;
Communication module (6) is used to realize communication of the DSP module (1) between host computer;
The voltage conversion that power management module (7) is used to export power module in drive system is into each chip institute in control system
The voltage needed.
2. the redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor according to claim 1, it is characterised in that described
DSP module (1) includes clock circuit, reset circuit and debugging module, and DSP module (1) is according to DC bus-bar voltage and stator electricity
Fluxion is it is estimated that obtain spinner velocity and rotor-position signal, with reference to given rotating speed signal of the host computer by serial ports transmission, meter
Calculation obtains the electromagnetic torque, stator magnetic linkage and phase angle information of ultrahigh speed permagnetic synchronous motor;The error of torque comparator is defeated
Enter the reference voltage needed for pi regulator acquisition SVPWM modules, when calculating basic voltage vectors and its effect using SVPWM modules
Between, export 6 road pwm control signals.
3. the redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor according to claim 1, it is characterised in that described
FPGA module (2) includes clock circuit, reset circuit;
When FPGA module (2) not from drive system obtain over-pressed, under-voltage, excessively stream driving malfunction signal and pwm signal meet it is mutual
During bolt part, by the pwm control signal of process logic judgment by drive system parallel output to drive system;Otherwise, stop
This remaining control unit exports pwm control signal to drive system, and Reflector signal is transferred into DSP module (1), opens
Stand-by redundancy control unit.
4. the redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor according to claim 1, it is characterised in that described
AD sampling modules (3) use model AD7606 A/D chip, FPGA module (2) controlling cycle to pass through signal condition mould
Stator in DC bus-bar voltage, threephase stator electric current and motor operation course that Hall sensor after block (4) measures
Iron core temperature and the running temperature of driving plate power device are sampled, and are exported to FPGA module (2) and are carried out logic judgment.
5. the redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor according to claim 1, it is characterised in that described
Signal-regulated kinase (4) includes DC bus-bar voltage modulate circuit, threephase stator current regulating circuit and temperature detection conditioning electricity
Road, wherein:
DC bus-bar voltage modulate circuit is made up of voltage follower and mu balanced circuit, for adjusting Hall voltage sensor output
Voltage;
Threephase stator current regulating circuit realizes the sampling of threephase stator current signal using precision resistance, and adds the double of 5V
To voltage-stabiliser tube, the output current of Hall current sensor is adjusted;
Temperature detection modulate circuit uses surface-mounted PT100 temperature sensors, is close to module device to be measured in drive system
Corresponding radiator carrys out the temperature of monitoring driving system power module, and adjacent in the stator core of ultrahigh speed permagnetic synchronous motor
Position is provided with temperature detecting resistance, monitors the rectification module of drive system and the running status of inversion module.
6. the redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor according to claim 1, it is characterised in that described
Level switch module (5) uses model 74LCX3245 noninverting level conversion transceiver, to FPGA module (2) output
Pwm control signal carries out power amplification so that 6 road pwm control signals of FPGA module (2) output are direct after level conversion
Multiple light-coupled isolation driving chips of motor drive system, realize the inversion processing of dc source.
7. the redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor according to claim 1, it is characterised in that described
Communication module (6) turns ethernet module including CAN module, RS485 modules and serial ports;
In the debugging stage, DSP module (1) uploads permagnetic synchronous motor rotating speed by RS485 modules and current information, host computer pass through
RS485 modules issue rotating speed of target;
Operation phase, the data for turning ethernet module progress DSP module (1) and host computer by CAN module and serial ports are led to
Letter, realize control and the running state monitoring of synchronous motor.
8. the redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor according to claim 1, it is characterised in that described
Power management module (7) is used for the 24V voltages for exporting power module in drive system, is converted into each chip institute in control system
+ 1.2V ,+the 1.5V ,+3.3V needed, ± 15V voltages.
9. a kind of redundancy fault-tolerant control system of ultrahigh speed permagnetic synchronous motor, it is characterised in that comprise the following steps:
Step 1, Hall voltage sensor and Hall current sensor measure the DC bus-bar voltage and three in drive system respectively
Phase stator voltage, electric current, and measurement result is output to Signal-regulated kinase (4);
Step 2, AD sampling modules (3) FPGA module (2) controlling cycle, to by Signal-regulated kinase (4) conditioning after
DC bus-bar voltage and threephase stator electric current sampled, the SPI by the digital data after sampling by FPGA module (2)
Module sends DSP module (1) to;
Step 3, DSP module (1) is estimated to obtain spinner velocity and rotor-position according to DC bus-bar voltage and stator current data
Signal, the given rotating speed signal of serial ports transmission is passed through with reference to host computer, the electromagnetism that ultrahigh speed permagnetic synchronous motor is calculated turns
Square, stator magnetic linkage and phase angle information;The error input pi regulator of torque comparator is obtained to the reference needed for SVPWM modules
Voltage, basic voltage vectors and its action time are calculated using SVPWM modules, export 6 road pwm control signals;DSP module simultaneously
(1) error between estimation rotating speed and the rotating speed of target of host computer output is calculated, and compared with a upper error, if error is held
Continue increase, then output block PWM control signal to FPGA module (2);
Step 4, FPGA module (2) receives 6 road pwm control signals of DSP module (1) output, while judges AD sampling modules (3)
DC bus-bar voltage, threephase stator voltage signal, threephase stator current signal, the motor temperature signal of input, in above-mentioned signal
When reaching the alert if of setting or receiving the control signal for the block PWM that DSP module (1) is exported, current channel is blocked
The output of FPGA module (2) pwm control signal, and another set of remaining control unit is enabled, pwm control signal is exported to driving
Driving isolation module in system;
Step 5, drive system receives 6 road pwm control signals, and into three-phase alternating current and DC inverter is output into motor stator
Side motor operating.
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