CN107545076A - A kind of superjunction MOS device terminal emulation method - Google Patents
A kind of superjunction MOS device terminal emulation method Download PDFInfo
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- CN107545076A CN107545076A CN201610460308.3A CN201610460308A CN107545076A CN 107545076 A CN107545076 A CN 107545076A CN 201610460308 A CN201610460308 A CN 201610460308A CN 107545076 A CN107545076 A CN 107545076A
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Abstract
The present invention proposes a kind of equivalent simulation method for high pressure superjunction MOS device terminal emulation.It is characterized in：A kind of equivalent model emulation mode is proposed, is formed by being stacked with the PN junction of the equidistant equal in width of prototype part terminal trenches, and each several part mixes that species is identical with concentration, and the horizontal breakdown voltage of former terminal can be substantially simulated using it.It is advantageous in that：The general configuration for the terminal that meets the requirements can be comparatively fast found, equivalent structure is simple, and simulated program is simple, and simulation velocity is fast, saves the time.
Description
Technical field
The present invention relates to semiconductor devices to emulate field, specially a kind of emulation mode of superjunction MOS device terminal.
Background technology
In addition to designing the MOS primitive cell structures of device region, most design time is used in for the design of superjunction MOS device
In device terminal design of Simulation, traditional emulation mode is that primitive unit cell and terminal emulate together, because the process structure of primitive unit cell is answered
Miscellaneous, required emulation fineness is high, therefore simulation time is very long, is unfavorable for frequent adjusting and optimizing terminal structure.The content of the invention
Terminal emulation method proposed by the present invention solves above mentioned problem, substantially reduce conventional terminal emulation required for when
Between.
The present invention proposes a kind of superjunction MOS device terminal emulation method, it is characterised in that comprises the following steps, first will
Super-junction terminal structure is reduced to a kind of equivalent structure, and the equivalent structure does not include primitive unit cell area, terminal part is reduced to stack
PN junction, the part of former terminal groove is represented in the equivalent structure（3）Width and doping situation and former terminal（1）It is identical, institute
State the spacing between the part that former terminal groove is represented in equivalent structure（4）With doping situation and former terminal（2）It is identical, it is described etc.
Imitate the thickness of structure（6）With the gash depth of former terminal（5）It is equal；Then, the breakdown that this equivalent model both ends can be carried
Voltage is emulated, and equivalent structure is adjusted repeatedly, reach after targeted breakdown voltage again to former terminal structure simulation simultaneously
It is finely adjusted, obtains final design scheme.
The software that the emulation mode is applied can be Silvaco TCAD or Sentaurus TCAD.
As a result of above-mentioned emulation mode, compared with existing scheme, the invention has the advantages that：
Because the structure of equivalent model is simple, required emulation grid is not required to very accurate complexity, can quickly draw mesh substantially
Terminal structure is marked, shortens the time required for device simulation, and then saves design time cost, improves design efficiency.
Brief description of the drawings
Fig. 1 is the schematic diagram of ordinary high pressure MOS device terminal.
Fig. 2 is the schematic diagram of equivalent simulation model.
Embodiment
To enable the features described above of the present invention, objects and advantages more obvious understandable, below in conjunction with the accompanying drawings to the present invention
Embodiment be described in detail.Because the present invention focuses on explanation principle, therefore, do not draw to scale completely.
Embodiment：A kind of emulation mode of superjunction MOS device terminal.
The present invention proposes a kind of equivalent simulation scheme for superjunction MOS device terminal emulation.It is characterized in：We are super
Junction termination structures are reduced to a kind of equivalent structure, and this structure eliminates primitive unit cell area, and terminal part is reduced to the PN of vertical stack
Tie, the groove of former terminal is represented in PN junction（3）Width and mix situation and former terminal（1）It is identical, spacing between groove（4）And ginseng
Miscellaneous situation and former terminal（2）It is identical, the thickness of equivalent structure（6）With the ditch slot thickness of former terminal（5）It is equal.We are equivalent to this
The breakdown voltage that model both ends can carry carry out emulation can draw with former terminal similar in breakdown voltage, thus can letter
Change simulation process, comparatively fast draw simulation result, then terminal structure is adjusted, finally former terminal structure simulation is gone forward side by side again
Row fine setting, obtains final design scheme.
For above-described embodiment only to be made a detailed explanation to present disclosure, its object is to allow the technology of this area
Personnel are familiar with the particular content of the present invention and implemented according to this.Any equivalence changes that all Spirit Essences without departing from the present invention are done
Or modification, it should all belong within protection scope of the present invention.
Claims (2)
- A kind of 1. superjunction MOS device terminal emulation method, it is characterised in that comprise the following steps, first by super-junction terminal structure A kind of equivalent structure is reduced to, the equivalent structure does not include primitive unit cell area, the PN junction that terminal part is reduced to stack, described etc. The part of former terminal groove is represented in effect structure（3）Width and doping situation and former terminal（1）It is identical, generation in the equivalent structure Spacing between the part of table former terminal groove（4）With doping situation and former terminal（2）It is identical, the thickness of the equivalent structure （6）With the gash depth of former terminal（5）It is equal；Then, the breakdown voltage that can be carried to this equivalent model both ends emulates, Equivalent structure is adjusted repeatedly, reaches after targeted breakdown voltage and to former terminal structure simulation and to be finely adjusted again, obtain Final design scheme.
- 2. emulation mode according to claim 1, it is characterised in that the software that the emulation mode is applied is Silvaco TCAD or Sentaurus TCAD.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610460308.3A CN107545076A (en) | 2016-06-23 | 2016-06-23 | A kind of superjunction MOS device terminal emulation method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610460308.3A CN107545076A (en) | 2016-06-23 | 2016-06-23 | A kind of superjunction MOS device terminal emulation method |
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| Publication Number | Publication Date |
|---|---|
| CN107545076A true CN107545076A (en) | 2018-01-05 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN201610460308.3A Pending CN107545076A (en) | 2016-06-23 | 2016-06-23 | A kind of superjunction MOS device terminal emulation method |
Country Status (1)
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050082570A1 (en) * | 2003-10-21 | 2005-04-21 | Srikant Sridevan | Superjunction device with improved ruggedness |
| US20080197409A1 (en) * | 2005-12-14 | 2008-08-21 | Freescale Semiconductor, Inc. | Superjunction power mosfet |
| CN102468334A (en) * | 2010-11-19 | 2012-05-23 | 无锡华润上华半导体有限公司 | VDMOS (Vertical Double-diffusion Metal Oxide Semiconductor Structure) device and manufacturing method thereof |
-
2016
- 2016-06-23 CN CN201610460308.3A patent/CN107545076A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050082570A1 (en) * | 2003-10-21 | 2005-04-21 | Srikant Sridevan | Superjunction device with improved ruggedness |
| US20080197409A1 (en) * | 2005-12-14 | 2008-08-21 | Freescale Semiconductor, Inc. | Superjunction power mosfet |
| CN102468334A (en) * | 2010-11-19 | 2012-05-23 | 无锡华润上华半导体有限公司 | VDMOS (Vertical Double-diffusion Metal Oxide Semiconductor Structure) device and manufacturing method thereof |
Non-Patent Citations (1)
| Title |
|---|
| 张斌: "高压IGBT的设计与实现及功率器件可靠性研究", 《中国博士学位论文全文数据库》 * |
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Application publication date: 20180105 |
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