CN107534745A - Imaging sensor with integrated power saving control - Google Patents
Imaging sensor with integrated power saving control Download PDFInfo
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- CN107534745A CN107534745A CN201580079351.9A CN201580079351A CN107534745A CN 107534745 A CN107534745 A CN 107534745A CN 201580079351 A CN201580079351 A CN 201580079351A CN 107534745 A CN107534745 A CN 107534745A
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- post processing
- image sensor
- pel array
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- processing block
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/50—Constructional details
- H04N23/555—Constructional details for picking-up images in sites, inaccessible due to their dimensions or hazardous conditions, e.g. endoscopes or borescopes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/60—Control of cameras or camera modules
- H04N23/65—Control of camera operation in relation to power supply
- H04N23/651—Control of camera operation in relation to power supply for reducing power consumption by affecting camera operations, e.g. sleep mode, hibernation mode or power off of selective parts of the camera
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/60—Control of cameras or camera modules
- H04N23/667—Camera operation mode switching, e.g. between still and video, sport and normal or high- and low-resolution modes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/745—Circuitry for generating timing or clock signals
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
The invention discloses a kind of integrated image sensor circuit with multiple power modes.The integrated circuit includes：Pel array；Simulated block, it handles the analog signal associated with the pel array, wherein, the simulated block includes analog-digital converter (ADC)；And first control circuit, it is to be in enabling/disabling the simulated block without the replacement frame of active reading or the simulated block is configured into high/low power mode in reading frame according to the pel array.The integrated image sensor circuit more may include to post-process block, and second control circuit, it is to be in without the replacement frame actively read being the high-power mode or the low-power mode to enable/disable the post processing block or configure the post processing block in the reading frame according to the pel array.
Description
Technical field
The present invention relates to integrated image sensor circuit.Especially, the present invention relates to using multiple power modes to reduce work(
The image sensing integrated circuit of consumption.
Background technology
It is known in the art to be imaged the device of body cavity or passage in vivo, and including endoscope and autonomous capsule
Change camera.Endoscope is to enter internal flexibility or rigid pipe by body hole or surgical opening, generally via oral cavity
Enter colon into esophagus or per rectum.By using lens in distal end formation image and by relay-lens system or relevant
Fibre bundle is by the image transmitting to external near-end.Conceptive similar instrument may be for example by using CCD or CMOS array
Image is recorded in remote electronic, and electrical signals are regard the view data as by cable and are sent to near-end.Endoscope allows to cure
Life controls visual field and is widely accepted diagnostic tool.But, they have some limitations really, and wind is brought for patient
Danger, is invasive and uncomfortable for patient, and their cost limits them as general health screening instruments
Application.
Due to being difficult to that through tortuous passageway, endoscope most of small intestine can not be reached easily, and need to increase cost
Particular technology and precautionary measures reach whole colon.Endoscopic risks include passed through organ may perforate and by
Complication caused by anesthesia.Moreover, must be in the journey related to health risk and with anesthesia of the patient pain during the program
Traded off after sequence between idle hours.The necessary inpatient medical of endoscope, spends the plenty of time of clinician, therefore is expensive
's.
A kind of in-vivo image sensor that substitutes for solving many of which problem of these problems is capsule endoscope.Camera with
Radio transmitter is placed in swallowable capsule together, and the radio transmitter is to external base station receiver or receipts
Hair device and data logger transmission mainly include the data for the image that the digital camera is recorded.The capsule may also comprise to
The radio receiver of instruction or other data is received from base station transmitter.Instead of radio frequency transmission, low frequency electromagnetic signals can be used.
Power can be supplied or by the battery supplied in the capsule from inner inductor inductance of the external inductance into the capsule.It is based on
Wireless capsule camera system may require that patient wears wireless transceiver and data logger to receive and record captured figure
Picture.The capsule cameras can stop more than ten hours in vivo.Therefore, patient may have to comfortlessly wear the nothing for a long time
Line data sink bag.
Entitled " the In Vivo Autonomous Camera with On-Board being approved on July 19th, 2011
Data Storage or Digital Wireless Transmission in Regulatory Approved Band's "
The autonomous capsule camera system with data storage on plate is disclosed in U.S. Patent number 7,983,458.Should with what is stored on plate
Capsule cameras is by the picture archiving captured in nonvolatile memory on plate.After the capsule cameras leaves human body, the glue
Capsule camera is retrieved.Then, by the outside port in the capsule cameras access the capsule cameras being retrieved this is non-volatile
Property memory in stored image.The image can be processed and be shown in viewing website and be checked by diagnostician.
Capsule camera system is generally made up of optical lens or lens combination and Photosensing Units.The Photosensing Units is
Based on passing through various processing procedures such as CMOS (complementary metal-oxide semiconductor；Complementary metal aoxidizes
Thing semiconductor) or CCD (charge-coupled device；Charge coupled device) integrated circuit sensor manufactured by processing procedure.
Cmos image sensor just becomes to be becoming increasingly popular and be now widely used in various digital imagery applications.Traditionally,
Light sensing apparatus has the Photosensing Units (being referred to as pixel) for being arranged in one-dimensional (a line) or two-dimentional (many rows and columns) array.
The pel array and the image alignment formed by related optical lens combination are simultaneously located in the depth of focus of the optical system.Each picture
The incident light of the corresponding exposure pixel of element provides electrically output.
For capsule cameras application, capsule apparatus must advance for a long time in human body.Moreover, capsule apparatus is generally by electricity
Pond provides power.During people's in-vivo imaging intestines and stomach, capsule cameras may must capture ten hundreds of images.Image
Sensor is one of main power consumption device.Therefore, if imaging sensor provides power, such CMOS figures by disposable battery
As the power consumption of sensor is an important factor for limiting such system lifetim.If providing power by rechargeable battery, power consumption will
Determine the usage time between charging twice.Therefore, it is desirable to reduce the power consumption of imaging sensor.
Capsule camera system is generally by one or more cmos image sensors, LED light source, image procossing ASIC
(application specific integrated circuit；Application specific integrated circuit) and other components composition.To keep glue
Capsule camera is easily swallowed, and the physical size of capsule cameras becomes to be restricted very much.Therefore, in the usual very little of battery and capsule cameras
The power consumption of all component (including imaging sensor) turns into the problem of most important.Therefore, it is desirable to develop with power save control
Make to extend the imaging sensor of battery life.
The content of the invention
The invention discloses a kind of integrated image sensor circuit with multiple power modes.Implementation according to the present invention
Example, the integrated circuit include：Pel array, it captures the image of projection thereon；Simulated block, it is handled closes with the pel array
The analog signal of connection, wherein, the simulated block includes analog-digital converter (analog to digital convertor；ADC)；With
And first control circuit, it is to be in enabling without the replacement frame of active reading in reading frame according to the pel array
Or it is high-power mode or low-power mode to disable the simulated block or configure the simulated block.For what is operated with global shutter pattern
The integrated image sensor circuit, the period before being read the corresponding replacement since the overall situation of the replacement frame to immediately the first row.It is right
To immediately in integrated image sensor circuit operated with rolling shutter pattern, the corresponding replacement since the first row of the replacement frame
Period before the first row reading.
According to one embodiment, when the pel array is in the reading frame, enables the simulated block or be configured as this
High-power mode, and when the pel array is in without the replacement frame actively read, disables the simulated block or configuration should
Simulated block is the low-power mode.In another embodiment, to the simulated block within the short time interval before the reading frame starts
Upper electricity, and the short time interval is dependent on the stabilization time associated with least one simulated block.The short time interval can have small such as one
The scope of musec order or the scope as large as a millisecond magnitude.The simulated block may also include biasing circuit, reference circuit, gain
Amplifier or any combination.In one embodiment, the reading frame powers off once completing to the simulated block.
In another embodiment, the integrated image sensor circuit further includes post processing block, and second control circuit,
It is to be in the reading frame after enabling or disabling this without the replacement frame actively read according to the pel array
The post processing block is configured to the high-power mode or the low-power mode by process block.When the pel array is in the reading frame
When can to enable the post processing block or configure the post processing block be the high-power mode.When the pel array is in without actively reading
The replacement frame when can to disable the post processing block or configure the post processing block be the low-power mode.It can be started in the reading frame
To electric on the post processing block in preceding short time interval, wherein, the short time interval depends on the stabilization time associated with the post processing block, with
And wherein, the stabilization time associated with the post processing block is shorter than the stabilization time associated with the simulated block.The reading frame one
Denier is completed, i.e., the simulated block and the post processing block is powered off.The post processing block may also include noise reduction, demosaicing, edge
Sharpen, color format is changed or any combination.
In yet another embodiment, the integrated image sensor circuit further includes configurable timing circuit, and the 3rd control
Circuit processed, its according to the pel array be in the reading frame be in without actively read the replacement frame come configure this can
Timing circuit is configured, to provide high clock frequency or low clock frequency for the integrated image sensor circuit.When the pel array
During in the reading frame, the configurable timing circuit is configured to provide the high clock frequency, and when the pel array is in not
When having the replacement frame actively read, the configurable timing circuit is configured to provide the low clock frequency.
The integrated image sensor circuit more may include adjuster, and the 4th control circuit, and it is according to the pel array
Be in the reading frame be in without actively read the replacement frame come configure the adjuster with provide high current output or
Low current exports.When configuring the adjuster to provide high current output, the adjuster causes higher quiescent current.When this
When pel array is in the reading frame, the adjuster is configured to provide high current output, and do not have when the pel array is in
During the replacement frame actively read, the adjuster is configured to provide low current output.
Brief description of the drawings
Fig. 1 shows the example layout with the two-dimensional array for supporting row and horizontal drive circuit.
Fig. 2 shows to operate the example timing diagram of two-dimensional array.
The integrated image sensor circuit that Fig. 3 displays include multiple power modes according to one embodiment of the present of invention shows
Example operational flowchart.
Embodiment
It will be understood that the component of the invention summarized and shown in accompanying drawing here can be with a variety of configurations
To arrange and design.Therefore, being described in more detail simultaneously to the embodiment of the system and method for the invention shown in accompanying drawing below
The claimed the scope of the present invention of not intended to limit, and only it is the representative of the selected embodiment of the present invention.In this specification
" one embodiment ", " embodiment " or the similar language mentioned refer to associate with the embodiment special characteristic of explanation, structure or
Characteristic may include at least one embodiment of the present invention.Therefore, the appearance that do not exist together in this manual is " in an implementation
In example " or the saying such as " in embodiment " be not necessarily all referring to the same embodiment.
Moreover, described feature, structure or characteristic can be combined in any suitable manner in one or more embodiments.
But, those skilled in the relevant art will realize that the present invention without one or more details or can pass through it
Its method, component etc. are implemented.In other examples, known structure or operation are not shown or described in detail, to avoid obscuring this hair
Bright aspect.The example embodiment of the present invention is better understood with by referring to accompanying drawing, similar reference represents in accompanying drawing
Similar part.Following explanation is merely illustrative, the simple declaration device and method consistent with claimed invention here
Some selected embodiments.
Conventional digital camera generally has the optical imagery road using the image sensing IC for including two-dimentional (2D) pel array
Footpath.The imaging sensor is located on or near the focal plane of the optical imaging path, the center of the 2D pel arrays and the optics
The center alignment of image path.Fig. 1 shows typical imaging sensor 100, and it includes 2D pel arrays 110, line driver electricity
Road 120 and column driver circuit 130.The 2D pel arrays 100 are configured with the two-dimentional sensing element of n rows and m row.Each row
It is essentially identical.If the pel array is used as into color sensor, can apply with different figures at the top of the pel array
The colour filter of case.The location of pixels of the 2D arrays is denoted as (x, y), wherein, x represents horizontal level and y represents upright position.
Coordinate x and y also represents the row number and line number of the 2D pel arrays respectively.Although the pixel in the example that Fig. 1 is shown in all rows
All vertical alignments, but some pel arrays can have offset pattern line by line.For example, pel array can have half-pix in every line
Skew.
In the horizontal direction, the common electrical signals provided by line driver 120 are shared with the pixel in a line.Row driving
Device 120 by the pel array corresponding n rows independent horizontal drive circuit RD1, RD2 ..., RDn forms.Except independent horizontal drive circuit
In addition, line driver 120 also includes common assemblies 122, and the common assemblies support all independent horizontal drive circuits.Similarly,
Pixel in same row shares the common electrical signals provided by column circuits 130.Column circuits 130 are by common assemblies 132 and are somebody's turn to do
Pel array corresponding m row independent column drive circuit CD1, CD2 ..., CDm composition.
Fig. 2 is shown to the example timing diagram of the 2D pel arrays 100 in operation diagram 1.To operate the pel array, in electricity
Lotus accumulates and resets the pixel column before being read from the sensing element.Respectively for row 1,2,3 and n show reset signal 211,
212nd, 213 and 214.Independent horizontal drive circuit produces the corresponding reset signal.For example, reset signal 211 is by horizontal drive circuit RD1
Produced for the 1st row.In the example indicated by short high RST (221, resetting pulse), the 1st row is reset and the pixel column will
Start integrated optical signal.The independent horizontal drive circuit RD2 of 2nd row produces timing signal 212, and it is included by the replacement of 222 signs
Pulse is to reset the 2nd row.Corresponding a line cycle time difference between signal 221 and signal 222.Similarly, timing signal 213 by
Independent horizontal drive circuit RD3 produces for the 3rd row, and resetting pulse 223 falls behind a line cycle of reset signal 222.For the picture
Remaining row of pixel array continues this action until last column is reset.Although showing that pulse signal resets corresponding line in Fig. 2,
But other signals type can also be used.Such as, it is possible to use the rising edge of upward transient signal such as positive pulse or downward transient state
The trailing edge of signal such as positive pulse triggers the replacement.
Charge accumulated for a period of time after, read the charge signal from the pel array in a row by row fashion.As it was previously stated,
After the resetting pulse, the sensing element starts to accumulate the electric charge caused by incident light.Fig. 2 is shown is operated alone circuit by this
Caused read output signal.For example, the independent horizontal drive circuit RD1 of the 1st row produces timing signal 231, it includes read pulse 241
To trigger the reading of the 1st row.After the resetting pulse 221 for the 1st row integrated charge, the read pulse is in the case where wanting
Occur.Each read output signal 241 is betided for the read pulse 242 and 243 of the 2nd row and the read output signal 232 and 233 of the 3rd row
And a line cycle after 242.Proceed to all rows for the read pulse of remaining row and read.Again, although showing arteries and veins in Fig. 2
Rushing signal starts reading out corresponding line, but other signals type can also be used.For example, also can be by for example positive arteries and veins of upward transient signal
The rising edge of punching or the trailing edge of downward transient signal such as positive pulse are used as read output signal.
Timing scheme shown in Fig. 2 is referred to as rolling shutter operation.For Video Applications, the timing letter shown in Fig. 2
Repeat number frame by frame to form picture frame stream, it is also referred to as video sequence.As shown in Fig. 2 timing signal, by using the rolling
Dynamic shutter operation, each row is in slightly different period integrated optical signal.Two adjacent rows have the replacement for being separated by a line cycle
Time, electric charge accumulating time and readout time.Time difference between 1st row and last column about separates a frame, and it may
It is considerably long.Therefore, the gained picture of rapid moving object may undergo so-called rolling shutter noise (rolling shutter
artifact).One performance of rolling shutter noise is that the vertical row is in the figure captured when vertical row rapid horizontal
Become diagonal in piece.
The period for resetting the pel array is referred to as resetting frame., should in fig. 2 in the example of shown rolling shutter operation
Reset the frame corresponding period from the first row resetting pulse to last column resetting pulse.Similarly, frame is read to be defined as
From the first row read pulse to the period of last column read pulse.As shown in Figure 2, frame 250 is reset with reading frame 260
With certain overlapping.Lap depends on the integrated time and reads the sum (n) of row.If the integrated time is short, the 1st row is read
Go out the short time generation after corresponding resetting pulse 221 of pulse 241.This will cause to reset between frame 250 and corresponding reading frame 260
Greater overlap.On the other hand, if integrated time length, overlapping to become smaller.The integrated time is once longer than the n row cycles,
Then resetting frame 250 will be at all not overlapping with reading frame 260.
Although display scrolling shutter operation in Fig. 2, other replacement schemes, such as global replacement can also be used, wherein, institute
Have and be about to be reset simultaneously, rather than order is reset line by line.For the sensor operated with global shutter pattern, although resetting frame
Can be very short, but still frame is read with normal, because the pattern matrix needs to read with each a line.
For typical sensor, the replacement frame from during reading frame, it is necessary to different circuits.For example, in the reading
During frame, it would be desirable to chain is entirely read, wherein, the reading chain may include biasing and reference circuit, gain amplifier, analog-to-digital conversion
Device (analog to digital convertor；) and output interface ADC.For on-chip system (system-on-chip；
SOC) design, output that also can be to the pel array during the reading frame performs specific numeral post processing.During this period, should
Sensor will be needed to be run equal to or higher than the clock frequency of the pixel rate.Post processing for imaging sensor is ability
Known technology in domain.The post processing, which may include to be selected from, includes noise reduction, demosaicing, edge sharpening and color format conversion
Group process technique one or more of which.
On the other hand, need not the reading chain and the numeral during there is no the overlapping replacement frame with the reading frame
Post processing these components it is wherein most of or whole.For simple pixel, specific timing generator would only need to
The line driver is driven, to produce resetting pulse for each row.Such signal is generally in relatively low compared with the pixel rate
Frequency.Even for more complicated pixel, only limited amount simulated block, such as the benchmark for charge pump circuit will be stilled need.
Other components, especially those components in the reading chain and any post processing block will not needed.In nonoverlapping replacement
Pixel clock can be closed during frame, further to save power.
By above-mentioned observation, by selectively matching somebody with somebody to component selectivity power-off/disabling on different pieces or by component on piece
The power consumption of imaging sensor can be reduced by being set to different power modes.In one embodiment of the invention, in the replacement frame phase
Between, by wherein most of or whole power-off/disable or be configured as low-power mould to post-processing block on the simulated block and piece
Formula, power for causing the imaging sensor is greatly reduced for this.The extremely short time before the reading frame starts, will be to these moulds
It is electric on plan block/to enable or be configured as high-power mode, so that when the reading frame starts, component is ready for benefit reason on the piece
The pixel output of the sensor array.In advance to definite Time Dependent electric on these blocks in the stabilization time of these simulated blocks
(settling time) and it can change in the range of from several microseconds to millisecond.Can be with slightly different wakeup time with similar
Mode wakes up or enabled post processing digital block, because these post processing digital blocks are generally quickly stablized than this simulated block.Read
Go out and once complete, you can the reading chain simulated block and post processing digital block are powered off or disabled again, until needing to read again
The pel array.Term " high-power mode " and " low-power mode " they are relative terms, wherein, with the low-power mode phase
Than the high-power mode makes the imaging sensor consume more power.Therefore, the high-power mode can correspond to normal power mould
Formula, and the low-power mode can correspond to the pattern that less power is used than the normal mode.
Moreover, current most of cmos image sensors include a certain amount of digital circuit, even with without after
The non-SOC sensors of process circuit.One example is timing generator, and it produces different timing arteries and veins for the imaging sensor
Punching.Further to reduce sensor power, such digital block can use different clock frequency operations, depending on the sensor is place
In the replacement frame or the reading frame that no active is read., can be to the digital block when the sensor is not at the reading frame
Slower clock is provided, to reduce the power consumption of the digital block.The reading frame once, you can sent to the digital block faster
Clock, operate the simulation so as to produce and read chain and the higher frequency signal needed for any post processing digital block.
In some cmos sensors, different electric current deliverabilities is provided using adjuster on piece, thinks other electricity
Road block provides power.This makes some blocks (especially digital block) to be operated with the different voltages from single power supply.Regulation
Quiescent current in device circuit is internal consumption electric current, is not useable for loading.The quiescent current is usually as non-loaded input
Current measurement.Correspondingly, the quiescent current represents the inefficient source of the adjuster.Generally, it is capable of supply that the regulation of high current
Device will cause higher quiescent current.Therefore, adjuster should match required electric current, further to save power.But, generally
Have between the response speed that the quiescent current and adjuster consumed can react to load change compromise.According to the present invention
One embodiment, the adjuster with the imaging sensor of adjuster on piece can operate with least two different patterns.When
When the sensor is not at reading frame, clock operation that the sensor can be slower and can be to any post processing block power-off, with drop
Low-power consumption.Therefore, power supply caused by adjuster changes the load with very little and small load on the piece.In this feelings
Under condition, the adjuster can operate or small using low current adjuster, wherein quiescent current in the low power mode.The sensor is once
Into reading frame, it would be desirable to the larger current from the adjuster.In the case, the adjuster is grasped with higher power mode
Make or use high current adjuster.Therefore, the power consumption of the cmos image sensor can further be reduced.
To reduce imaging sensor power consumption present invention can apply to general sensor, wherein, reset frame with read frame
May be overlapping.But, it must be particularly noted that especially for row driving electricity during the design and layout of integrated image sensor
Road.Substantial amounts of changed power can betide sensor into when reading frame.This high-power change can cause greatly on sensor IC
Disturbance.Because imaging sensor is very sensitive to such disturbance, therefore line displacement may be visible in the view data captured.Can
Implement row noise compensation design to reduce such influence.
Present invention may also apply to do not have overlapping cmos image sensor between reading frame and replacement frame.Fig. 3 is shown in
The exemplary sensors configuration during the different phase of sensor is operated under video mode.The sequential begins with normal power mould
The reading frame i-1 of formula (or high-power mode), as seen in step 310.In the normal power mode, by the sensor configuration
It is as follows：
● to electric on all analog circuits and post processing circuitry (if any)；
● provide normal (or high) frequency clock to digital block and timing generator；And
● with adjuster on high current mode (namely higher quiescent current) operating sheet.
Read frame i-1 once to terminate, after last column is read, the sensor enters low-power mode, such as
Shown in step 320.It is in the low-power mode, the sensor configuration is as follows：
● to most of analog circuits and post processing block (if any) power-off.Sensor is supported to reset required simulation electricity
Road remains on；
● provide lower frequency clock to digital block and timing generator；And
● with adjuster on low current mode (namely low quiescent current) operating sheet.
Alternatively, do not lived if the sensor is just run and had between reading frame i-1 and resetting frame i with low frame rate rate
Jump the time, then the sensor can be arranged in more positive power save mode, such as sleep pattern.In the sleep pattern
In, can be to almost all of upper block power-off, except receiving wake-up signal or producing such signal institute in itself with pre-programmed delay
Beyond the fritter needed.
When needing frame i, the sensor is waken up and is again introduced into the low-power mode, as shown in step 330.Now
Section can be short such as several clock cycle, and it is stably enough for the digital block reset for sensor and any necessary simulated block
's.Then, the sensor, which enters, resets frame i, wherein, the replacement starts from the first row, then second row, etc., until last
A line n, then, the sensor are held in the low-power mode, as shown in step 340.
After last column n is reset, all of the pel array are about to integrated signal, as shown in step 350, and should
Sensor is held in the low-power mode.Step 350 is optional, because sensor can enter quickly reads frame.For specific
Sensor, step 350 may need the long period with allow LED light source light a fire or mechanical shutter operate.
When the sensor is almost ready to the read operation for frame i, the sensor enters the normal power mode, such as
Shown in step 360.Step 360 should long enough so that the simulated block that is powered on is stable.Stabilization time is generally from several microseconds
Change in the range of to several milliseconds.
For the simulated block once stable, the sensor starts reading out frame i.In step 370, the sensor is from the pixel battle array
Row read view data, each a line.Once all rows are all read, then the sensor is again introduced into low-power mode or optional
Sleep pattern, as shown in step 380.
In figure 3 in the operation of the shown exemplary sensors, the imaging sensor can be realized with being transported with conventional mode of operation
Capable similar imaging sensor compares the average power consumption being greatly reduced.Traditional sensors operate in the case of, step 330 to
In 370, the imaging sensor, i.e., can be to electric on all simulated blocks once wake-up.
The present invention can be implemented in other specific forms, without departing from its spirit or essential attributes.Above-mentioned example should be in institute
There is aspect to be all considered only as illustrative and non-limiting matter.Therefore, this hair is represented by appended claims rather than described above
Bright scope.Having altered for being made in the equivalent meaning and scope of claim will all be included in the range of it.
Claims (20)
1. a kind of integrated image sensor circuit, including：
Pel array, it captures the image of projection thereon；
At least one simulated block, it handles the analog signal associated with the pel array, wherein, at least one simulated block includes
Analog-digital converter；And
First control circuit, it is to be in opening without the replacement frame of active reading in reading frame according to the pel array
With or to disable at least one simulated block or configure at least one simulated block be high-power mode or low-power mode.
2. integrated image sensor circuit as claimed in claim 1, wherein, when the pel array is in the reading frame, open
With at least one simulated block or to configure at least one simulated block be the high-power mode, and wherein, when the pel array
During in the replacement frame that no active is read, it is that this is low to disable at least one simulated block or configure at least one simulated block
Power mode.
3. integrated image sensor circuit as claimed in claim 2, wherein, it is right within the short time interval before the reading frame starts
It is electric at least one simulated block, and wherein, the short time interval depends on the stabilization time associated with least one simulated block.
4. integrated image sensor circuit as claimed in claim 3, wherein, the short time interval has small such as a musec order
First scope is extremely as large as the second scope of a millisecond magnitude.
5. integrated image sensor circuit as claimed in claim 1, wherein, at least one simulated block further includes choosing from by inclined
One or more the Additional simulations blocks for the simulation group that circuits, reference circuit and gain amplifier are formed.
6. integrated image sensor circuit as claimed in claim 1, wherein, integrated for this operated with global shutter pattern
Image sensor circuit, the first period before being read the corresponding replacement since the overall situation of the replacement frame to immediately the first row, and
Wherein, opened for the integrated image sensor circuit operated with rolling shutter pattern, corresponding reset from the first row of the replacement frame
The second period before beginning to the immediately the first row to read.
7. integrated image sensor circuit as claimed in claim 1, wherein, the reading frame once complete, i.e., to this at least one
Individual simulated block power-off.
8. integrated image sensor circuit as claimed in claim 1, in addition at least one post processing block, and the second control
Circuit, it is to be in enabling or disabling without the replacement frame actively read in the reading frame according to the pel array
At least one post processing block is configured to the high-power mode or the low-power mode by least one post processing block.
9. integrated image sensor circuit as claimed in claim 8, wherein, when the pel array is in the reading frame, open
With at least one post processing block or to configure at least one post processing block be the high-power mode, and wherein, when the pixel
When array is in without the replacement frame actively read, disables at least one post processing block or configure at least one post processing
Block is the low-power mode.
10. integrated image sensor circuit as claimed in claim 9, wherein, within the short time interval before the reading frame starts
To this it is at least one post processing block on electricity, wherein, the short time interval depend on this it is at least one post processing block associate it is stable when
Between, and wherein, the stabilization time associated with least one post processing block is shorter than what is associated with least one simulated block
Second stabilization time.
11. integrated image sensor circuit as claimed in claim 9, wherein, the reading frame once complete, i.e., to this at least one
Individual simulated block and at least one post processing block power-off.
12. integrated image sensor circuit as claimed in claim 8, wherein, at least one post processing block, which further includes, to be selected from
Reduced by noise, demosaicing, edge sharpening and color format change formed post processing group one or more it is extra after
Process block.
13. integrated image sensor circuit as claimed in claim 1, further include configurable timing circuit, and the 3rd control
Circuit, it is to be in configure this to match somebody with somebody without the replacement frame actively read in the reading frame according to the pel array
Timing circuit is put, to provide high clock frequency or low clock frequency for the integrated image sensor circuit.
14. integrated image sensor circuit as claimed in claim 13, wherein, when the pel array is in the reading frame,
The configurable timing circuit is configured to provide the high clock frequency, and when the pel array be in without actively read this is heavy
When putting frame, the configurable timing circuit is configured to provide the low clock frequency.
15. integrated image sensor circuit as claimed in claim 13, at least one post processing block is further included, wherein, when this
When pel array is in the reading frame, the configurable timing circuit is configured to provide the high clock frequency and to enable this at least one
It is the high-power mode to post-process block or configure at least one post processing block, and wherein, is not had when the pel array is in
During the replacement frame actively read, configure the configurable timing circuit with the low clock frequency is provided and disable this it is at least one after
Process block or configure this it is at least one post processing block be the low-power mode.
16. integrated image sensor circuit as claimed in claim 1, further include adjuster, and the 4th control circuit, its according to
It is to be in configuring the adjuster without the replacement frame actively read to provide in the reading frame according to the pel array
High current export or low current output, wherein, when configure the adjuster with provide the high current output when, the adjuster cause compared with
High quiescent current.
17. integrated image sensor circuit as claimed in claim 16, wherein, when the pel array is in the reading frame,
The adjuster is configured to provide high current output, and wherein, when the pel array is in without the replacement actively read
During frame, the adjuster is configured to provide low current output.
18. integrated image sensor circuit as claimed in claim 16, at least one post processing block is further included, wherein, when this
When pel array is in the reading frame, the adjuster is configured to provide high current output and enable at least one post processing block
Or it is the high-power mode to configure at least one post processing block, and wherein, when the pel array is in without actively reading
The replacement frame when, configure the adjuster to provide low current output and disable at least one post processing and block or configure this extremely
Few post processing block is the low-power mode.
19. integrated image sensor circuit as claimed in claim 16, further includes configurable timing circuit, wherein, when the picture
When pixel array is in the reading frame, the adjuster is configured to provide high current output and configure the configurable timing circuit as height
Clock frequency, and wherein, when the pel array is in without the replacement frame actively read, the adjuster is configured to provide
It is low clock frequency that the low current, which exports and configures the configurable timing circuit,.
20. integrated image sensor circuit as claimed in claim 19, at least one post processing block is further included, wherein, when this
When pel array is in the reading frame, it is the Gao Gong to enable at least one post processing block or configure at least one post processing block
Rate pattern, and when the pel array be in without actively read the replacement frame when, disable this it is at least one post processing block or
It is the low-power mode to configure at least one post processing block.
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| Application Number | Priority Date | Filing Date | Title |
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| PCT/US2015/028043 WO2016175769A1 (en) | 2015-04-28 | 2015-04-28 | Image sensor with integrated power conservation control |
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| CN107534745B (en) | 2020-12-18 |
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