CN107534060B

CN107534060B - GaN-based Schottky diode with large bond pad and reduced contact resistance

Info

Publication number: CN107534060B
Application number: CN201580076664.9A
Authority: CN
Inventors: 林伊尹
Original assignee: Vishay General Semiconductor LLC
Current assignee: Vishay General Semiconductor LLC
Priority date: 2015-02-20
Filing date: 2015-02-20
Publication date: 2020-12-22
Anticipated expiration: 2035-02-20
Also published as: CN107534060A; US9281417B1; EP3259781A1; JP2018511933A; TWI559405B; KR102008326B1; JP6787908B2; KR20170117588A; EP3259781B1; EP3259781A4; TW201631666A; WO2016133527A1

Abstract

A semiconductor device includes a first active layer disposed on a substrate. The second active layer is disposed on the first active layer. The second active layer has a higher band gap than the first active layer, so that a two-dimensional electron gas layer is generated between the first active layer and the second active layer. The first electrode establishes a schottky junction with the second active layer. The first electrode includes a first electrode pad and a first finger sequence in electrical contact with the first electrode pad. The second electrode establishes an ohmic junction with the first active layer. The second electrode includes a second electrode pad and a second series of fingers in electrical contact with the second electrode pad. The first and second series of finger electrodes form an interdigitated pattern. The first electrode pad is positioned on the first and second finger electrode sequences.

Description

GaN-based Schottky diode with large bond pad and reduced contact resistance

Background

A schottky diode is a semiconductor device formed by contacting a semiconductor layer with a metal. The junction between the metal and the semiconductor layer forms a rectifying junction that has improved diode switching performance compared to a p-n junction diode formed entirely with the semiconductor layer. Schottky diodes therefore have a lower turn-on voltage and faster switching speed than p-n junction diodes. Schottky diodes are ideal for applications where switching losses are the primary source of energy loss, such as in Switched Mode Power Supplies (SMPS).

Electronic devices made of nitride-based compound semiconductor materials are known. These electronic devices are also known as group III nitride semiconductor devices, which are formed of a group III nitride-based material. Nitride-based compound semiconductor devices are desirable for their wider bandgap and higher breakdown voltage properties, which makes them suitable for high voltage and high temperature applications. In particular, III-V gallium nitride (GaN) compound semiconductor schottky diodes have been described that have high breakdown voltages and low on-resistance. The efficiency of the switching power supply can be improved by using a group III nitride semiconductor schottky barrier diode.

The group III nitride-based semiconductor device can maximize electron mobility by forming two-dimensional electron gas at the heterojunction face of two different group III nitrides such as AlGaN and GaN. The two-dimensional electron gas is transported to compensate for strain-induced piezoelectric and spontaneous charge programming due to the non-ideal nature of the group III-nitride crystal structure. The two-dimensional electron gas is quantum confined in the band-bending region of the heterojunction where a narrower bandgap group III nitride (e.g., GaN) joins a larger bandgap group III nitride (e.g., AlGaN). In a schottky type diode, therefore, electrons will flow along a restricted path between the anode electrode and the cathode electrode. The charge density is determined by heterostructure parameters such as Al compound, AlGaN layer thickness, and intrinsic crystal polarity. In a III-nitride power supply device, the charge density will be responsive to the applied gate voltage and can be locally removed according to the change in energy bandgap. Therefore, the switching speed of the group III nitride power supply device can be very fast.

Fig. 1 shows an example of a GaN-based schottky diode. The diode 100 includes a substrate 10, a buffer layer 20, a GaN layer 30 formed on the buffer layer 20, and an AlGaN layer 40 formed on the GaN layer 30. A two-dimensional conductive channel is created at the interface between GaN layer 30 and AlGaN layer 40. The anode 60 and cathode 70 serve as electrical contacts for the device. Anode 60 is formed on AlGaN layer 40 and thereby establishes a schottky interface. Cathode 70 is formed on AlGaN layer 40 and thereby establishes an ohmic contact.

One problem with the simple schottky diode configuration shown in fig. 1 is that it is not practical for high current applications because of its insufficient conduction length. In order to operate at high current levels, the overall device size has to be increased substantially. This is because the forward current of AlGaN/GaN schottky diodes is proportional to the total schottky gate length. Therefore, in order to load a 20mA/mm GaN SBD with, for example, 1A current, the Schottky gate length needs to be 500mm, which is not practical for the design of the power supply.

One common method for increasing the total length of the schottky gate is to form finger electrodes. In this method, the ohmic contact of the cathode interdigitates with the fingers of the schottky contact. This alternating pattern of contacts can be repeated a desired number of times to increase the length of the electrode. The schottky electrodes are all electrically connected to the anode bond pad and the ohmic contacts are all electrically connected to the cathode bond pad. The bond pads are used to establish a wire bond connection with the device. However, when the size of the bonding pad is not sufficiently large, a plurality of filaments need to be used to withstand a large current to be loaded. In addition to increasing contact resistance, the use of multiple filaments increases material costs and assembly time. On the other hand, as contact pads increase in size to accommodate thicker wires, die size needs to increase and the cost of a single die will increase by a corresponding amount. In particular, for flip chip and solder joint packaging, this layout results in inefficient use of the entire chip area.

Disclosure of Invention

According to one aspect of the present invention, a semiconductor device includes a substrate, first and second active layers, and first and second electrodes. The first active layer is disposed on the substrate. The second active layer is disposed on the first active layer. The second active layer has a higher band gap than the first active layer, so that a two-dimensional electron gas layer is generated between the first active layer and the second active layer. The first electrode establishes a schottky junction with the second active layer. The first electrode includes a first electrode pad and a first finger sequence in electrical contact with the first electrode pad. The second electrode establishes an ohmic junction with the first active layer. The second electrode includes a second electrode pad and a second series of fingers in electrical contact with the second electrode pad. The first and second series of finger electrodes form an interdigitated pattern. A first electrode pad is positioned on the first and second series of finger electrodes.

Drawings

Fig. 1 shows an example of a GaN-based schottky diode.

Fig. 2 shows a plan view of a GaN-based schottky diode using interdigitated electrodes.

Fig. 3 shows a plan view of a GaN-based schottky diode with an anode pad placed on the interdigitated portion of the electrode.

Fig. 4 is a partial, cross-sectional view of a GaN-based schottky diode.

Fig. 5a shows a plan view of a GaN-based schottky diode with the cathode pad centrally located.

Fig. 5b shows a plan view of a GaN-based schottky diode with the anode removed so that the underlying finger electrode is visible.

Fig. 6 is a cross-sectional view of the diode shown in fig. 5 along the line I-I.

Fig. 7 is a cross-sectional view of the diode shown in fig. 5 along the line II-II.

Fig. 8 shows a plan view of a GaN-based schottky diode using a ring-shaped schottky electrode.

Detailed Description

As described in detail below, a layout is provided that can improve thermal distribution and conduction resistance for lateral power diodes, such as ill-nitride based diodes. The layout includes a first bond pad (e.g., an anode) surrounding a second bond pad (e.g., a cathode), and the two pads have different polarities. All electrodes (schottky and ohmic) may be embedded under the first pad region and only the electrode of the first polarity (schottky) is connected to the top of the first pad. An electrode of a second polarity (ohmic) extends to the second pad region and is connected to the top of the second pad. Both types of electrodes are made of materials such as SiO₂、SiN_x,、Al₂O₃Is isolated by the dielectric material of (1). This design can alleviate electrical stress by shortening the current conduction path and averaging the thermal profile, but more, the design does not require additional bond pad regions. The layout is fully compatible with wire bonding, flip chip, and solder joint packaging.

A plan view of a GaN-based schottky diode 100 utilizing interdigitated electrodes is shown in fig. 2. Schottky diode 100 has interdigitated portions of anode electrode 122 and cathode electrode 124 that extend and interleave with respect to each other. A dielectric 126 in a serpentine shape is formed between the interdigitated portions of the anode electrode 122 and the cathode electrode 124. The fingers of anode electrode 122 are electrically coupled to anode bond pad 130 and the fingers of cathode electrode 124 are electrically connected to cathode bond pad 140. The anode pad 130 and the cathode pad 140 are disposed on opposite sides of the interdigitated portions of the

electrodes

122 and 124.

As mentioned previously, the size and cost of the diode will be considerable when the bond pads, such as the anode pad 130 and the cathode pad 140, are large enough to fit thick wires. To address this issue, according to one embodiment, the anode pads are disposed on the interdigitated portions of the

electrodes

122 and 124 rather than on one side as in fig. 1. In this way, carriers from the anode pad are directly and simultaneously injected into the interdigital portions of the anode electrode. The ohmic region, including the cathode pad and the interdigitated portions of the cathode electrode, is passivated by a dielectric material and isolated from the anode pad such that carriers are not injected into the ohmic layer while they are injected into the interdigitated portions of the anode electrode.

An example of an embodiment in which anode pads 230 are placed on the interdigitated portions of the electrodes is shown in fig. 3. For clarity, in this example, the fingers of the electrode are visible through the overlying anode pad 230. As indicated by the arrows, the injected carriers flow from the fingers 222 of the anode electrode and through the AlGaN barrier. The carriers then traverse the 2D channel to the interdigitated portions 224 of the cathode electrode. The carriers then flow as indicated by the arrows through the interdigitated fingers 224 of the cathode electrode to the cathode pad 240.

One problem with the arrangement shown in fig. 3 is that if the anode pad is placed on top of the interdigitated portion of the cathode electrode without changing the arrangement of the cathode pad, the distal end of the anode edge (closest to the cathode) will experience the highest electrical stress. This results in a relatively high resistance, which needs to be reduced for many applications.

The resistance can be evaluated with reference to a partial, cross-sectional view of the GaN-based schottky diode shown in fig. 4. The diode 300 includes a GaN layer 330 and an AlGaN layer 340 formed on the GaN layer 330. A two-dimensional conduction channel is generated at the interface between the GaN layer 330 and the AlGaN layer 340. Anode 360 and cathode 370 serve as electrical contacts for device 300. Anode 360, referred to as a gate in fig. 4, is formed on AlGaN layer 340 and thereby establishes a schottky interface. A cathode 370, referred to as the drain in fig. 4, is formed on the GaN layer 330 and thus establishes an ohmic contact.

To estimate the resistance, a small segment of the carrier transport path is shown in fig. 4 when the device is under forward bias. To simplify the analysis, the contact resistance is simply set to R_c(between metal and semiconductor) and neglecting the metal resistance (which is small) and the contact resistance of the gate (because the carriers are transported through the gate by thermal emission/tunneling). The total resistance of the construction is then:

wherein R is_shIs the sheet resistance of the 2DEG channel, W is the contact width, L_gdIs the gate to drain distance, and L_tIs the transport length, which is the average distance an electron (or hole) travels in the semiconductor region below the contact before it flows up to the contact.

Referring again to fig. 3, the carrier travel shortest path is set such that once they cross the schottky barrier, they flow to the fingers 224 of the cathode electrode and move toward the cathode pad. Those carriers that travel the farthest distance in the ohmic region will experience the highest resistance. That is, the carriers that experience the highest resistance are those injected into the interdigitated portions 224 of the cathode electrode from the leftmost side of the device in fig. 3. In addition, the edge of the anode pad 230 closest to the cathode pad 240 will be subjected to the highest electrical stress and the highest thermal energy.

The aforementioned problems, as well as with respect to electrical resistance and electrical stress, can be ameliorated by shortening the carrier path in the ohmic region. The resistance of the interdigitated portions of the cathode electrode under the anode pad area is proportional to the carrier path length l (x) traveled by the carriers and inversely proportional to the total conductive area a, i.e., the area of the interdigitated portions of the cathode electrode under the anode pad and the ohmic metal thickness t. The total resistance will be the integral of the resistance in each of the fingers of the parallel cathode electrodes. For simplicity, the total resistance R_totalProportional to l (x) t/A.

In one embodiment, the carrier path in the ohmic region can be reduced by changing the layout arrangement shown in fig. 3 so that the cathode pad is centered in the mold and surrounded by the anode pad. In this way, the distance that carriers travel in the ohmic region can be shortened, and electrical stress can be evenly distributed around the cathode. One example of such an arrangement 500 is shown in fig. 5a and 5 b. Fig. 5a shows the arrangement of the anode pad 510 and the cathode pad 520 and fig. 5b shows the arrangement with the anode pad removed so that the lower interdigitated fingers 550 of the electrodes are visible.

As shown, the fingers of the electrode beneath the anode pad 510 include a first plurality of finger anode electrodes 550 positioned centrally on a first side of the cathode pad 520 and a second plurality of finger anode electrodes 555 positioned on a second side of the cathode pad 520, where the first and second sides of the cathode pad are opposite each other. In addition, the first and second pluralities of finger anode electrodes are parallel to each other. Similarly, a first plurality of fingered cathode electrodes 560 is positioned on a first side of cathode pad 520 and a second plurality of fingered cathode electrodes 565 is positioned on a second side of cathode pad 520. The first plurality of anode fingers are interleaved with the first plurality of cathode fingers and the second plurality of anode fingers are interleaved with the second plurality of cathode fingers. A dielectric is formed between the fingers in the first and second plurality of finger electrodes.

Fig. 6 is a cross-sectional view of the diode 600 shown in fig. 5 taken along the line I-I. The diode 600 includes a first active layer 615 and a second active layer 620, which are formed of GaN and AlGaN, respectively, in this example. The first and second active layers are formed on the substrate 610. Fig. 6 also illustrates one schottky finger anode 630 that is positioned below in contact with the anode pad 640. Also visible are adjacent ohmic finger cathodes 625, which are also located below the anode pad 640. The ohmic finger cathodes 625 are electrically isolated from the schottky finger anodes 630 and the anode pad 640 by a dielectric layer 645.

Fig. 7 is a cross-sectional view of the diode 600 shown in fig. 5 taken along line II-II, illustrating the cathode pad 650 located above in electrical contact with the distal ends of the ohmic finger cathodes, where the distal ends are electrically brought together with one another.

Diode 600 may be fabricated with many different material systems. For example, diodes are fabricated using group III nitride based material systems. Group III nitrides include semiconductor compounds formed between nitrogen and the group III elements of the periodic table, typically aluminum (Al), gallium (Ga), and indium (In). This family also includes ternary and ternary compounds such as AlGaN and AlInGaN. For illustrative purposes, the diodes described below are formed from GaN and AlGaN, although other group III nitrides can be used.

The substrate 610 may be formed of various materials such as sapphire, silicon, or silicon carbide. Various fabrication techniques may utilize one or more layers of material to be disposed between the substrate 610 and the first active layer 615. For example, in some cases, a buffer layer (not shown) may be formed on the substrate 610. The buffer layer may be formed of GaN, AlGaN, or aluminum nitride (AlN) and provides an interface from the non-GaN substrate to the GaN-based active structure. The buffer layer can reduce defect density in the active device layer. The buffer layer may be considered to be a portion of the substrate 610, and thus the remaining layers formed on the buffer layer may be considered to be device layers of the structure.

In the above example, the first active layer 615 is composed of gallium nitride (GaN). In other examples, a different semiconductor material containing a nitride of another element from group III of the periodic table may include the first active layer 615.

The second active layer 620 in the above example is composed of aluminum gallium nitride (AlGaN). In other examples, different group III nitride semiconductor materials, such as aluminum indium nitride (AlInN) and aluminum indium gallium nitride (AlInGaN), may include the second active layer 620. The material of the second active layer 620 may be an amorphous compound. In these materials, the ratios of the elements cannot be simply represented by common integers. For example, the second active layer 620 may be a nitride semiconductor material of a group III non-specific compound, such as Al_XGa_1-XN, wherein 0<X<1。

As charges are transferred from the second active layer 620 to the first active layer 610 due to a difference in band gap between materials, a planar region of high-charge, high-mobility electrons is formed at an interface between the first and second active layers 615 and 629 in the first active layer 615. The charge region is sometimes referred to as a two-dimensional electron gas because electrons confined in quantum wells created by the polarization effect of the group III nitride heterostructure move freely in two dimensions but are severely confined in the third dimension.

The amount of charge that is transferred across the second active layer 620 to the first active layer 615 to form the electron gas depends on the thickness and species concentration (e.g., Al composition percentage) of the second active layer 620, which initially determines the amount of electrons in the electron gas. The AlGaN layer may be doped N-type, whereby N-type dopants can be uniformly incorporated within the second active layer 620, or only in portions of the layer. The N-type dopant impurity in AlGaN may be, for example, silicon.

Electrodes

630 and 625 are disposed on the device and establish electrical connection with the active layer. In particular, the cathode 625 establishes an ohmic junction with the second active layer 620 and may be formed of any suitable metal.

The anode 630 establishes a schottky junction with the second active layer 620. The anode 630 may be formed of any suitable pair of materials for establishing a schottky junction, such as a metal or metal gallium. Suitable metals may include nickel (Ni), platinum (Pt), titanium (Ti), and gold (Au).

The diodes described herein may be fabricated using an epitaxial growth process. For example, a reactive sputtering process may be used in which a metal component of a semiconductor, such as gallium, aluminum, and/or indium, is dislodged from a metal target plate disposed proximate to a substrate while the target plate and substrate are both in a gaseous atmosphere that includes nitride and one or more dopants. Alternatively, metal organic vapor deposition (MOCVD) may be utilized, wherein the substrate is exposed to an atmosphere containing a metal organic compound and gases containing reactive nitrides, such as ammonia, and gases containing dopants, while the substrate is maintained at an elevated temperature, typically 700-. The gaseous compounds decompose and form a doped semiconductor in the form of a film of crystalline material on the substrate surface. The substrate and grown film are then cooled. As a further alternative, other epitaxial growth methods may be used, such as Molecular Beam Epitaxy (MBE) or atomic layer epitaxy. Additional techniques may also be utilized including, but not limited to, flow modulated metal organic vapor phase epitaxy (FM-OMVPE), organometallic vapor phase epitaxy (OMVPE), nitride vapor phase epitaxy (HVPE), and Physical Vapor Deposition (PVD). Standard metallization techniques well known in the art of semiconductor fabrication can be used to form the electrodes.

The above examples and disclosure are intended to be illustrative and not exclusive. These examples and descriptions will provide those of ordinary skill in the art with numerous variations and alternatives. For example, the cathode pads need not be rectangular in shape. Rather, it may have a wide variety of alternative shapes, including but not limited to circular or oval. In addition, the schottky electrode does not have to be rectangular or striped as described above. Rather, it may have a wide variety of alternative shapes, including but not limited to circular, hexagonal, or other shapes that do not include sharp corners. These schottky electrodes can be evenly distributed around the cathode with an average distance between each other. Alternatively, the schottky electrode may be loosely disposed around the cathode edge to avoid current crowding. The schottky electrodes may be aligned in a direction to achieve the shortest carrier transfer path. An example of a device 800 having a circular schottky electrode 810 surrounding an anode pad 820 is illustrated in fig. 8.

The foregoing alternatives and variations are intended to be included within the scope of the appended claims. Those familiar with the art may recognize other equivalents to the specific embodiments described herein which equivalents are also intended to be encompassed by the appended claims.

Claims

1. A semiconductor apparatus, comprising:

a substrate;

a first active layer disposed on the substrate;

a second active layer disposed on the first active layer, the second active layer having a higher band gap than the first active layer, such that a two-dimensional electron gas layer is generated between the first active layer and the second active layer;

a first electrode establishing a Schottky junction with the second active layer, the first electrode comprising a first electrode pad and a first series of finger electrodes in electrical contact with the first electrode pad; and

a second electrode establishing an ohmic junction with the first active layer, the second electrode comprising a second electrode pad and a second series of finger electrodes in electrical contact with the second electrode pad, the first and second series of finger electrodes forming an interdigitated pattern, and the first electrode pad being positioned over the first and second series of finger electrodes, the second electrode pad being surrounded by the first electrode pad.

2. The semiconductor device of claim 1, further comprising a dielectric layer between the first electrode pad and the second series of finger electrodes.

3. The semiconductor device of claim 1, wherein the second electrode pad is positioned over and in electrical contact with a distal end of the second series of finger electrodes.

4. The semiconductor device of claim 1, wherein the first and second series of finger electrodes each include first and second electrode portions spaced apart from one another, the first electrode portions of the first and second series of finger electrodes forming a first interdigitated pattern, and the second electrode portions of the first and second series of finger electrodes forming a second interdigitated pattern spaced apart from the first interdigitated pattern.

5. The semiconductor device according to claim 1, wherein the first active layer comprises a group III nitride semiconductor material.

6. The semiconductor device according to claim 5, wherein the first active layer comprises GaN.

7. The semiconductor device according to claim 1, wherein the second active layer comprises a group III nitride semiconductor material.

8. The semiconductor device according to claim 7, wherein the second active layer comprises Al_XGa_1-XN, wherein 0<X<1。

9. The semiconductor device of claim 8, wherein the second active layer is selected from the group consisting of AlGaN, AlInN, and AlInGaN.

10. The semiconductor device of claim 1, wherein each electrode of the first series of finger electrodes is circular.

11. The semiconductor device of claim 1, wherein at least one electrode of the first series of finger electrodes is rectangular.

12. The semiconductor device of claim 1, wherein each electrode of the first series of finger electrodes is hexagonal.