CN107517048B - PWM generating circuit for preventing switch power source from error action - Google Patents
PWM generating circuit for preventing switch power source from error action Download PDFInfo
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- CN107517048B CN107517048B CN201710768306.5A CN201710768306A CN107517048B CN 107517048 B CN107517048 B CN 107517048B CN 201710768306 A CN201710768306 A CN 201710768306A CN 107517048 B CN107517048 B CN 107517048B
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- 239000003990 capacitor Substances 0.000 claims description 29
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 11
- 230000007257 malfunction Effects 0.000 claims description 8
- 238000007599 discharging Methods 0.000 abstract description 4
- 230000007547 defect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 6
- 230000003111 delayed effect Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
- H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
Abstract
The invention discloses a PWM (pulse-width modulation) generation circuit for preventing misoperation of a switching power supply, belonging to the technical field of switching power supply driving. According to the invention, the PWM is started after the triangular wave appears on the platform by utilizing the CLOCK function and the RESET function of the D trigger, PWM misoperation at the triangular wave discharging platform under a voltage mode is prevented by a simpler circuit, and the defects of an existing switching power supply control loop and unstable output can be overcome by adopting the switching power supply of the PWM generating circuit disclosed by the application.
Description
Technical Field
The invention discloses a PWM (pulse-width modulation) generation circuit for preventing misoperation of a switching power supply, belonging to the technical field of switching power supply driving.
Background
The switching power supply has various types, the topology of the main circuit of the power stage of the switching power supply comprises forward, flyback, half bridge, full bridge and the like, and the power MOS tubes forming the topology are driven by PWM signals.
Most of PWM (pulse width modulation) generation modes of the conventional switching power supply in a voltage mode are realized by comparing an error signal and a triangular wave and then by an RS (remote sensing) trigger, waveforms of the error signal, the triangular wave and the PWM signal are shown in figure 1, the method can cause false action when the error signal is very small and an interference signal exists at a platform of the triangular wave, so that the duty ratio is unbalanced, the waveforms of the error signal, the triangular wave and the PWM signal are shown in figure 2, and the jitter of the output duty ratio influences the precision of the output voltage and the ripple of the output voltage.
Disclosure of Invention
The present invention provides a PWM generating circuit for preventing the malfunction of the switching power supply, which can prevent the PWM malfunction at the triangular wave discharging platform in the voltage mode, and solve the technical problem of unstable control loop and output caused by the PWM malfunction.
The invention adopts the following technical scheme for realizing the aim of the invention:
a PWM generating circuit for preventing malfunction of a switching power supply, comprising:
a reset signal generating branch for extracting a triangular wave signal from the input voltage signal and outputting a comparison result of the error signal and the triangular wave signal,
a clock signal generating branch circuit for extracting a delay pulse signal triggering the next effective pulse after the triangular wave signal platform is finished from the input voltage signal,
and the D trigger is provided with a clock port connected with a delay pulse signal output by the clock signal generation branch circuit, a reset port connected with a comparison result of an error signal and a triangular wave signal output by the reset signal generation branch circuit, and an output end outputting a PWM signal which is started after the triangular wave signal platform lags behind, wherein the PWM signal is the comparison result of the error signal and the triangular wave signal when an effective pulse of the delay pulse signal arrives.
As a further improvement of the PWM generating circuit for preventing the malfunction of the switching power supply, the reset signal generating branch includes: a first capacitor, a first resistor, a first buffer, a third capacitor, a third resistor, a switch tube, and a comparator,
one pole of the first capacitor is connected with an input voltage signal, the other pole of the first capacitor is connected with one end of the first resistor and the input end of the first buffer, the other end of the first resistor is grounded, the output end of the first buffer is connected with the gate pole of the switching tube, the drain electrode of the switching tube is connected with a charging voltage signal through the third resistor, the source electrode of the switching tube is grounded, the third capacitor is connected between the source electrode and the drain electrode of the switching tube in parallel, the positive phase input end of the comparator is connected with the drain electrode of the switching tube, the negative phase input end of the comparator is connected with an error signal, and the output end of the comparator outputs a comparison result of the error signal and the triangular wave signal.
As a further optimization scheme of the PWM generating circuit for preventing the misoperation of the switching power supply, the clock signal generating branch circuit comprises a second resistor, a second capacitor and a second buffer,
one end of the second resistor is connected with an input voltage signal, the other end of the second resistor is connected with one pole of the second capacitor and the input end of the second buffer, and the output end of the second buffer outputs a delay pulse signal which triggers the next effective pulse after the triangular wave signal platform is finished.
The grid of the power tube in the main circuit of the switch power supply is connected with the PWM signal.
By adopting the technical scheme, the invention has the following beneficial effects: according to the invention, the PWM is started after the triangular wave appears on the platform by utilizing the CLOCK function and the RESET function of the D trigger, PWM misoperation at the triangular wave discharging platform under a voltage mode is prevented by a simpler circuit, and the defects of an existing switching power supply control loop and unstable output can be overcome by adopting the switching power supply of the PWM generating circuit disclosed by the application.
Drawings
Fig. 1 is a schematic diagram of a conventional PWM generation method.
Fig. 2 is a schematic diagram of duty ratio imbalance caused by malfunction when there is a disturbance signal at the triangular wave platform when the error signal is very small.
FIG. 3 is a circuit for generating PWM signals according to the present invention.
Fig. 4 is a package diagram of a D flip-flop chip.
FIG. 5 is a timing diagram of the error signal, RESET signal, CLOCK signal, and PWM signal of the circuit of FIG. 3.
The reference numbers in the figures illustrate: c1, C2 and C3 are respectively a first capacitor, a second capacitor and a third capacitor, R1, R2 and R3 are respectively a first resistor, a second resistor and a third resistor, Q is a switch tube, Buffer1 and Buffer2 are respectively a first Buffer and a second Buffer, and U1B is a comparator.
Detailed Description
The technical scheme of the invention is explained in detail in the following with reference to the attached drawings.
As shown in fig. 3, the PWM generating circuit of the present invention includes: the system comprises a reset signal generation branch, a clock signal generation branch and a D trigger. The reset signal generation branch circuit is used for extracting a triangular wave signal from an input voltage signal and outputting a comparison result of an error signal and the triangular wave signal, and the clock signal generation branch circuit is used for extracting a delay pulse signal which triggers the next effective pulse after the triangular wave signal platform is finished from the input voltage signal. The clock port of the D trigger is connected with a clock signal to generate a delay pulse signal output by the branch circuit, the reset port of the D trigger is connected with a comparison result of an error signal output by the reset signal generation branch circuit and a triangular wave signal, the output end of the D trigger outputs a PWM signal which is started after the triangular wave signal platform is delayed, and the PWM signal is the comparison result of the error signal and the triangular wave signal when an effective pulse of the delay pulse signal arrives.
The reset signal generating branch includes: the circuit comprises a first capacitor C1, a first resistor R1, a first Buffer1, a third capacitor C3, a third resistor C3, a switching tube Q and a push-pull output comparator U1B. One pole of the first capacitor C1 is connected to the Input voltage signal Input Pulse, the other pole of the first capacitor C1 is connected to one end of the first resistor R1 and the Input end of the first Buffer1, the other end of the first resistor R1 is connected to the ground GND, the output end of the first Buffer1 is connected to the gate of the switching tube Q, the drain of the switching tube Q is connected to the Charge voltage signal Charge voltage through the third resistor R3, the source of the switching tube Q is connected to the ground GND, the third capacitor C3 is connected in parallel between the source and the drain of the switching tube Q, the positive phase Input end of the comparator U1B is connected to the drain of the switching tube Q, the negative phase Input end of the comparator is connected to the error signal, and the output end of the comparator U1B outputs the comparison result between the error signal and the triangular wave signal.
The clock signal generation branch includes: a second resistor R2, a second capacitor C2, and a second Buffer 2. One end of the second resistor R2 is connected to the Input voltage signal Input Pulse, the other end of the second resistor R2 is connected to one pole of the second capacitor C2 and the Input end of the second Buffer2, and the output end of the second Buffer2 outputs a Delay Pulse signal Input Pulse-Delay that triggers the next effective Pulse after the triangular wave signal platform is finished.
The voltage Pulse Input Pulse can be extracted into a Discharge Pulse signal after passing through the first resistor R1, the first capacitor C1 and the Buffer1, the Discharge Pulse signal is used for discharging the third capacitor C3, the Discharge Pulse signal is used for charging the third capacitor C3 to generate a triangular wave signal, and the triangular wave signal is compared with the error signal to generate a RESET signal of the D-type trigger. Meanwhile, the voltage Pulse Input Pulse is delayed into an Input Pulse-Delay signal after passing through the second resistor R2, the second capacitor C2 and the Buffer2, and the signal is a CLOCK signal of a class D flip-flop. Known from the class D flip-flop principle: the output Q end of the D type trigger outputs high level when CLOCK is a rising edge; the output Q end of the D-type trigger outputs low level when RESET is low level, namely the D-type trigger can generate PWM signal. In order to avoid the problem of error action of an error signal at the triangular wave platform in the traditional scheme, the invention sends a Delay signal Input Pulse-Delay generated by an Input Pulse signal to the CLOCK Input end of a D-type trigger, and the rising edge of the Delay signal is started at the right side of the triangular wave platform, so that PWM can be started at the right side of the triangular wave platform, the PWM is prevented from being started at the triangular wave platform through the mode, and the problem of error action at the triangular wave platform is solved. The timing diagrams of the error signal, the RESET signal, the CLOCK signal and the PWM signal of the PWM generating circuit disclosed by the present invention are shown in fig. 5. The packaging diagram of the D flip-flop chip is shown in FIG. 4.
Assuming that Discharge pulse is 1% of the PWM period, then this 1% PWM period plateau is the time for the capacitor to Discharge to zero. The discharge pulse time of the maximum PWM duty ratio is also limited, namely the maximum PWM duty ratio is changed to be 100% -1% = 99%.
The PWM generating circuit disclosed by the invention is used for the main circuit of the switching power supply, a user can adjust the PWM duty ratio according to actual requirements, and the PWM which is switched on after delay when a triangular wave appears on a platform can not be jittered due to very small error signals or interference signals at the triangular wave platform, so that the control loop and the output of the switching power supply are more stable, the output precision of the switching power supply is effectively improved, and the ripple of the output voltage is reduced.
Claims (4)
1. A PWM generating circuit for preventing misoperation of a switching power supply is characterized by comprising:
a reset signal generating branch for extracting a triangular wave signal from the input voltage signal and outputting a comparison result of the error signal and the triangular wave signal,
a clock signal generating branch circuit for extracting a delay pulse signal triggering the next effective pulse after the triangular wave signal platform is finished from the input voltage signal,
and the D trigger is provided with a clock port connected with a delay pulse signal output by the clock signal generation branch circuit, a reset port connected with a comparison result of an error signal and a triangular wave signal output by the reset signal generation branch circuit, and an output end outputting a PWM signal which is started after the triangular wave signal platform lags behind, wherein the PWM signal is the comparison result of the error signal and the triangular wave signal when an effective pulse of the delay pulse signal arrives.
2. The PWM generation circuit for preventing malfunction of a switching power supply according to claim 1, wherein the reset signal generation branch comprises: a first capacitor, a first resistor, a first buffer, a third capacitor, a third resistor, a switch tube, and a comparator,
one pole of the first capacitor is connected with an input voltage signal, the other pole of the first capacitor is connected with one end of the first resistor and the input end of the first buffer, the other end of the first resistor is grounded, the output end of the first buffer is connected with the gate pole of the switching tube, the drain electrode of the switching tube is connected with a charging voltage signal through the third resistor, the source electrode of the switching tube is grounded, the third capacitor is connected between the source electrode and the drain electrode of the switching tube in parallel, the positive phase input end of the comparator is connected with the drain electrode of the switching tube, the negative phase input end of the comparator is connected with an error signal, and the output end of the comparator outputs a comparison result of the error signal and the triangular wave signal.
3. The PWM generating circuit for preventing the malfunction of the switching power supply according to claim 1 or 2, wherein the clock signal generating branch comprises a second resistor, a second capacitor, a second buffer,
one end of the second resistor is connected with an input voltage signal, the other end of the second resistor is connected with one pole of the second capacitor and the input end of the second buffer, and the output end of the second buffer outputs a delay pulse signal which triggers the next effective pulse after the triangular wave signal platform is finished.
4. A switching power supply using the PWM generation circuit according to any one of claims 1 or 2, wherein a gate of a power transistor in the main circuit of the switching power supply is connected to the PWM signal.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710768306.5A CN107517048B (en) | 2017-08-31 | 2017-08-31 | PWM generating circuit for preventing switch power source from error action |
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| CN201710768306.5A CN107517048B (en) | 2017-08-31 | 2017-08-31 | PWM generating circuit for preventing switch power source from error action |
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| CN107517048B true CN107517048B (en) | 2020-06-05 |
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| TWI767793B (en) * | 2021-07-20 | 2022-06-11 | 新唐科技股份有限公司 | Glitch filtering circuit and microcontroller circuit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201243268Y (en) * | 2008-06-19 | 2009-05-20 | 上海益侃微电子有限公司 | Logic circuit for decreasing encode error rate of variable impulse-duration system |
| CN201499098U (en) * | 2009-09-29 | 2010-06-02 | 杭州士兰微电子股份有限公司 | Control system of frequency-interpolation-mode cascade off-line PFC-PWM switching power converter |
| CN103904875A (en) * | 2014-03-24 | 2014-07-02 | 合肥工业大学 | Digital soft start circuit in switching power source |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10180448B2 (en) * | 2015-05-15 | 2019-01-15 | Analog Devices, Inc. | Circuit and method for pulse width modulation |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201243268Y (en) * | 2008-06-19 | 2009-05-20 | 上海益侃微电子有限公司 | Logic circuit for decreasing encode error rate of variable impulse-duration system |
| CN201499098U (en) * | 2009-09-29 | 2010-06-02 | 杭州士兰微电子股份有限公司 | Control system of frequency-interpolation-mode cascade off-line PFC-PWM switching power converter |
| CN103904875A (en) * | 2014-03-24 | 2014-07-02 | 合肥工业大学 | Digital soft start circuit in switching power source |
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Address after: Zhimengyuan, No.4 gupinggang, Gulou District, Nanjing, Jiangsu Province, 210009 Patentee after: ADEX Electronics (Nanjing) Co.,Ltd. Address before: Building 1, No. 108, xishanqiao South Road, Yuhuatai District, Nanjing City, Jiangsu Province, 210039 Patentee before: ADEX Electronics (Nanjing) Co.,Ltd. |