CN107516634A - Thin film transistor (TFT) and its manufacture method - Google Patents
Thin film transistor (TFT) and its manufacture method Download PDFInfo
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- CN107516634A CN107516634A CN201610417663.2A CN201610417663A CN107516634A CN 107516634 A CN107516634 A CN 107516634A CN 201610417663 A CN201610417663 A CN 201610417663A CN 107516634 A CN107516634 A CN 107516634A
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- oxide semiconductor
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- 239000010409 thin film Substances 0.000 title claims abstract description 52
- 238000000034 method Methods 0.000 title claims abstract description 37
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- 239000004065 semiconductor Substances 0.000 claims abstract description 210
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 184
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 184
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 40
- 239000001301 oxygen Substances 0.000 claims abstract description 40
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 40
- 230000004888 barrier function Effects 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 239000000463 material Substances 0.000 claims description 34
- 239000002184 metal Substances 0.000 claims description 27
- 229910052751 metal Inorganic materials 0.000 claims description 27
- 238000005530 etching Methods 0.000 claims description 16
- 150000001875 compounds Chemical class 0.000 claims description 7
- 150000002927 oxygen compounds Chemical class 0.000 claims description 7
- 230000005611 electricity Effects 0.000 claims 1
- 238000009413 insulation Methods 0.000 claims 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 8
- 229910052733 gallium Inorganic materials 0.000 description 8
- 229910052738 indium Inorganic materials 0.000 description 8
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 8
- XLOMVQKBTHCTTD-UHFFFAOYSA-N zinc oxide Inorganic materials [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 7
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 6
- KYKLWYKWCAYAJY-UHFFFAOYSA-N oxotin;zinc Chemical compound [Zn].[Sn]=O KYKLWYKWCAYAJY-UHFFFAOYSA-N 0.000 description 6
- 229910052725 zinc Inorganic materials 0.000 description 6
- 239000011701 zinc Substances 0.000 description 6
- 239000004020 conductor Substances 0.000 description 5
- 239000007769 metal material Substances 0.000 description 5
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 5
- -1 IZO) Chemical compound 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 4
- 229910001887 tin oxide Inorganic materials 0.000 description 4
- 239000011787 zinc oxide Substances 0.000 description 4
- MWUXSHHQAYIFBG-UHFFFAOYSA-N nitrogen oxide Inorganic materials O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 229910001195 gallium oxide Inorganic materials 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- FAHBNUUHRFUEAI-UHFFFAOYSA-M hydroxidooxidoaluminium Chemical compound O[Al]=O FAHBNUUHRFUEAI-UHFFFAOYSA-M 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 2
- 230000000007 visual effect Effects 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 229920000620 organic polymer Polymers 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- TYHJXGDMRRJCRY-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) tin(4+) Chemical compound [O-2].[Zn+2].[Sn+4].[In+3] TYHJXGDMRRJCRY-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
Abstract
The present invention provides a kind of thin film transistor (TFT) and its manufacture method.The manufacture method of thin film transistor (TFT) comprises the following steps.Grid is formed on substrate.Insulating barrier is formed, to cover grid.The first metal oxide semiconductor layer and the second metal oxide semiconductor layer are formed on the insulating layer, and patterned first metal oxide semiconductor layer and the second metal oxide semiconductor layer, to form the first metal-oxide semiconductor (MOS) pattern and the second metal-oxide semiconductor (MOS) pattern.First metal oxide semiconductor layer is formed under the first oxygen concentration.Second metal oxide semiconductor layer is formed under the second oxygen concentration.Second oxygen concentration is more than the first oxygen concentration.Source electrode and drain electrode are formed on the second metal-oxide semiconductor (MOS) pattern.The manufacture method of the thin film transistor (TFT) of the present invention can produce the thin film transistor (TFT) of excellent performance, and the excellent performance of the thin film transistor (TFT) of the present invention.
Description
Technical field
The present invention relates to a kind of semiconductor element and its manufacture method, more particularly to a kind of thin film transistor (TFT) and
Its manufacture method.
Background technology
With the development of display panel, requirement more and more higher of the people to display quality, particularly, for
The resolution of display panel.However, improved with the resolution of display panel, the size of each sub-pixel
Must be with diminution.Therefore, the small metal oxide thin-film transistor of size has been used in high-res
Display panel in.
In the processing procedure of metal oxide thin-film transistor, in order to protect not water-fast, oxygen, acid solution gold
Belong to oxide semiconductor pattern, an etching can be made on metal-oxide semiconductor (MOS) pattern more and stopped
Pattern, to dissolve source electrode with protecting metal-oxide semiconductor (MOS) pattern during drain electrode in pattern, enter
And the thin film transistor (TFT) electrically stablized.However, the passage length of thin film transistor (TFT) can be limited to lose
The size of barrier pattern is carved, and makes resolution be not easy further to improve.Therefore, how to be not provided with losing
In the case of carving barrier pattern, produce that size is small and the metal oxide thin-film transistor of excellent performance is real
One of important topic for current developer.
The content of the invention
The present invention provides a kind of manufacture method of thin film transistor (TFT), produces the thin film transistor (TFT) of excellent performance.
The present invention provides a kind of thin film transistor (TFT), its excellent performance.
A kind of manufacture method of thin film transistor (TFT) of the present invention, comprises the following steps：Substrate is provided；In base
Grid is formed on plate；Insulating barrier is formed, to cover grid；The first metal oxide is formed on the insulating layer
Semiconductor layer, the second metal oxide semiconductor layer, and patterned first metal oxide semiconductor layer,
Second metal oxide semiconductor layer, to form the first metal-oxide semiconductor (MOS) pattern, the second metal oxygen
Compound semiconductor pattern, wherein the first metal-oxide semiconductor (MOS) pattern position is partly led in the second metal oxide
Between body pattern and insulating barrier, the first metal oxide semiconductor layer is formed under the first oxygen concentration,
Second metal oxide semiconductor layer is formed under the second oxygen concentration, and the second oxygen concentration is more than the
One oxygen concentration；Source electrode and drain electrode are formed on the second metal-oxide semiconductor (MOS) pattern.
The manufacture method of another thin film transistor (TFT) of the present invention, comprises the following steps：Substrate is provided；
Grid is formed on substrate；Insulating barrier is formed, to cover grid；The oxidation of the first metal is formed on the insulating layer
Thing semiconductor pattern and the second metal-oxide semiconductor (MOS) pattern, wherein the first metal-oxide semiconductor (MOS)
Pattern position is between the second metal-oxide semiconductor (MOS) pattern and insulating barrier, the second metal-oxide semiconductor (MOS)
The carrier mobility of pattern is less than the carrier mobility of the first metal-oxide semiconductor (MOS) pattern；
Source electrode and drain electrode are formed on two metal-oxide semiconductor (MOS) patterns.
The thin film transistor (TFT) of the present invention includes grid, insulating barrier, semiconductor structure, source electrode and drain electrode.Absolutely
Edge layer covers grid.Semiconductor structure includes the first metal-oxide semiconductor (MOS) figure of configuration on the insulating layer
The the second metal-oxide semiconductor (MOS) pattern of case and configuration on the first metal-oxide semiconductor (MOS) pattern.
Source electrode electrically connects with the both sides of semiconductor structure respectively with drain electrode.Particularly, the second metal oxide is partly led
The resistivity of body pattern is more than the resistivity of the first metal-oxide semiconductor (MOS) pattern.
In one embodiment of this invention, the first above-mentioned metal oxide semiconductor layer is in the first temperature
Lower formation, the second metal oxide semiconductor layer are to be formed at the second temperature, and second temperature is more than the
One temperature.
In one embodiment of this invention, the first above-mentioned oxygen concentration is 0%, and the second oxygen concentration is situated between
In 10%~15%.
In one embodiment of this invention, the first above-mentioned temperature is between 20 DEG C~30 DEG C, and second temperature
Between 100 DEG C~300 DEG C.
In one embodiment of this invention, the resistivity of the second above-mentioned metal-oxide semiconductor (MOS) pattern is big
In the resistivity of the first metal-oxide semiconductor (MOS) pattern.
In one embodiment of this invention, the first above-mentioned metal oxide half is formed using identical material
Conductor layer and the second above-mentioned metal oxide semiconductor layer.
In one embodiment of this invention, it is above-mentioned to form source electrode on the second metal-oxide semiconductor (MOS) pattern
Include with the step of drain electrode：Conductive layer is formed on the second metal-oxide semiconductor (MOS) pattern, to cover
One metal-oxide semiconductor (MOS) pattern, the second metal-oxide semiconductor (MOS) pattern and insulating barrier；Use erosion
Liquid patterned conductive layer is carved, to form source electrode and drain electrode, wherein, the second metal-oxide semiconductor (MOS) pattern
Etch-rate of the first metal-oxide semiconductor (MOS) pattern to etching solution is less than to the etch-rate of etching solution.
In one embodiment of this invention, the material of the first above-mentioned metal-oxide semiconductor (MOS) pattern and
The material of two metal-oxide semiconductor (MOS) patterns is different.
In one embodiment of this invention, the material of the second above-mentioned metal-oxide semiconductor (MOS) pattern be containing
The metal-oxide semiconductor (MOS) of tin.
Based on above-mentioned, in the manufacture method of the thin film transistor (TFT) of one embodiment of the invention, the first metal oxygen
Compound semiconductor layer is formed under the first oxygen concentration, and the second metal oxide semiconductor layer is second
Formed under oxygen concentration, and the second oxygen concentration is more than the first oxygen concentration.Therefore, the second metal aoxidizes
Thing semiconductor pattern is compared with the first metal-oxide semiconductor (MOS) pattern insulating.Thereby, source electrode is dissolved in pattern
During drain electrode, the second metal-oxide semiconductor (MOS) pattern can protect the first metal oxygen below
Compound semiconductor pattern, the first metal-oxide semiconductor (MOS) pattern is avoided to be influenceed by etching solution, and then
Realize the thin film transistor (TFT) of function admirable.
For features described above of the invention and advantage can be become apparent, special embodiment below, and coordinate
Accompanying drawing is described in detail below.
Brief description of the drawings
Figure 1A to Fig. 1 I is the diagrammatic cross-section of the method for fabricating thin film transistor of one embodiment of the invention；
Fig. 2A to Fig. 2 I is the diagrammatic cross-section of the method for fabricating thin film transistor of another embodiment of the present invention.
Reference：
110：Substrate
120：First metal oxide semiconductor layer
130、130’：Second metal oxide semiconductor layer
140：Second conductive layer
D：Drain electrode
G：Grid
GI：Insulating barrier
S：Source electrode
SE、SE’：Semiconductor structure
SE1：First metal-oxide semiconductor (MOS) pattern
SE2、SE2’：Second metal-oxide semiconductor (MOS) pattern
TFT、TFT’：Thin film transistor (TFT)
Embodiment
Figure 1A to Fig. 1 I is the diagrammatic cross-section of the method for fabricating thin film transistor of one embodiment of the invention.
Figure 1A is refer to, first, there is provided substrate 110.Substrate 110 is carrying component thereon.In this reality
Apply in example, the material of substrate 110 can be glass, quartz, organic polymer, light tight/reflecting material (example
Such as：Conductive material, wafer, ceramics etc.) or other materials applicatory.
Figure 1B is refer to, then, grid G is formed on substrate 110.In detail, can be first in substrate 110
Upper first conductive layer (not shown)；Then, the first conductive layer is patterned, to form grid G.In this reality
Apply in example, grid G can be metal material, but the invention is not restricted to this, in other embodiments, grid
G is alternatively other conductive materials, such as：The oxidation of alloy, the nitride of metal material, metal material
The stack layer of thing, the nitrogen oxides of metal material or metal material and other conductive materials.
Fig. 1 C are refer to, then, insulating barrier GI are formed, to cover grid G.In the present embodiment, absolutely
Grid G can be completely covered in edge layer GI, but the present invention is not limited.Insulating barrier GI is also known as gate insulator
Layer.Insulating barrier GI material can be inorganic material (such as：Silica, silicon nitride, silicon oxynitride or
The stack layer of above-mentioned at least two kinds materials), organic material or its combination.
Fig. 1 D are refer to, then, the first metal oxide semiconductor layer 120 are formed on insulating barrier GI.
For example, in the present embodiment, using chemical vapor deposition (chemical vapor deposition,
CVD) method, at a temperature of the first oxygen concentration, first, the first metal oxygen is deposited on insulating barrier GI
Compound semiconductor layer 120.Can be that the 0%, first temperature is in the first oxygen concentration by taking actual numerical value as an example
Room temperature (such as：20 DEG C~30 DEG C) under deposit the first metal oxide semiconductor layer 120.But this hair
Bright not limited to this, formed the first metal oxide semiconductor layer 120 process conditions (such as：Gas is dense
Degree, temperature, pressure etc.) visual actual demand makes the appropriate adjustments.In the present embodiment, the first metal
Oxide semiconductor pattern SE1 material is, for example, indium gallium zinc (Indium-Gallium-Zinc
Oxide, IGZO), but the invention is not restricted to this, in other embodiments, the first metal oxide is partly led
Body pattern SE1 material is alternatively zinc oxide (ZnO), tin oxide (SnO), indium zinc oxide (Indium-Zinc
Oxide, IZO), gallium oxide zinc (Gallium-Zinc Oxide, GZO), zinc-tin oxide (Zinc-Tin Oxide,
ZTO), tin indium oxide (Indium-Tin Oxide, ITO) or other suitable materials.It refer to Fig. 1 D
And Fig. 1 E, then, patterned first metal oxide semiconductor layer 120, to form the oxidation of the first metal
Thing semiconductor pattern SE1.First metal-oxide semiconductor (MOS) pattern SE1 is overlapping with grid G.
Fig. 1 F are refer to, then, the second metal oxide semiconductor layer 130 are formed, to cover the first gold medal
Belong to oxide semiconductor pattern SE1.For example, in the present embodiment, using chemical vapor deposition
(chemical vapor deposition, CVD) method, under the second oxygen concentration, second temperature, deposition
Go out the second metal oxide semiconductor layer 130.By taking actual numerical value as an example, can be in the second oxygen concentration
10%~15%, first temperature is to deposit the second metal oxide semiconductor layer at 100 DEG C~300 DEG C
130.But the invention is not restricted to this, formed the second metal oxide semiconductor layer 130 process conditions (example
Such as：Gas concentration, temperature, pressure etc.) visual actual demand does and appropriate must adjust.In the present embodiment
In, to form the material of the second metal oxide semiconductor layer 130 with being aoxidized to form the first metal
The material of thing semiconductor layer 120 can be identical.Fig. 1 F and Fig. 1 G are refer to, then, pattern the second gold medal
Belong to oxide semiconductor layer 130, to form the second metal-oxide semiconductor (MOS) pattern SE2.First metal oxygen
Compound semiconductor pattern SE1 positions are between the second metal-oxide semiconductor (MOS) pattern SE2 and insulating barrier GI.
First metal-oxide semiconductor (MOS) pattern SE1 can directly connect with the second metal-oxide semiconductor (MOS) pattern SE2
Touch.Second metal-oxide semiconductor (MOS) pattern SE2 material is, for example, indium gallium zinc
(Indium-Gallium-Zinc Oxide, IGZO), but the invention is not restricted to this, in other embodiments,
Second metal-oxide semiconductor (MOS) pattern SE2 material be alternatively zinc oxide (ZnO), tin oxide (SnO),
Indium zinc oxide (Indium-Zinc Oxide, IZO), gallium oxide zinc (Gallium-Zinc Oxide, GZO),
Zinc-tin oxide (Zinc-Tin Oxide, ZTO), tin indium oxide (Indium-Tin Oxide, ITO) or
Other suitable materials.
It is at different time points in the present embodiment it should be noted that as shown in Fig. 1 D~Fig. 1 G
Patterned first metal oxide semiconductor layer 120, the second metal oxide semiconductor layer 130, with respectively
Form the first metal-oxide semiconductor (MOS) pattern SE1, the second metal-oxide semiconductor (MOS) pattern SE2；So
And the invention is not restricted to this, in other embodiments, can also it form the first metal-oxide semiconductor (MOS)
After the metal oxide semiconductor layer 130 of layer 120 and second, then patterned first metal oxide half simultaneously
Conductor layer 120, the second metal oxide semiconductor layer 130, to form the first metal oxygen at same time point
Compound semiconductor pattern SE1, the second metal-oxide semiconductor (MOS) pattern SE2, including above-mentioned steps are thin
Film transistor manufacture method is also in the category of the invention to be protected.
Fig. 1 H are refer to, then, form the second conductive layer 140, are partly led with covering the first metal oxide
Body pattern SE1, the second metal-oxide semiconductor (MOS) pattern SE2.Fig. 1 H and Fig. 1 I are refer to, then,
The second conductive layer 140 is patterned, to form source S and drain D.For example, in the present embodiment,
Using etching solution (such as：Aluminic acid etc.), the second conductive layer 140 is patterned, to form source S and leakage
Pole D, but the present invention is not limited.It refer to Fig. 1 I, the first metal-oxide semiconductor (MOS) pattern SE1
Configuration is on insulating barrier GI.Second metal-oxide semiconductor (MOS) pattern SE2 configurations aoxidize in the first metal
On thing semiconductor pattern SE1.First metal-oxide semiconductor (MOS) pattern SE1 and the second metal oxide half
Conductive pattern SE2 is stacked into semiconductor structure SE.Source S and drain D respectively with semiconductor structure SE
Both sides electrical connection.In this, thin film transistor (TFT) TFT is just completed.
It is worth noting that, in above-mentioned thin film transistor (TFT) TFT manufacturing process, the first metal oxide
Semiconductor layer 120 is formed under the first oxygen concentration, the second metal oxide semiconductor layer 130 be
Formed under second oxygen concentration, and the second oxygen concentration is more than the first oxygen concentration.Therefore, second is utilized
The resistivity meeting for the second metal-oxide semiconductor (MOS) pattern SE2 that metal oxide semiconductor layer 130 is formed
More than the first metal-oxide semiconductor (MOS) pattern formed using the first metal oxide semiconductor layer 120
SE1 resistivity.In other words, the second metal-oxide semiconductor (MOS) pattern SE2 aoxidizes compared with the first metal
Thing semiconductor pattern SE1 insulatings.Thereby, during pattern dissolves source S with drain D, compared with
For the second metal-oxide semiconductor (MOS) pattern SE2 of insulating the first metal below can be protected to aoxidize
Thing semiconductor pattern SE1, the first metal-oxide semiconductor (MOS) pattern SE1 is avoided to be influenceed by etching solution,
And then realize the thin film transistor (TFT) TFT of function admirable.
Fig. 2A to Fig. 2 I is the diagrammatic cross-section of the method for fabricating thin film transistor of another embodiment of the present invention.
Fig. 2A to Fig. 2 I method for fabricating thin film transistor and Figure 1A to Fig. 1 I method for fabricating thin film transistor
Similar therefore identical or corresponding element, represented with identical or corresponding label.Fig. 2A extremely schemes
The difference of 2I method for fabricating thin film transistor and Figure 1A to Fig. 1 I method for fabricating thin film transistor is：
It is different from material to form semiconductor structure SE ' mode, below mainly with regard to being explained at this difference, both
Mutually exist together referring again to preceding description, just no longer repeated in this.
Fig. 2A is refer to, first, there is provided substrate 110.Fig. 2 B are refer to, then, on substrate 110
Form grid G.Fig. 2 C are refer to, then, insulating barrier GI are formed, to cover grid G.It refer to figure
2D, then, the first metal oxide semiconductor layer 120 is formed on insulating barrier GI.It refer to Fig. 2 D
And Fig. 2 E, then, patterned first metal oxide semiconductor layer 120, to form the oxidation of the first metal
Thing semiconductor pattern SE1.First metal-oxide semiconductor (MOS) pattern SE1 is overlapping with grid G.It refer to
Fig. 2 F, then, the second metal oxide semiconductor layer 130 ' is formed, to cover the first metal oxide half
Conductive pattern SE1.Fig. 2 F and Fig. 2 G are refer to, then, pattern the second metal-oxide semiconductor (MOS)
Layer 130 ', to form the second metal-oxide semiconductor (MOS) pattern SE2 '.First metal-oxide semiconductor (MOS) figure
Case SE1 positions are between the second metal-oxide semiconductor (MOS) pattern SE2 ' and insulating barrier GI.First metal oxygen
Compound semiconductor pattern SE1 can be contacted directly with the second metal-oxide semiconductor (MOS) pattern SE2 '.
It is in different time points patterned first metal in the present embodiment as shown in Fig. 2 D~Fig. 2 G
Oxide semiconductor layer 120, the second metal oxide semiconductor layer 130 ', to form the first metal respectively
Oxide semiconductor pattern SE1, the second metal-oxide semiconductor (MOS) pattern SE2 '；However, the present invention is not
It is limited to this, in other embodiments, can also forming the first metal oxide semiconductor layer 120 and second
After metal oxide semiconductor layer 130 ', then simultaneously patterned first metal oxide semiconductor layer 120,
Second metal oxide semiconductor layer 130 ', to form the first metal-oxide semiconductor (MOS) at same time point
Pattern SE1, the second metal-oxide semiconductor (MOS) pattern SE2 ', include the film crystal control of above-mentioned steps
Method is made also in the category to be protected of the invention.
Unlike Figure 1A to Fig. 1 I embodiment, in Fig. 2A to Fig. 2 I embodiment, first
The material of metal-oxide semiconductor (MOS) pattern SE1 material and the second metal-oxide semiconductor (MOS) pattern SE2 '
It is different.Second metal-oxide semiconductor (MOS) pattern SE2 ' material can be stanniferous metal-oxide semiconductor (MOS).
Second metal-oxide semiconductor (MOS) pattern SE2 ' carrier mobility (mobility) is less than the first metal oxygen
Compound semiconductor pattern SE1 carrier mobility.For example, the first metal-oxide semiconductor (MOS) figure
Case SE1 material can be indium gallium zinc (IGZO), the second metal-oxide semiconductor (MOS) pattern SE2's '
Material can be the indium gallium zinc (IGZTO) of stanniferous (Sn).However, the invention is not restricted to this, at it
In his embodiment, the first metal-oxide semiconductor (MOS) pattern SE1 material be alternatively indium gallium (IGO),
Indium zinc oxide (IZO), zinc oxide (ZnO) or other suitable materials, and the second metal oxide is partly led
Body pattern SE2 ' material be alternatively indium tin zinc oxide (ITZO), polycrystalline indium gallium (poly-IGO),
Zinc-tin oxide (ZTO), the zinc-tin oxide (ZTO containing indium：In), gallium tin-oxide (GTO), indium gallium
Tin-oxide (IGTO) or other suitable materials.
Fig. 2 H are refer to, then, form the second conductive layer 140, are partly led with covering the first metal oxide
Body pattern SE1, the second metal-oxide semiconductor (MOS) pattern SE2 ' and insulating barrier GI.It refer to Fig. 2 H
And Fig. 2 I, then, the second conductive layer 140 is patterned, to form source S and drain D.For example,
In the present embodiment, using etching solution (such as：Aluminic acid etc.), the second conductive layer 140 is patterned, with
Source S and drain D are formed, but the present invention is not limited.First metal-oxide semiconductor (MOS) pattern SE1
Configuration is on insulating barrier GI.Second metal-oxide semiconductor (MOS) pattern SE2 ' configurations aoxidize in the first metal
On thing semiconductor pattern SE1.First metal-oxide semiconductor (MOS) pattern SE1 and the second metal oxide half
Conductive pattern SE2 ' is stacked into semiconductor structure SE '.Source S and drain D respectively with semiconductor structure SE '
Both sides electrical connection.In this, thin film transistor (TFT) TFT ' is just completed.
It is worth noting that, in above-mentioned thin film transistor (TFT) TFT ' manufacturing process, the second metal oxide
Semiconductor pattern SE2 ' carrier mobility is less than the first metal-oxide semiconductor (MOS) pattern SE1 current-carrying
Transport factor.Second metal-oxide semiconductor (MOS) pattern SE2 ' to pattern for dissolving source S and drain electrode
The etch-rate of D etching solution is less than the first metal-oxide semiconductor (MOS) pattern SE1 to the etching solution
Etch-rate.Thereby during pattern dissolves source S with drain D, the second metal oxide is partly led
Body pattern SE2 ' can protect the first metal-oxide semiconductor (MOS) pattern SE1 below, avoid the first gold medal
Category oxide semiconductor pattern SE1 is influenceed by etching solution, and then realizes the film crystal of function admirable
Pipe TFT '.
In summary, in the manufacture method of the thin film transistor (TFT) of one embodiment of the invention, the first metal oxygen
Compound semiconductor layer is formed under the first oxygen concentration, and the second metal oxide semiconductor layer is second
Formed under oxygen concentration, and the second oxygen concentration is more than the first oxygen concentration.Therefore, the second metal aoxidizes
Thing semiconductor pattern is compared with the first metal-oxide semiconductor (MOS) pattern insulating.Thereby, source electrode is dissolved in pattern
During drain electrode, the second metal-oxide semiconductor (MOS) pattern can protect the first metal oxygen below
Compound semiconductor pattern, the first metal-oxide semiconductor (MOS) pattern is avoided to be influenceed by etching solution, and then
Realize the thin film transistor (TFT) of function admirable.
Finally it should be noted that：Various embodiments above is merely illustrative of the technical solution of the present invention, rather than right
It is limited；Although the present invention is described in detail with reference to foregoing embodiments, this area it is common
Technical staff should be understood：It can still modify to the technical scheme described in foregoing embodiments,
Equivalent substitution either is carried out to which part or all technical characteristic；And these modifications or replacement, and
The essence of appropriate technical solution is not set to depart from the scope of various embodiments of the present invention technical scheme.
Claims (14)
- A kind of 1. manufacture method of thin film transistor (TFT), it is characterised in that including：Substrate is provided；Grid is formed on the substrate；Insulating barrier is formed, to cover the grid；The first metal oxide semiconductor layer and the second metal-oxide semiconductor (MOS) are formed on the insulating barrier Layer, and first metal oxide semiconductor layer and second metal oxide semiconductor layer are patterned, To form the first metal-oxide semiconductor (MOS) pattern and the second metal-oxide semiconductor (MOS) pattern, wherein described First metal-oxide semiconductor (MOS) pattern position is in the second metal-oxide semiconductor (MOS) pattern and the insulation Between layer, first metal oxide semiconductor layer is formed under the first oxygen concentration, described second Metal oxide semiconductor layer is formed under the second oxygen concentration, and second oxygen concentration is more than institute State the first oxygen concentration；AndSource electrode and drain electrode are formed on the second metal-oxide semiconductor (MOS) pattern.
- 2. the manufacture method of thin film transistor (TFT) according to claim 1, it is characterised in that described One metal oxide semiconductor layer is to be formed at the first temperature, second metal oxide semiconductor layer It is to be formed at the second temperature, and the second temperature is more than first temperature.
- 3. the manufacture method of thin film transistor (TFT) according to claim 2, it is characterised in that described One oxygen concentration is 0%, and second oxygen concentration is between 10%~15%.
- 4. the manufacture method of thin film transistor (TFT) according to claim 2, it is characterised in that described One temperature is between 20 DEG C~30 DEG C, and the second temperature is between 100 DEG C~300 DEG C.
- 5. the manufacture method of thin film transistor (TFT) according to claim 1, it is characterised in that described The resistivity of two metal-oxide semiconductor (MOS) patterns is more than the electricity of the first metal-oxide semiconductor (MOS) pattern Resistance rate.
- 6. the manufacture method of thin film transistor (TFT) according to claim 1, it is characterised in that use phase Same material forms first metal oxide semiconductor layer and second metal-oxide semiconductor (MOS) Layer.
- A kind of 7. manufacture method of thin film transistor (TFT), it is characterised in that including：Substrate is provided；Grid is formed on the substrate；Insulating barrier is formed, to cover the grid；The first metal-oxide semiconductor (MOS) pattern and the second metal oxide half are formed on the insulating barrier Conductive pattern, wherein the first metal-oxide semiconductor (MOS) pattern position is in second metal oxide half Between conductive pattern and the insulating barrier, the carrier mobility of the second metal-oxide semiconductor (MOS) pattern Rate is less than the carrier mobility of the first metal-oxide semiconductor (MOS) pattern；AndSource electrode and drain electrode are formed on the second metal-oxide semiconductor (MOS) pattern.
- 8. the manufacture method of thin film transistor (TFT) according to claim 7, it is characterised in that described The source electrode and the step of drain electrode are formed on second metal-oxide semiconductor (MOS) pattern to be included：Conductive layer is formed on the second metal-oxide semiconductor (MOS) pattern, to cover first metal Oxide semiconductor pattern, the second metal-oxide semiconductor (MOS) pattern and the insulating barrier；AndThe conductive layer is patterned using etching solution, to form the source electrode and the drain electrode, wherein, institute State the second metal-oxide semiconductor (MOS) pattern and first metal oxygen is less than to the etch-rate of the etching solution Etch-rate of the compound semiconductor pattern to the etching solution.
- 9. the manufacture method of thin film transistor (TFT) according to claim 8, it is characterised in that described The material of the material of one metal-oxide semiconductor (MOS) pattern and the second metal-oxide semiconductor (MOS) pattern is not Together.
- 10. the manufacture method of thin film transistor (TFT) according to claim 9, it is characterised in that described The material of second metal-oxide semiconductor (MOS) pattern is stanniferous metal-oxide semiconductor (MOS).
- A kind of 11. thin film transistor (TFT), it is characterised in that including：Grid；Insulating barrier, cover the grid；Semiconductor structure, including：First metal-oxide semiconductor (MOS) pattern, is configured on the insulating barrier；AndSecond metal-oxide semiconductor (MOS) pattern, configure on the first metal-oxide semiconductor (MOS) pattern； AndSource electrode and drain electrode, are electrically connected with the both sides of the semiconductor structure, wherein second metal aoxidizes The resistivity of thing semiconductor pattern is more than the resistivity of the first metal-oxide semiconductor (MOS) pattern.
- 12. thin film transistor (TFT) according to claim 11, it is characterised in that second metal oxygen Compound semiconductor pattern is less than the first metal-oxide semiconductor (MOS) pattern pair to the etch-rate of etching solution The etch-rate of the etching solution.
- 13. thin film transistor (TFT) according to claim 11, it is characterised in that first metal oxygen The material of compound semiconductor pattern is different from the material of the second metal-oxide semiconductor (MOS) pattern.
- 14. thin film transistor (TFT) according to claim 13, it is characterised in that second metal oxygen The material of compound semiconductor pattern is stanniferous metal-oxide semiconductor (MOS).
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| US20100073268A1 (en) * | 2007-04-05 | 2010-03-25 | Atsushi Matsunaga | Organic electroluminescent display device and patterning method |
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| CN104335353A (en) * | 2012-06-06 | 2015-02-04 | 株式会社神户制钢所 | Thin film transistor |
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| US20100073268A1 (en) * | 2007-04-05 | 2010-03-25 | Atsushi Matsunaga | Organic electroluminescent display device and patterning method |
| CN101630692A (en) * | 2008-07-14 | 2010-01-20 | 三星电子株式会社 | Channel layers and semiconductor devices including the same |
| CN102347368A (en) * | 2010-07-30 | 2012-02-08 | 三星电子株式会社 | Transistor, method of manufacturing transistor, and electronic device including transistor |
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