CN107508597A - The phase-locked loop circuit of double loop filtering - Google Patents
The phase-locked loop circuit of double loop filtering Download PDFInfo
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- CN107508597A CN107508597A CN201710665531.6A CN201710665531A CN107508597A CN 107508597 A CN107508597 A CN 107508597A CN 201710665531 A CN201710665531 A CN 201710665531A CN 107508597 A CN107508597 A CN 107508597A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
Abstract
The invention provides a kind of phase-locked loop circuit of double loop filtering, including it is sequentially connected in series the phase discriminator to form loop, two-way charge pump and loop filtering unit, Voltage to current transducer and current adder circuit unit, current control oscillator and frequency divider；The input of the phase discriminator is connected to reference clock signal end；Voltage to current transducer and the current adder circuit unit is used to the control voltage that the two-way charge pump and loop filtering unit export being converted to electric current；The output end of the frequency divider is connected to the feedback input end of the phase discriminator.Compared with correlation technique, its is simple in construction for the phase-locked loop circuit of double loop of the invention filtering, and cost is low, small power consumption and stability are high.
Description
【Technical field】
The present invention relates to a kind of electronic circuit field, more particularly to a kind of double loop for circuit clock system filters
Phase-locked loop circuit.
【Background technology】
In the application of integrated circuit, clock system is an important module of chip design, to meet that system is different
Clock needs, and is realized by using phase-locked loop circuit.
The phase-locked loop circuit of correlation technique mainly includes phase discriminator, charge pump, loop filter, voltage controlled oscillator and frequency dividing
Device.
However, in the phase-locked loop circuit of correlation technique, the loop filter includes resistance, the first electric capacity and the second electricity
Hold, be grounded after the resistance and first electric capacity series connection, second capacity earth is simultaneously connected with the resistor coupled in parallel.In order to
The stability of system, first electric capacity need more many times greater than second electric capacity, and first capacitance size is hundreds of pF
Even nF ranks, need to take bigger chip area when the electric capacity of the capacity levels is realized in integrated circuits, increase
The cost of chip.
Therefore, it is necessary to a kind of phase-locked loop circuit of new double loop filtering is provided to solve the above problems.
【The content of the invention】
It is an object of the invention to provide a kind of phaselocked loop electricity of the double loop that cost is low, small power consumption and stability are high filtering
Road.
In order to achieve the above object, the invention provides a kind of phase-locked loop circuit of double loop filtering, including it is sequentially connected in series
Form phase discriminator, two-way charge pump and the loop filtering unit, Voltage to current transducer and current adder circuit unit, electric current in loop
Control oscillator and frequency divider；The input of the phase discriminator is connected to reference clock signal end；The Voltage to current transducer and
Current adder circuit unit is used to the control voltage that the two-way charge pump and loop filtering unit export being converted to electric current；Institute
The output end for stating frequency divider is connected to the feedback input end of the phase discriminator.
Preferably, the two-way charge pump and loop filtering unit include mutually forming the first loop unit being connected in parallel
With the second loop unit；
First loop unit includes the first current source, the second current source, the first electric capacity, first resistor and the first output
Control terminal；
One end of first current source is connected to supply voltage, and the other end of first current source is opened by a selection
Connection is connected to first output control terminal, and the rising pulses signal output part of the phase discriminator controls the control of the selecting switch
End realization is turned on or off；
One end of second current source is connected to first output control terminal, second electricity by a selecting switch
The other end in stream source is connected to ground connection, and the falling pulse signal output part of the phase discriminator controls the control terminal of the selecting switch real
Now it is turned on or off；
First electric capacity forms in parallel with the first resistor, and its one end is connected to first output control terminal, its
The other end is connected to ground connection；
Second loop unit includes the 3rd current source, the 4th current source, the second electric capacity and second and defeated controls out end；
One end of 3rd current source is connected to supply voltage, and the other end of the 3rd current source is opened by a selection
Connection is connected to second output control terminal, and the rising pulses signal output part of the phase discriminator controls the control of the selecting switch
End realization is turned on or off；
One end of 4th current source is connected to second output control terminal, the 4th electricity by a selecting switch
The other end in stream source is connected to ground connection, and the falling pulse signal output part of the phase discriminator controls the control terminal of the selecting switch real
Now it is turned on or off；
Described second electric capacity one end is connected to second output control terminal, and the other end is connected to ground connection；
First output control terminal and second output control terminal are respectively connecting to the Voltage to current transducer and electricity
Flow add circuit unit.
Preferably, first current source is identical with the size of current of second current source, the 3rd current source and
The size of current of 4th current source is identical, and the electric current of first current source is the size of current of the 3rd current source
Several times.
Preferably, Voltage to current transducer and the current adder circuit unit includes the first transistor, second transistor, the
Three transistors, the 4th transistor, the 5th transistor, the 6th transistor, the 7th transistor, second resistance and 3rd resistor；
The grid of the first transistor is connected to first output control terminal and is used as input, the first transistor
Source electrode is connected to ground connection by concatenating the second resistance, and the drain electrode of the first transistor is connected to the third transistor
Drain electrode；
The grid of the second transistor is connected to second output control terminal and is used as input, the second transistor
Source electrode is connected to ground connection by concatenating the 3rd resistor, and the drain electrode of the second transistor is connected to the 4th transistor
Drain electrode；
The grid of the third transistor is connected to the grid of the 5th transistor, and the source electrode of the third transistor connects
Supply voltage is connected to, the drain electrode of the third transistor is connected to the grid of the first transistor；
The grid of 4th transistor is connected to the grid of the 6th transistor, and the source electrode of the 4th transistor connects
Supply voltage is connected to, the drain electrode of the 4th transistor is connected to the grid of the 4th transistor；
The source electrode of 5th transistor is connected to supply voltage, and the drain electrode of the 5th transistor is connected to the described 6th
The drain electrode of transistor；
The source electrode of 6th transistor is connected to supply voltage, and the drain electrode of the 6th transistor is connected to the described 7th
The drain electrode of transistor；
The grid of 7th transistor is connected to the current control oscillator as output, the 7th transistor
Source electrode is connected to ground connection, and the drain electrode of the 7th brilliant pipe is connected to the grid of the 7th transistor.
Preferably, the first transistor, the second transistor and the 7th transistor are nmos pass transistor；Institute
It is PMOS transistor to state third transistor, the 4th transistor, the 5th transistor and the 6th transistor.
Preferably, the current control oscillator includes at least three delay cells and three delay cells are first successively
Tail is connected；Each delay cell include the 8th transistor, the 9th transistor, the tenth transistor, the 11st transistor and
Tenth two-transistor；
The grid of 8th transistor is connected to the 12nd crystal as input, the source electrode of the 8th transistor
The drain electrode of pipe, the drain electrode of the 8th transistor are connected to the frequency divider as output；
The grid of 9th transistor is connected to the 12nd crystal as input, the source electrode of the 9th transistor
The drain electrode of pipe, the drain electrode of the 9th transistor are connected to the frequency divider as output；
The grid of tenth transistor is connected to the grid of the 8th transistor, and the source electrode of the tenth transistor connects
Supply voltage is connected to, the drain electrode of the tenth transistor is connected to the drain electrode of the 8th transistor；
The grid of 11st transistor is connected to the grid of the 9th transistor, the source of the 11st transistor
Pole is connected to supply voltage, and the drain electrode of the 11st transistor is connected to the drain electrode of the 9th transistor；
The grid of tenth two-transistor is connected to the output of Voltage to current transducer and the current adder circuit unit,
The source electrode of tenth two-transistor is connected to ground connection.
Preferably, the 8th transistor, the 9th transistor and the tenth two-transistor are nmos pass transistor,
Tenth transistor and the 11st transistor are PMOS transistor.
Compared with correlation technique, the phase-locked loop circuit of double loop of the invention filtering is by using two-way charge pump and loop
Filter unit, by adjusting the ratio of charge pump current, that is, adjust first current source and second current source respectively with
The current ratio of 3rd current source and the 4th current source adjusts its dead-center position to realize, reduces first electric capacity
Capacitance, so as to save the area of the phase-locked loop circuit of double loop filtering or related chip, reduce production cost；Together
When, the circuit also uses the Voltage to current transducer and current adder circuit unit, and control voltage on the one hand is converted into electric current,
The addition of the output of the two-way charge pump and loop filtering unit is completed in current field, i.e., the two-way is realized in current field
The integration of charge pump and the transmission function of loop filtering unit, enough phase margins are made it have, improve the double loop filter
The stability of a system of the phase-locked loop circuit of ripple, operational amplifier is on the other hand substituted, reduce the power consumption of circuit.
【Brief description of the drawings】
Fig. 1 is the structured flowchart of the phase-locked loop circuit of double loop of the present invention filtering；
Fig. 2 is the two-way charge pump of phase-locked loop circuit and the circuit structure of loop filtering unit of double loop of the present invention filtering
Figure；
Fig. 3 is the Voltage to current transducer of phase-locked loop circuit and the electricity of current adder circuit unit of double loop of the present invention filtering
Line structure figure；
Fig. 4 is the circuit structure diagram of the current control oscillator of the phase-locked loop circuit of double loop of the present invention filtering.
【Embodiment】
The invention will be further described with embodiment below in conjunction with the accompanying drawings.
Referring to Fig. 1, the structured flowchart of the phase-locked loop circuit for double loop of the present invention filtering.The invention provides a kind of double
The phase-locked loop circuit 100 of loop filtering, including it is sequentially connected in series the phase discriminator 1 to form loop, two-way charge pump and loop filtering list
Member 2, Voltage to current transducer and current adder circuit unit 3, current control oscillator 4 and frequency divider 5.
The input of the phase discriminator 1 is connected to reference clock signal end Fref.The output end of the phase discriminator 1 includes upper
Rise pulse signal output end UP and falling pulse signal output part DOWN, the rising pulses signal output part UP and the decline
Pulse signal output end DOWN is connected to the two-way charge pump and loop filtering unit 2.
Voltage to current transducer and the current adder circuit unit 3 is used for the two-way charge pump and loop filtering unit
The control voltage of 2 outputs is converted to electric current.
The input of the current control oscillator 4 is connected to Voltage to current transducer and the current adder circuit unit 3
Output, the output of the current control oscillator 4 are connected to the input of the frequency divider 5.
The output end of the frequency divider 5 is connected to the feedback input end of the phase discriminator 1.
Its operation principle is as follows：
When the feedback signal Fdiv of the frequency divider 5 output frequency is less than reference signal Fref frequency, the mirror
The rising pulses control signal of the rising pulses signal output part UP outputs of phase device 1 is effective, two-way charge pump and loop filtering list
Charge pump in member 2 charges to electric capacity, the increase of the frequency of current control oscillator 4, makes the feedback signal Fdiv close reference of frequency
Signal Fref frequency.
When the frequency of the output feedback signal Fdiv of frequency divider 5 is higher than reference signal Fref frequency, the phase demodulation
The falling pulse control signal of the falling pulse signal output part DOWN outputs of device 1 is effective, two-way charge pump and loop filtering list
Charge pump in member 2 is discharged electric capacity, and the frequency of current control oscillator 4 reduces, and makes the feedback signal Fdiv close reference of frequency
Signal Fref frequency.
Fig. 2 is please referred to, for the two-way charge pump and loop filtering list of the phase-locked loop circuit of double loop of the present invention filtering
The circuit structure diagram of member.Specifically, the two-way charge pump and loop filtering unit 2 include mutually forming first be connected in parallel
The loop unit 22 of loop unit 21 and second.The double loop structure causes electric capacity to reduce, and then reduces it and account for the area of chip, drop
Low chip production cost.
First loop unit 21 includes the first current source 211, the second current source 212, the first electric capacity C1, first resistor
R1 and the first output control terminal VC1.In present embodiment, the electric current of first current source 211 and second current source 212
Size is identical, certainly, not limited to this.
One end of first current source 211 is connected to supply voltage VDD, and the other end of first current source 211 leads to
Cross a selecting switch and be connected to the first output control terminal VC1.The rising pulses signal output part UP controls of the phase discriminator 1
The control terminal of the selecting switch, to realize being turned on or off for the selecting switch.I.e. described rising pulses signal output part UP's
Output signal controls the selecting switch to disconnect or turn on, so as to realize the output control terminal VC1 of the first current source 211 and first
Disconnection or conducting.
One end of second current source 212 is connected to the first output control terminal VC1 by a selecting switch, described
The other end of second current source 212 is connected to ground connection, and the falling pulse signal output part DOWN of the phase discriminator 1 controls the selection
The control terminal of switch is realized and is turned on or off.I.e. described falling pulse signal output part DOWN output signal controls the selection to open
Shut-off is opened or turned on, so as to realize the disconnection or conducting of the output control terminal VC1 of the second current source 212 and first.
The first electric capacity C1 and the first resistor R1 formed it is in parallel realize filter action, its one end is connected to described
One output control terminal VC1, its other end are connected to ground connection.
It is defeated that second loop unit 22 includes the 3rd current source 221, the 4th current source 222, the second electric capacity C2 and second
Control out end VC2.In present embodiment, the 3rd current source 221 is identical with the size of current of the 4th current source 222,
It is certainly not limited to this.
One end of 3rd current source 221 is connected to supply voltage VDD, and the other end of the 3rd current source 221 leads to
Cross a selecting switch and be connected to the second output control terminal VC2.The rising pulses signal output part UP controls of the phase discriminator 1
The control terminal of the selecting switch, to realize being turned on or off for the selecting switch.I.e. described rising pulses signal output part UP's
Output signal controls the selecting switch to disconnect or turn on, so as to realize the 3rd current source 221 and the second output control terminal VC2
Disconnection or conducting.
One end of 4th current source 222 is connected to the second output control terminal VC2 by a selecting switch, described
The other end of 4th current source 222 is connected to ground connection.The falling pulse signal output part DOWN of the phase discriminator 1 controls the selection
The control terminal of switch is realized and is turned on or off.I.e. described falling pulse signal output part DOWN output signal controls the selection to open
Shut-off is opened or turned on, so as to realize the disconnection or conducting of the 4th current source 222 and the second output control terminal VC2.
Described second electric capacity C2 one end is connected to the second output control terminal VC2, and the other end is connected to ground connection.
The first output control terminal VC1 and the second output control terminal VC2 is respectively connecting to the voltage x current and turned
Change and current adder circuit unit 3.
The electric current of first current source 211 is the several times of the size of current of the 3rd current source 221, can be whole
Several times, or it is non-integral multiple.It is preferred that integral multiple, it is easy to the layout design of circuit.Such as, the electric current of first current source 211
For BIcp, the electric current of the 3rd current source 221 is Icp, and the electric current of first current source 211 is the 3rd current source
B times of 221 electric current, it can be integer or non-integer that B, which is,.
The two-way charge pump and loop filtering unit 2 of said structure eliminate operational amplifier, that is, realize reduction circuit
Power consumption and design complexity.
Fig. 3 is please referred to, for the Voltage to current transducer and current add of the phase-locked loop circuit of double loop of the present invention filtering
The circuit structure diagram of circuit unit.Specifically, the Voltage to current transducer and current adder circuit unit 3 include the first transistor
MN1, second transistor MN2, third transistor MP1, the 4th transistor MP2, the 5th transistor MP4, the 6th transistor MP3,
Seven transistor MN3, second resistance R2 and 3rd resistor R3.
In present embodiment, the first transistor MN1, the second transistor MN2 and the 7th transistor MN3 are equal
For nmos pass transistor；The third transistor MP1, the 4th transistor MP2, the 5th transistor MP4 and the described 6th
Transistor MP3 is PMOS transistor.Certainly, however it is not limited to this.
The grid of the first transistor MN1 is connected to the first output control terminal VC1 and turned as the voltage x current
Change and the input of current adder circuit unit 3, the source electrode of the first transistor MN1 is by concatenating the second resistance R2 connections
To ground connection, the drain electrode of the first transistor MN1 is connected to the drain electrode of the third transistor MP1.
The grid of the second transistor MN2 is connected to the second output control terminal VC2 and turned as the voltage x current
Change and the input of current adder circuit unit 3, the source electrode of the second transistor MN2 is by concatenating the 3rd resistor R3 connections
To ground connection, the drain electrode of the second transistor MN2 is connected to the drain electrode of the 4th transistor MP2.
The grid of the third transistor MP1 is connected to the grid of the 5th transistor MP4, the third transistor
MP1 source electrode is connected to supply voltage VDD, and for connecting supply voltage, the drain electrode of the third transistor MP1 is connected to described
The first transistor MN1 grid.
The grid of the 4th transistor MP2 is connected to the grid of the 6th transistor MP3, the 4th transistor
MP2 source electrode is connected to supply voltage VDD, and the drain electrode of the 4th transistor MP2 is connected to the 4th transistor MP2's
Grid.
The source electrode of the 5th transistor MP4 is connected to supply voltage VDD, the drain electrode connection of the 5th transistor MP4
To the drain electrode of the 6th transistor MP3.
The source electrode of the 6th transistor MP3 is connected to supply voltage VDD, the drain electrode connection of the 6th transistor MP3
To the drain electrode of the 7th transistor MN3；
The grid of the 7th transistor MN3 is connected to the current control oscillator 4 as output, for exporting to institute
State the signal Bias after the integration of two-way charge pump and the transmission function of the output of loop filtering unit 2.The 7th transistor MN3
Source electrode be connected to ground connection, the drain electrode of the 7th brilliant pipe MN3 is connected to the grid of the 7th transistor MN3.
Voltage to current transducer and the current adder circuit unit 3 of said structure so that the two-way charge pump and ring
Road filter unit 2 described first it is defeated control out end VC1 and it is described second it is defeated control out end VC2 export control voltage connect respectively
It is connected to the grid of the first transistor MN1 and the grid of the second transistor MN2, the source electrode of the first transistor MN1
The second resistance R2 and the 3rd resistor R3 are connected respectively to the source electrode of the second transistor MN2, is realized by described in
First defeated controls out end VC1 and the second defeated control voltage for controlling out end VC2 to export to be converted to the purpose of electric current；Pass through again
The third transistor MP1 and the 4th transistor MP2 is by current mirror to the 5th transistor MP4 and described 6th brilliant
Body pipe MP3, and by the addition of the 5th transistor MP4 and the 6th transistor MP3 completion electric currents, so as to realize to institute
The integration of two-way charge pump and the transmission function of the output of loop filtering unit 2 is stated, the transmission function for obtaining the output has enough
Phase margin, the stability of a system of the phase-locked loop circuit 100 of the collateral security double loop filtering.
Moreover, the addition for completing to export the two-way charge pump and loop filtering unit 2 in current field, compared in voltage
Domain, its implementation is simple, and cost is low.
Fig. 4 is please referred to, for the circuit knot of the current control oscillator of the phase-locked loop circuit of double loop of the present invention filtering
Composition.The current control oscillator 4 includes at least three structure identical delay cells 41 and the delay cell 41 successively
Join end to end and connect, form ring oscillator structure.In present embodiment, the current control oscillator 4 is with including described in three
Delay cell 41 and three delay cells 41 join end to end be connected in example explanation successively：
Each delay cell 41 includes the 8th transistor MN4, the 9th transistor MN5, the tenth transistor MP5, the tenth
One transistor MP6 and the tenth two-transistor MN6.
In present embodiment, the 8th transistor MN4, the 9th transistor MN5 and the tenth two-transistor MN6
It is nmos pass transistor, the tenth transistor MP5 and the 11st transistor MP6 are PMOS transistor.Certainly, it is and unlimited
In this.
Input INPUT of the grid of the 8th transistor MN4 as the current control oscillator 4, the described 8th is brilliant
Body pipe MN4 source electrode is connected to the drain electrode of the tenth two-transistor MN6, described in the drain electrode of the 8th transistor MN4 is used as
The output OUTPUT of current control oscillator 4 is connected to the frequency divider 5.
Input INPUT of the grid of the 9th transistor MN5 as the current control oscillator 4, the described 9th is brilliant
Body pipe MN5 source electrode is connected to the drain electrode of the tenth two-transistor MN6, and the drain electrode of the 9th transistor MN5 is as output
OUTPUT is connected to the frequency divider 5；
The grid of the tenth transistor MP5 is connected to the grid of the 8th transistor MN4, the tenth transistor
The drain electrode that MP5 source electrode is connected to supply voltage VDD, the tenth transistor MP5 is connected to the leakage of the 8th transistor MN4
Pole.
The grid of the 11st transistor MP6 is connected to the grid of the 9th transistor MN5, the 11st crystal
Pipe MP6 source electrode is connected to supply voltage VDD, and the drain electrode of the 11st transistor MP6 is connected to the 9th transistor MN5
Drain electrode.
The grid of the tenth two-transistor MN6 is connected to Voltage to current transducer and the current adder circuit unit 3
Output, that is, it is connected to the signal Bias of the grid output of the 7th transistor MN3, the source electrode of the tenth two-transistor MN6
It is connected to ground connection.
The signal Bias is current bias signal, and it changes the oscillator frequency that can change the current control oscillator 4
The size of rate.
Compared with correlation technique, the phase-locked loop circuit of double loop of the invention filtering is by using two-way charge pump and loop
Filter unit, by adjusting the ratio of charge pump current, that is, adjust first current source and second current source respectively with
The current ratio of 3rd current source and the 4th current source adjusts its dead-center position to realize, reduces first electric capacity
Capacitance, so as to save the area of the phase-locked loop circuit of double loop filtering or related chip, reduce production cost；Together
When, the circuit also uses the Voltage to current transducer and current adder circuit unit, and control voltage on the one hand is converted into electric current,
The addition of the output of the two-way charge pump and loop filtering unit is completed in current field, i.e., the two-way is realized in current field
The integration of charge pump and the transmission function of loop filtering unit, enough phase margins are made it have, improve the double loop filter
The stability of a system of the phase-locked loop circuit of ripple, operational amplifier is on the other hand substituted, reduce the power consumption of circuit.
Above-described is only embodiments of the present invention, it should be noted here that for one of ordinary skill in the art
For, without departing from the concept of the premise of the invention, improvement can also be made, but these belong to the protection model of the present invention
Enclose.
Claims (7)
- A kind of 1. phase-locked loop circuit of double loop filtering, it is characterised in that：Including being sequentially connected in series the phase discriminator to form loop, two-way Charge pump and loop filtering unit, Voltage to current transducer and current adder circuit unit, current control oscillator and frequency divider；The input of the phase discriminator is connected to reference clock signal end；Voltage to current transducer and the current adder circuit unit is used to export the two-way charge pump and loop filtering unit Control voltage be converted to electric current；The output end of the frequency divider is connected to the feedback input end of the phase discriminator.
- 2. the phase-locked loop circuit of double loop filtering according to claim 1, it is characterised in that the two-way charge pump and ring Road filter unit includes mutually forming the first loop unit and the second loop unit being connected in parallel；First loop unit includes the first current source, the second current source, the first electric capacity, first resistor and the first output control End；One end of first current source is connected to supply voltage, and the other end of first current source is connected by a selecting switch First output control terminal is connected to, the rising pulses signal output part of the phase discriminator controls the control terminal of the selecting switch real Now it is turned on or off；One end of second current source is connected to first output control terminal, second current source by a selecting switch The other end be connected to ground connection, the falling pulse signal output part of the phase discriminator controls the control terminal of the selecting switch to realize and led On-off is opened；First electric capacity forms in parallel with the first resistor, and its one end is connected to first output control terminal, and its is another End is connected to ground connection；Second loop unit includes the 3rd current source, the 4th current source, the second electric capacity and second and defeated controls out end；One end of 3rd current source is connected to supply voltage, and the other end of the 3rd current source is connected by a selecting switch Second output control terminal is connected to, the rising pulses signal output part of the phase discriminator controls the control terminal of the selecting switch real Now it is turned on or off；One end of 4th current source is connected to second output control terminal, the 4th current source by a selecting switch The other end be connected to ground connection, the falling pulse signal output part of the phase discriminator controls the control terminal of the selecting switch to realize and led On-off is opened；Described second electric capacity one end is connected to second output control terminal, and the other end is connected to ground connection；First output control terminal and second output control terminal are respectively connecting to the Voltage to current transducer and electric current and added Method circuit unit.
- 3. the phase-locked loop circuit of double loop filtering according to claim 2, it is characterised in that first current source and institute State that the size of current of the second current source is identical, the 3rd current source is identical with the size of current of the 4th current source, described The electric current of first current source is the several times of the size of current of the 3rd current source.
- 4. the phase-locked loop circuit of double loop according to claim 2 filtering, it is characterised in that the Voltage to current transducer and Current adder circuit unit includes the first transistor, second transistor, third transistor, the 4th transistor, the 5th transistor, the Six transistors, the 7th transistor, second resistance and 3rd resistor；The grid of the first transistor is connected to first output control terminal as input, the source electrode of the first transistor Ground connection is connected to by concatenating the second resistance, the drain electrode of the first transistor is connected to the leakage of the third transistor Pole；The grid of the second transistor is connected to second output control terminal as input, the source electrode of the second transistor Ground connection is connected to by concatenating the 3rd resistor, the drain electrode of the second transistor is connected to the leakage of the 4th transistor Pole；The grid of the third transistor is connected to the grid of the 5th transistor, and the source electrode of the third transistor is connected to Supply voltage, the drain electrode of the third transistor are connected to the grid of the first transistor；The grid of 4th transistor is connected to the grid of the 6th transistor, and the source electrode of the 4th transistor is connected to Supply voltage, the drain electrode of the 4th transistor are connected to the grid of the 4th transistor；The source electrode of 5th transistor is connected to supply voltage, and the drain electrode of the 5th transistor is connected to the 6th crystal The drain electrode of pipe；The source electrode of 6th transistor is connected to supply voltage, and the drain electrode of the 6th transistor is connected to the 7th crystal The drain electrode of pipe；The grid of 7th transistor is connected to the current control oscillator, the source electrode of the 7th transistor as output Ground connection is connected to, the drain electrode of the 7th brilliant pipe is connected to the grid of the 7th transistor.
- 5. the phase-locked loop circuit of double loop filtering according to claim 4, it is characterised in that the first transistor, institute It is nmos pass transistor to state second transistor and the 7th transistor；It is the third transistor, the 4th transistor, described 5th transistor and the 6th transistor are PMOS transistor.
- 6. the phase-locked loop circuit of double loop filtering according to claim 4, it is characterised in that the current control oscillator Join end to end connect successively including at least three delay cells and three delay cells；Each delay cell includes the 8th Transistor, the 9th transistor, the tenth transistor, the 11st transistor and the tenth two-transistor；The grid of 8th transistor is connected to the tenth two-transistor as input, the source electrode of the 8th transistor Drain electrode, the drain electrode of the 8th transistor are connected to the frequency divider as output；The grid of 9th transistor is connected to the tenth two-transistor as input, the source electrode of the 9th transistor Drain electrode, the drain electrode of the 9th transistor are connected to the frequency divider as output；The grid of tenth transistor is connected to the grid of the 8th transistor, and the source electrode of the tenth transistor is connected to Supply voltage, the drain electrode of the tenth transistor are connected to the drain electrode of the 8th transistor；The grid of 11st transistor is connected to the grid of the 9th transistor, and the source electrode of the 11st transistor connects Supply voltage is connected to, the drain electrode of the 11st transistor is connected to the drain electrode of the 9th transistor；The grid of tenth two-transistor is connected to the output of Voltage to current transducer and the current adder circuit unit, described The source electrode of tenth two-transistor is connected to ground connection.
- 7. the phase-locked loop circuit of double loop filtering according to claim 6, it is characterised in that the 8th transistor, institute It is nmos pass transistor to state the 9th transistor and the tenth two-transistor, the tenth transistor and the 11st transistor For PMOS transistor.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111641410A (en) * | 2020-06-22 | 2020-09-08 | 上海兆芯集成电路有限公司 | Digital phase-locked loop |
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| CN106549665A (en) * | 2015-09-16 | 2017-03-29 | 华为技术有限公司 | The control method of phase-locked loop circuit, data recovery circuit and phase-locked loop circuit |
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| CN103501175A (en) * | 2013-10-24 | 2014-01-08 | 清华大学 | Millimeter-wave phase-locked loop |
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| CN111641410A (en) * | 2020-06-22 | 2020-09-08 | 上海兆芯集成电路有限公司 | Digital phase-locked loop |
| CN111641410B (en) * | 2020-06-22 | 2023-11-17 | 上海兆芯集成电路股份有限公司 | Digital phase-locked loop |
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Application publication date: 20171222 |