CN107492924B - Battery equalization circuit and control method - Google Patents
Battery equalization circuit and control method Download PDFInfo
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- CN107492924B CN107492924B CN201710664381.7A CN201710664381A CN107492924B CN 107492924 B CN107492924 B CN 107492924B CN 201710664381 A CN201710664381 A CN 201710664381A CN 107492924 B CN107492924 B CN 107492924B
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- 238000006243 chemical reaction Methods 0.000 claims description 2
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
- H02J7/0014—Circuits for equalisation of charge between batteries
- H02J7/0016—Circuits for equalisation of charge between batteries using shunting, discharge or bypass circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/44—Methods for charging or discharging
- H01M10/441—Methods for charging or discharging for several batteries or cells simultaneously or sequentially
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
- H02J7/0014—Circuits for equalisation of charge between batteries
- H02J7/0019—Circuits for equalisation of charge between batteries using switched or multiplexed charge circuits
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/0036—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits using connection detecting circuits
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- H02J2007/0067—
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00304—Overcurrent protection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00306—Overdischarge protection
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Abstract
The invention discloses a battery equalization circuit and a control method, wherein the battery equalization circuit comprises a selection circuit and a battery discharging circuit, and the selection circuit receives battery voltage signals representing voltage difference between two ends of each battery and selects the maximum battery voltage signal from the battery voltage signals; and when the maximum voltage signal reaches a threshold voltage, the battery discharging circuit discharges the battery corresponding to the maximum voltage signal. The invention selects the battery with the largest voltage to discharge, and obviously reduces the heat productivity of the circuit, thereby improving the safety performance of the circuit and prolonging the service life of the battery.
Description
Technical Field
The invention relates to the technical field of power electronics, in particular to a battery equalization circuit and a control method.
Background
A battery pack comprises a plurality of batteries, and due to the fact that the actual production process is different among all single batteries, the voltage and the capacity of each battery can be different in the charging and discharging process of the battery pack. In the prior art, four batteries are taken as an example, each battery is connected in parallel with a series circuit, and each series circuit comprises a current source and a switch which are connected in series. The voltage of 4 batteries is sampled, 4 switching signals are output after the comparison circuit to control the on-off of each switch in each series circuit.
A schematic diagram of a selection circuit of a prior art battery equalization circuit is shown in fig. 1, the selection circuit comprising four comparators U101, U102, U103 and U104. And comparing the sampled four battery voltages with a set balanced starting threshold voltage Vref respectively, and outputting control signals V101, V102, V103 and V104 to control the on-off of a switch in a series circuit connected with the battery in parallel. When the voltage of a certain battery is larger than Vref, the corresponding comparator outputs high level to control the switch on the battery parallel circuit to be closed, and the battery discharges to the current source on the corresponding parallel circuit. When the battery voltage drops to the balanced starting threshold voltage Vref, the corresponding comparator outputs a low level to control the switch on the battery parallel circuit to be disconnected. Because the voltage on each battery is possibly larger than the balanced starting threshold voltage Vref at the same time, the battery balancing circuit can have the condition that a plurality of batteries discharge to the current sources on the corresponding parallel circuits at the same time, and the problems of high heat on the circuits, circuit safety, battery service life reduction and battery endurance mileage shortening are easily caused.
Disclosure of Invention
Therefore, the invention aims to provide a multi-battery equalization circuit and a control method, which are used for solving the problems of circuit safety, low battery service life and short battery endurance mileage in the prior art.
In order to achieve the above object, the present invention provides a battery equalization circuit comprising:
a selection circuit for receiving battery voltage signals representing voltage differences between two ends of each battery and selecting the maximum battery voltage signal from the battery voltage signals;
and the battery discharging circuit discharges the battery corresponding to the maximum battery voltage signal when the maximum battery voltage signal reaches the threshold voltage.
Optionally, the selection circuit includes a comparison circuit, where the comparison circuit includes one or more comparators, and the voltage on each battery is compared by the comparators to select the maximum battery voltage.
Optionally, the selection circuit compares the voltages of every two batteries to select a larger voltage, compares all the selected larger voltages with each other, and so on until the maximum battery voltage is selected.
Optionally, the selection circuit only needs one comparator, and the two ends of the comparator receive the battery voltage signals, and continuously switch the battery voltage signals input by the two ends of the comparator until the maximum battery voltage is selected.
Optionally, the selection circuit includes a differential amplifying circuit and an output circuit, the differential amplifying circuit and the output circuit are connected to form a negative feedback structure, one end of the differential amplifying circuit inputs a battery voltage signal, the other end inputs a voltage signal feedback-regulated by the output circuit, and the voltage signal feedback-regulated is a maximum battery voltage signal.
Optionally, the differential amplifying circuit includes a plurality of input tubes and a current mirror, the input tubes input battery voltage signals, and the output ends of the current mirror are connected with the plurality of input tubes;
optionally, the output circuit includes a plurality of output tubes and a current source, all output tubes are connected in parallel, a parallel end is connected to a load, the load can be a resistor or a current source, and a voltage of a common end of the parallel end and the current source is a maximum battery voltage.
Optionally, the voltage at the common connection end of the input tube inputting the maximum battery voltage and the current mirror is low level, the voltage at the common connection end of the input tube inputting the non-maximum battery voltage and the current mirror is high level, and the battery with the maximum voltage can be selected by judging the voltage at the common connection end of the input tube and the current mirror.
Optionally, the selection circuit includes a mirror circuit, an output circuit and a current source for converting the battery voltage, where the mirror circuit, the output circuit and the current source are connected to form a negative feedback structure.
Optionally, the mirror circuit includes a first mirror tube and a plurality of second mirror tubes, all mirror circuits share the first mirror tube, and the current source characterizes the corresponding battery voltage: after feedback adjustment, the current flowing through the first mirror tube is the maximum input current, and the maximum input current represents the maximum battery voltage.
Optionally, the current sources are connected with the output end of the mirror circuit, the voltage at the common connection end of the current source with the maximum battery voltage conversion and the mirror circuit is high level, the voltage at the common end of other current sources and the mirror circuit is low level, and the battery with the maximum voltage can be selected by judging the voltage at the common end of each current source and the mirror circuit.
Optionally, the battery discharging circuit includes a plurality of battery discharging modules, and each battery corresponds to one battery discharging module.
Optionally, the battery discharging module comprises a switch and a resistor or a switch and a current source, and the resistor or the current source is used for discharging the battery; when the maximum battery voltage reaches the threshold voltage, a switch in the battery discharging module corresponding to the maximum battery voltage is closed, and the battery corresponding to the maximum battery voltage is discharged.
The invention also provides a battery equalization control method, which comprises the following steps:
sampling the voltage of each battery and selecting the maximum voltage signal from the voltage signals; discharging a battery corresponding to the maximum voltage signal when the maximum voltage signal reaches a threshold voltage; the sampling mode for sampling the voltages at the two ends of each battery is periodic sampling or continuous sampling.
Compared with the prior art, the technical scheme of the invention has the following advantages: sampling the voltage of each battery and selecting the maximum voltage signal from the voltage signals; and discharging the battery corresponding to the maximum voltage signal when the maximum voltage signal reaches the threshold voltage. The battery equalization circuit can be integrated in a chip or built by discrete devices. The invention selects the battery with the largest voltage to discharge, and obviously reduces the heat productivity of the circuit, thereby improving the safety performance of the circuit and prolonging the service life of the battery.
Description of the drawings:
FIG. 1 is a schematic diagram of a selection circuit in a prior art battery equalization circuit;
FIG. 2 is a schematic circuit diagram of a battery equalization circuit according to the present invention;
FIG. 3 is a first schematic diagram of a selection circuit according to the present invention;
FIG. 4 is a second circuit schematic of the selection circuit of the present invention;
FIG. 5 is a third circuit schematic of the selection circuit of the present invention;
FIG. 6 is a fourth schematic diagram of a selection circuit according to the present invention;
Detailed Description
The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, but the present invention is not limited to these embodiments only. The invention is intended to cover any alternatives, modifications, equivalents, and variations that fall within the spirit and scope of the invention.
In the following description of preferred embodiments of the invention, specific details are set forth in order to provide a thorough understanding of the invention, and the invention will be fully understood to those skilled in the art without such details.
The invention is more particularly described by way of example in the following paragraphs with reference to the drawings. It should be noted that the drawings are in a simplified form and are not to scale precisely, but rather are merely intended to facilitate and clearly illustrate the embodiments of the present invention.
As shown in fig. 2, the circuit structure of the battery equalization circuit of the present invention is illustrated, and takes 4 batteries as an example, and includes a battery discharging circuit, a selecting circuit U01, a discharging switching tube S01, a charging switching tube S02, and a charger/load module U02. During normal charge and discharge, both S01 and S02 are conducted; when a charging fault such as battery overcharge or charging overcurrent occurs, S02 is turned off, and a charging loop from the charger U02 to the battery pack is cut off; when a discharge fault such as overdischarge or discharge overcurrent of the battery occurs, the switch-off of the S01 is performed, and a discharge loop of the battery pack to the load U02 is cut off. Pack +, pack-are the positive and negative poles of the charger/load, respectively. The battery discharging circuit includes 4 discharging modules, each of which includes a battery, a current source (or resistor), and a switch. Each battery is connected in parallel with a series circuit, and the series circuit consists of a current source and a switching tube. The voltage at two ends of each battery is sampled, the voltages on each battery are V1, V2, V3 and V4 respectively, and 4 switching signals are output to control the on-off of each switch in the series circuit after passing through the selection circuit U01.
The battery voltage sampling is periodic sampling or continuous sampling, and when the maximum battery voltage obtained by sampling reaches the threshold voltage, the battery corresponding to the maximum battery voltage discharges.
Referring to fig. 3, a first circuit configuration of the comparison circuit U01 of the present invention is illustrated, including four comparators U301, U302, U303, and U304. For example, V1 and V2 are selected by the comparator U301 as the maximum value of V1, V2, V3 and V4 are selected by the comparator U303 as the maximum value of V3 and V4, and the maximum value of V1 and V2 is compared with the maximum value of V3 and V4 to select the maximum value Vmax of V1, V2, V3 and V4. The maximum value Vmax is compared with a threshold voltage Vref by a comparator U304, and a comparison signal OUT is output. When the comparison signal OUT is at a high level, the switch on the battery parallel circuit with the largest voltage is closed, and the battery with the largest voltage is discharged through the current source.
Further, the two input signals of the comparator U301 may be voltages on any two batteries, assuming V1, V2, one input signal of the comparator U302 is a maximum value of V1, V2, the other input signal is assumed to be V3, one input signal of the comparator U303 is a maximum value of V1, V2, and V3, the other input signal is V4, one input signal of the comparator U304 is a maximum value of V1, V2, V3, V4, and the other input signal is a threshold signal.
Referring to fig. 4, a second circuit configuration of the selection circuit U01 of the present invention is illustrated, requiring only one comparator U401. The maximum of V1, V2, V3, V4 is obtained by switching the inputs with a comparator U401. Assuming that the comparator U401 has an in-phase input V1 and an inverted input V2, the maximum voltage of V1 and V2, such as V1, is selected according to the comparison result OUT. Comparator U401 is then switched to V1 at the non-inverting input and V3 at the inverting input, and the maximum voltage of V1, V2, V3, such as V3, is selected based on comparison OUT. The comparator U401 is then switched in phase to a maximum value V3 between V1 and V2 and V3, and the input V4 is inverted, and the maximum voltage of V1, V2, V3, V4, such as V4, is selected based on the comparison OUT. The comparator U401 is then switched in the normal phase to a maximum value V4 between V1 and V2 and V3 and V4, inverting the input threshold voltage Vref, and discharging the battery with the maximum voltage if the maximum battery voltage V4 reaches the threshold voltage Vref. The following formula is listed with reference to fig. 4:
u1＝Φ1+Φ2*OUT1+Φ3*OUT1*OUT2+Φ4*OUT1*OUT2*OUT3
the following description is made according to formula (1):
Φ1, Φ2, Φ3, Φ4, U1, U2, U3, U4 are switch control signals, OUT1, OUT2, OUT3 are output signals of the comparator U401, 1 and 0 respectively represent a high level and a low level, and when the switch control signals are high level, the corresponding switches are controlled to be closed, and otherwise, the corresponding switches are controlled to be opened. When Φ1=1, Φ2=Φ3=Φ4=0, u1=1, u2=u3=u4=0, the comparator U401 has a non-inverting input terminal V1, an inverting input terminal V2, and the output OUT1 is latched at the end time of Φ1, when V1 < V2, OUT 1=0, otherwise OUT 1=1; when the switching comparator U401 inputs a signal, Φ2=1, Φ1=Φ3=Φ4=0, if the comparison result OUT 1=1 at Φ1, u1=1, u2=u3=u4=0, the positive phase input terminal V1 and the negative phase input terminal V3 of the comparator 401; assuming that the comparison result OUT1 = 0 at Φ1, u2 = 1, u1 = u3 = u4 = 0, the comparator U401 has a positive input terminal V2 and a negative input terminal V3. To sum up, Φ2 is the maximum value of V1 and V2 compared with V3. Similarly, Φ3 compares the maximum value of V1, V2, and V3 with V4; at Φ4, the maximum value of V1, V2, V3, and V4 is compared with the threshold voltage Vref, and if the maximum battery voltage reaches the threshold voltage Vref, the battery with the maximum voltage is discharged.
Referring to fig. 5, a third circuit configuration of the selection circuit of the present invention is illustrated, including a differential amplification circuit, an output circuit, and a comparator U601. The differential amplifying circuit comprises a current mirror, an input tube and a current source I601. The current mirror comprises a reference tube S605 and mirror image tubes S601, S602, S603 and S604; the input pipes S606 and S610, S607 and S610, S608 and S610, S609 and S610 respectively form 4 pairs of input pipes, and the 4 pairs of input pipes share one input pipe S610. The output circuit comprises a current source I602 and output pipes S611, S612, S613 and S614. In the above description, the PMOS transistors are exemplified by S601, S602, S603, S604, S611, S612, S613, S614, and the NMOS transistors are exemplified by S606, S607, S608, S609, S610.
The differential circuit and the output circuit are connected to form a unit gain negative feedback structure, and the unit gain negative feedback structure is specifically as follows: and all mirror image tubes and reference tubes in the current mirror share a common source and a common grid, and the grid is connected with the drain electrode of the reference tube S605. The 4 pairs of input tubes share a source, the source is connected with a current source I601, the gates of the input tubes S606, S607, S608 and S609 are respectively connected with 4 battery voltage signals, the drains are respectively connected with the output ends of the current mirror, namely the drains of mirror image tubes S601, S602, S603 and S604, the voltages at the nodes are VO1, VO2, VO3 and VO4 respectively, and the drain of the input tube S610 is connected with the drain of a reference tube S605. The 4 output tubes of the output circuit are connected in parallel, and the parallel end is connected with a load, wherein the load can be a resistor or a current source, and the load is exemplified by a current source I602. The parallel terminal is also connected to the gate of the switching tube S610, and the voltage at the common node is Vm. The comparator U610 has a non-inverting input terminal connected to the voltage Vm, an inverting input terminal connected to the threshold voltage Vref, and an output terminal outputting an OUT signal.
Assuming that the voltage Vm at the node is greater than the maximum battery voltage, the reference current and the mirror current are very large, the gates of the 4 PMOS transistors of the output circuit are pulled up, the 4 PMOS transistors are turned off, and no current is allowed to exist in the circuit, so that the voltage Vm at the node cannot be greater than the maximum battery voltage. Assuming that the voltage V1 > Vm > V2 > V3 > V4 on 4 batteries, as the mirror current follows the reference current, the gate of the PMOS tube S611 is pulled down, the PMOS tube S611 is turned on, the gates of the PMOS tubes S612, S613 and S614 are pulled up, and the PMOS tubes S612, S613 and S614 are turned off. Along with the increase of the pull-down driving current of the grid electrode of the PMOS tube S611, the voltage Vm at the node rises, and when Vm rises to V1, the circuit is stabilized. The voltage VO1 at the node is low, and the voltages VO2, VO3, and VO4 are high, so that the battery corresponding to the maximum battery voltage V1 can be selected by detecting the magnitudes of the voltages VO1, VO2, VO3, and VO 4. The voltage Vm at the node of the selection circuit can finally reach the maximum battery voltage, the maximum battery voltage Vm is compared with the threshold voltage Vref, and when Vm reaches the threshold voltage Vref, the battery with the maximum voltage discharges.
Referring to FIG. 6, a fourth circuit configuration of the selection circuit of the present invention is illustrated, comprising a mirror circuit, an output circuit, a current source, a current mirror U701, a resistor R2 comparator U702, the mirror circuit comprises a first mirror tube S705, a second mirror tube S701, S702, S703, S704 and a resistor R1, the output circuit comprises a plurality of output tubes S706, S707, S708, S709, the current source comprises I701, I702, I703, I704, and the battery voltages V1, V2, V3, V4 and I are respectively represented 1～4 ＝V 1～4 R2. The first mirror tube, the second mirror tube and the output tube are all exemplified by NMOS tubes.
The mirror circuit, the output circuit and the current source are connected to form a negative feedback structure, and the specific connection mode is as follows: the first mirror tube and the second mirror tube of the mirror circuit have common grid common source, the common source is grounded, the common grid is grounded after being connected with a resistor R1, the voltage at the node of the common grid is Vm l, the current flowing through the first mirror tube S705 is denoted as Im, the drain electrode of the first mirror tube S705 is connected with the input end of a current mirror U701, the output end of the current mirror U701 is connected with one end of a resistor R2, and the voltage at the common node is denoted as Vm. Drains of the second mirror image tubes S701, S702, S703, S704 are connected to one ends of the current sources I701, I702, I703, I704 and gates of the output tubes S706, S707, S708, S709, respectively, and voltages at common nodes thereof are VP1, VP2, VP3, VP4, respectively. Output pipes S706, S707, S708 and S709 share a source and a drain, wherein the common source is connected with a common grid of the mirror circuit, and the common drain is connected with a power supply VDD. The comparator U702 has a non-inverting input terminal connected to the voltage Vm, an inverting input terminal connected to the threshold voltage Vref, and an output terminal outputting the signal OUT.
Assuming that the current Im > I701 > I702 > I703 > I704 flowing through the first mirror tube S705, the leakage current on each second mirror tube is greater than I701, I702, I703 and I704, respectively, the gates of the output tubes S706, S707, S708, S709 are pulled down, and the output tubes S706, S707, S708, S709 are turned off, which is not allowed. Assuming that the current I701 > Im > I702 > I703 > I704, the gate of the output tube S706 is pulled up, the gates of the output tubes S707, S708, S709 are pulled down, the output tube S706 is turned on, the output tubes S707, S708, S709 are turned off, as the pull-up driving current of the gate of the output tube S706 increases, the voltage Vml increases, the current Im flowing through the first mirror tube S705 increases until the circuit reaches a steady state, at this time, the current Im is equal to the current source I701, i.e. the output current of the current mirror U701 is equal to the current source I701, and the voltage Vm at the node is equal to the maximum battery voltage. The voltage VP1 at the node is high, and VP2, VP3, and VP4 are low, so that the battery with the maximum voltage corresponding to the maximum current source I701 can be selected by detecting the magnitudes of the voltages VP1, VP2, VP3, and VP4. Vm is compared with the threshold voltage Vref, and when Vm reaches the threshold voltage Vref, the battery having the largest voltage is discharged.
Although the embodiments have been described and illustrated separately above, and with respect to a partially common technique, it will be apparent to those skilled in the art that alternate and integration may be made between embodiments, with reference to one embodiment not explicitly described, and reference may be made to another embodiment described.
The above-described embodiments do not limit the scope of the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the above embodiments should be included in the scope of the present invention.
Claims (7)
1. A battery equalization circuit, comprising:
a selection circuit for receiving battery voltage signals representing voltage differences between two ends of each battery and selecting the maximum battery voltage signal from the battery voltage signals;
the battery discharging circuit discharges a battery corresponding to the maximum battery voltage signal when the maximum battery voltage signal reaches a threshold voltage;
the selection circuit comprises a differential amplification circuit and an output circuit, wherein the differential amplification circuit and the output circuit are connected to form a negative feedback structure, one end of the differential amplification circuit is input with a battery voltage signal, the other end of the differential amplification circuit is input with a voltage signal which is subjected to feedback adjustment through the output circuit, and the voltage signal subjected to feedback adjustment is a maximum battery voltage signal.
2. The battery equalization circuit of claim 1, wherein: the differential amplifying circuit comprises a plurality of input tubes and a current mirror, wherein the input tubes are used for inputting battery voltage signals, and the output ends of the current mirror are connected with the plurality of input tubes.
3. The battery equalization circuit of claim 2, wherein: the output circuit comprises a plurality of output pipes and a current source, all the output pipes are connected in parallel, one end of the parallel end of the output pipe is connected with a load, the load can be a resistor or the current source, and the voltage of the common end of the parallel end and the current source is the maximum battery voltage.
4. The battery equalization circuit of claim 2, wherein: the voltage at the common connection end of the input tube for inputting the maximum battery voltage and the current mirror is low level, the voltage at the common connection end of the input tube for inputting the non-maximum battery voltage and the current mirror is high level, and the battery with the maximum voltage can be selected by judging the voltage at the common connection end of the input tube and the current mirror.
5. A battery equalization circuit, comprising:
a selection circuit for receiving battery voltage signals representing voltage differences between two ends of each battery and selecting the maximum battery voltage signal from the battery voltage signals;
the battery discharging circuit discharges a battery corresponding to the maximum battery voltage signal when the maximum battery voltage signal reaches a threshold voltage;
the selection circuit comprises a mirror circuit, an output circuit and a current source for converting battery voltage, wherein the mirror circuit, the output circuit and the current source are connected to form a negative feedback structure.
6. The battery equalization circuit of claim 5, wherein: the mirror circuit comprises a first mirror tube and a plurality of second mirror tubes, all the mirror circuits share the first mirror tube, and the current source represents corresponding battery voltage; after feedback adjustment, the current flowing through the first mirror tube is the maximum input current, and the maximum input current represents the maximum battery voltage.
7. The battery equalization circuit of claim 5, wherein: the current sources are connected with the output end of the mirror image circuit, the voltage at the common connection end of the current source with the maximum battery voltage conversion is high level, the voltage at the common end of other current sources and the mirror image circuit is low level, and the battery with the maximum voltage can be selected by judging the voltage at the common end of each current source and the mirror image circuit.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02294114A (en) * | 1989-05-08 | 1990-12-05 | Mitsubishi Electric Corp | Selection circuit for maximum value or minimum value |
| US6586917B1 (en) * | 2001-10-19 | 2003-07-01 | National Semiconductor Corporation | Battery charger shunt regulator with dual feedback control |
| CN101989847A (en) * | 2009-07-29 | 2011-03-23 | 联咏科技股份有限公司 | Numerical value judging device |
| CN102640382A (en) * | 2010-03-24 | 2012-08-15 | 株式会社杰士汤浅国际 | Secondary battery system |
| CN207117240U (en) * | 2017-08-04 | 2018-03-16 | 杰华特微电子（杭州）有限公司 | Battery equalizing circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI479293B (en) * | 2012-06-06 | 2015-04-01 | Mult-channel constant voltage and constant current converting controler and apparatus |
-
2017
- 2017-08-04 CN CN201710664381.7A patent/CN107492924B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02294114A (en) * | 1989-05-08 | 1990-12-05 | Mitsubishi Electric Corp | Selection circuit for maximum value or minimum value |
| US6586917B1 (en) * | 2001-10-19 | 2003-07-01 | National Semiconductor Corporation | Battery charger shunt regulator with dual feedback control |
| CN101989847A (en) * | 2009-07-29 | 2011-03-23 | 联咏科技股份有限公司 | Numerical value judging device |
| CN102640382A (en) * | 2010-03-24 | 2012-08-15 | 株式会社杰士汤浅国际 | Secondary battery system |
| CN207117240U (en) * | 2017-08-04 | 2018-03-16 | 杰华特微电子（杭州）有限公司 | Battery equalizing circuit |
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| CN107492924A (en) | 2017-12-19 |
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