CN107484345A - A kind of PCB layout method for the impedance matching for improving differential signal line - Google Patents
A kind of PCB layout method for the impedance matching for improving differential signal line Download PDFInfo
- Publication number
- CN107484345A CN107484345A CN201710860939.9A CN201710860939A CN107484345A CN 107484345 A CN107484345 A CN 107484345A CN 201710860939 A CN201710860939 A CN 201710860939A CN 107484345 A CN107484345 A CN 107484345A
- Authority
- CN
- China
- Prior art keywords
- signal line
- signal wire
- radian
- impedance matching
- differential signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0002—Apparatus or processes for manufacturing printed circuits for manufacturing artworks for printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0228—Compensation of cross-talk by a mutually correlated lay-out of printed circuit traces, e.g. for compensation of cross-talk in mounted connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0776—Resistance and impedance
- H05K2201/0784—Uniform resistance, i.e. equalizing the resistance of a number of conductors
Abstract
The invention discloses a kind of PCB layout method for improving differential signal line impedance matching, including：Judge differential signal line from pin stretch out when, whether the first signal wire and secondary signal line in differential signal line are symmetrical；If it is, by the first signal wire and secondary signal coiling even number radian in the way of synchronous coiling.This method can walk line length this feature using outer arc cabling than inner arc, the radian of first signal wire and secondary signal line is arranged to even number, so that the first signal wire and secondary signal line are identical with the number of inner arc as outer arc, so as to effectively reduce due to a certain signal wire caused by odd number radian as outer arc often and line length is more than the possibility of another signal wire；Further, since being synchronous coiling, therefore it can ensure that the first signal wire and secondary signal line keep equidistant, in summary, this method can improve the impedance matching of differential signal line.
Description
Technical field
The present invention relates to pcb board routing field, more particularly to a kind of PCB layout for improving differential signal line impedance matching
Method.
Background technology
The application of differential signal (Differential Signal) in High-speed Board Design is more and more extensive, in circuit
The signal of most critical will often use differential configuration to design.Differential signal is compared with common single-ended signal cabling, most substantially
Advantage be embodied in it is following three aspect：A. strong antijamming capability, b. can effectively suppress EMI, c. sequential registrations.
For PCB engineer, it is to be ensured that can be played completely in actual cabling these advantages of difference cabling it is necessary to
Accomplish " isometric, equidistant ".Isometric is to ensure that two differential signal moment keep opposite polarity, reduce common mode component；Equidistantly
Then primarily to ensureing that both differential impedances are consistent, reflection is reduced.Equidistantly it can typically meet, but because part respectively draws
The difference of pin distribution and cabling turning can all cause two signal line lengths of differential signal line different, be asked to solve this
Topic, in the prior art, the first signal wire and the isometric purpose of secondary signal line can be met using the method for the single starting the arc.
Fig. 1 is a kind of PCB layout schematic diagram for elimination differential signal line Length discrepancy that prior art provides.As shown in figure 1,
The drawbacks of so doing is not accomplished equidistantly in many places between much place the first signal wire N and secondary signal line P,
The reflection of signal can thus be caused, cause differential signal quality bad.
As can be seen here, how to improve the impedance matching of differential signal line is those skilled in the art's urgent problem to be solved.
The content of the invention
It is an object of the invention to provide a kind of PCB layout method for improving differential signal line impedance matching, for improving difference
The impedance matching of sub-signal line.
In order to solve the above technical problems, the present invention provides a kind of PCB layout method for improving differential signal line impedance matching,
Including：
Judge differential signal line from pin stretch out when, the first signal wire and secondary signal line in the differential signal line are
No is symmetrical；
If it is, by first signal wire and the secondary signal coiling even number arc in the way of synchronous coiling
Degree.
Preferably, if it is not, then first signal wire and the secondary signal line are in the core where the pin
Length in piece；
If the length of first signal wire is more than the length of the secondary signal line, according to described same
First signal wire is wound on the inner arc side of the radian by step winding method, and the secondary signal line is wound on into the arc
The outer arc side of degree；
If the length of first signal wire is less than the length of the secondary signal line, according to described same
First signal wire is wound on the outer arc side of the radian by step winding method, and the secondary signal line is wound on into the arc
The inner arc side of degree.
Preferably, 4 times of the spacing of first signal wire and other signal wires more than the line width of first signal wire.
Preferably, 4 times of the spacing of the secondary signal line and other signal wires more than the line width of the secondary signal line.
Preferably, first signal wire and the secondary signal line are smaller than default spacing.
Preferably, the angle all same of the radian.
Preferably, the angle of the radian is 180 degree or 90 degree.
Preferably, in addition to：Record the physical length of first signal wire and the physical length of the secondary signal line.
The PCB layout method provided by the present invention for improving differential signal line impedance matching, including：Judge differential signal line
When being stretched out from pin, whether the first signal wire and secondary signal line in differential signal line are symmetrical；If it is, according to synchronization
The mode of coiling is by the first signal wire and secondary signal coiling even number radian.This method can be than inner arc cabling using outer arc cabling
This long feature, even number is arranged to by the radian of the first signal wire and secondary signal line so that the first signal wire and the second letter
Number line is identical with the number of inner arc as outer arc, so as to effectively reduce due to a certain signal wire conduct caused by odd number radian
Outer arc often and line length be more than another signal wire possibility；Further, since being synchronous coiling, therefore the first letter can be ensured
Number line and secondary signal line keep equidistant, and in summary, this method can improve the impedance matching of differential signal line.
Brief description of the drawings
In order to illustrate the embodiments of the present invention more clearly, the required accompanying drawing used in embodiment will be done simply below
Introduce, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for ordinary skill people
For member, on the premise of not paying creative work, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is a kind of PCB layout schematic diagram for elimination differential signal line Length discrepancy that prior art provides；
Fig. 2 is a kind of PCB layout flow chart of differential signal line provided in an embodiment of the present invention；
Fig. 3 is a kind of PCB layout schematic diagram of differential signal line provided in an embodiment of the present invention；
Fig. 4 is the PCB layout schematic diagram of another differential signal line provided in an embodiment of the present invention；
Fig. 5 is the PCB layout flow chart of another differential signal line provided in an embodiment of the present invention；
Fig. 6 is the PCB layout schematic diagram of another differential signal line provided in an embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.Based on this
Embodiment in invention, for those of ordinary skill in the art under the premise of creative work is not made, what is obtained is every other
Embodiment, belong to the scope of the present invention.
The core of the present invention is to provide a kind of PCB layout method for improving differential signal line impedance matching, for improving difference
The impedance matching of sub-signal line.
In order that those skilled in the art more fully understand the present invention program, with reference to the accompanying drawings and detailed description
The present invention is described in further detail.
Fig. 2 is a kind of PCB layout flow chart of differential signal line provided in an embodiment of the present invention.As shown in Fig. 2 including：
S10：Judge differential signal line from pin stretch out when, the first signal wire and secondary signal line in differential signal line are
No is symmetrical, if it is, into S11.
S11：If it is, by the first signal wire and secondary signal coiling even number radian in the way of synchronous coiling.
It should be noted that the synchronous coiling that the present invention is previously mentioned refers to that the spacing of the first signal wire and secondary signal line is protected
Hold identical, i.e. the angle of coiling is identical.In addition, the size of radian is not construed as limiting, can be whole identical or portions
Split-phase is same.
It is understood that whether the first signal wire and secondary signal line that the present invention is previously mentioned symmetrically refer to the two letters
Number connected mode of line in the chips is identical.Fig. 3 is a kind of PCB layout of differential signal line provided in an embodiment of the present invention
Schematic diagram.As shown in figure 3, the first signal wire N and secondary signal line P are symmetrical., will in that case, it is necessary to during coiling
First signal wire N and secondary signal line P coiling even number radians.Fig. 3 kinds include 4 radians, are radian 1, radian 2, arc respectively
Degree 3 and radian 4, wherein, radian 1 is 90 degree, and radian 2-4 is 180 degree.
For the first signal wire N, it is 90 degree fewer than secondary signal line P as outer arc, but relative to existing skill
In art for the mode of the individual signals line starting the arc, the manner can ensure that the first signal wire N and secondary signal line P keeps equidistant.
Further, since the length of outer arc is more than the length of inner arc, using scheme provided by the present invention, then radian is even number, therefore
First signal wire N and secondary signal line P is identical as the number of outer arc, or as the number of inner arc is identical, because
This, can alleviate due to the problem of the first signal wire N and secondary signal line P length difference are larger caused by odd number radian.
By calculating, with the wire laying mode shown in Fig. 3, secondary signal line P length is longer than the first signal wire N length
19.05mil.Preferably embodiment, in addition to：
Record the physical length of the first signal wire and the physical length of secondary signal line.
Preferably embodiment, the angle all same of radian.
Fig. 4 is the PCB layout schematic diagram of another differential signal line provided in an embodiment of the present invention.As shown in figure 3, comprising
4 radians, it is radian 5, radian 6, radian 7 and radian 8 respectively, and each radian is identical, is 180 degree.
It is understood that because the first signal wire N and secondary signal line P as the number of outer arc is identical, and arc
Degree and identical, therefore, the first signal wire N and secondary signal line P's can not only be isometric and can be equidistant.Therefore, it is
Guarantee isometric and equidistant purpose, the distance of target pin and initial pin can be precalculated, arc is calculated according to the distance
The size of the number of degree and each radian so that the first signal wire and secondary signal line it is isometric.
Preferably embodiment, the angle of radian is 180 degree or 90 degree.
It is understood that the angle of radian can arbitrarily be chosen, the present embodiment is a kind of concrete application scene.Separately
Outside, the angle of radian can ensure to complete wiring with minimum radian quantity as far as possible depending on actual PCB facilities.
The PCB layout method for the raising differential signal line impedance matching that the present embodiment provides, in the first signal wire and second
When signal wire is symmetrical, line length this feature can be walked than inner arc using outer arc cabling, by the first signal wire and the arc of secondary signal line
Degree is arranged to even number so that the first signal wire and secondary signal line are identical with the number of inner arc as outer arc, so as to effectively drop
It is low due to a certain signal wire caused by odd number radian as outer arc often and line length is more than the possibility of another signal wire；
Further, since being synchronous coiling, therefore it can ensure that the first signal wire and secondary signal line keep equidistant, in summary, we
Method can improve the impedance matching of differential signal line.
On the basis of above-described embodiment, if step S10 judged result is no, compare the first signal wire and the second letter
Number length of the line in the chip where pin.
Fig. 5 is the PCB layout flow chart of another differential signal line provided in an embodiment of the present invention.As shown in figure 5, except
Outside S10 and S11, in addition to S12
S12：Judge whether the first signal wire is more than length of the secondary signal line in the chip where pin, if it is,
Then enter S13, otherwise into S14.
S13：First signal wire is wound on to the inner arc side of radian according to synchronous winding method, secondary signal line is wound on
The outer arc side of radian.
S14：First signal wire is wound on to the outer arc side of radian according to synchronous winding method, secondary signal line is wound on
The inner arc side of radian.
Fig. 6 is the PCB layout schematic diagram of another differential signal line provided in an embodiment of the present invention.As shown in fig. 6, due to
First signal wire N and secondary signal line P is asymmetric, and length of the first signal wire N in chip is less than secondary signal line P's
Length, it is therefore desirable in coiling, the first signal wire N is wound on to the outer arc side of radian 9, secondary signal line P is wound on arc
The inner arc side of degree 9.The characteristics of being more than the cabling of inner arc using the cabling of outer arc, compensate the first signal wire N.
The spacing of preferably embodiment, the first signal wire N and other signal wires is more than the line width of the first signal wire
4 times.The spacing of secondary signal line P and other signal wires is more than 4 times of the line width of secondary signal line.
In order to reach more preferable effect, the spacing of increase and other signals cabling is one of most basic approach, electromagnetic field
Energy apart from square with successively decreasing, and when general line spacing is more than 4 times of line widths, the interference between them is just extremely micro-
It is weak, it can ignore substantially.In addition, good shielding action can also be played by the isolation of ground level.
Preferably embodiment, the first signal wire N and secondary signal line P's is smaller than default spacing.
In specific implementation, differential signal line can both be improved to noise close to being for their coupling of enhancing
Immunity, moreover it is possible to make full use of the opposite polarity in magnetic field to offset the electromagnetic interference to the external world.
Detailed Jie has been carried out to the PCB layout method of raising differential signal line impedance matching provided by the present invention above
Continue.Each embodiment is described by the way of progressive in specification, and what each embodiment stressed is and other embodiment
Difference, between each embodiment identical similar portion mutually referring to.For device disclosed in embodiment, by
Corresponded to the method disclosed in Example in it, so description is fairly simple, related part is referring to method part illustration.
It should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention, can also be right
The present invention carries out some improvement and modification, and these are improved and modification is also fallen into the protection domain of the claims in the present invention.
It should also be noted that, in this manual, such as first and second or the like relational terms be used merely to by
One entity or operation make a distinction with another entity or operation, and not necessarily require or imply these entities or operation
Between any this actual relation or order be present.Moreover, term " comprising ", "comprising" or its any other variant meaning
Covering including for nonexcludability, so that process, method, article or equipment including a series of elements not only include that
A little key elements, but also the other element including being not expressly set out, or also include for this process, method, article or
The intrinsic key element of equipment.In the absence of more restrictions, the key element limited by sentence "including a ...", is not arranged
Except other identical element in the process including the key element, method, article or equipment being also present.
Claims (8)
- A kind of 1. PCB layout method for improving differential signal line impedance matching, it is characterised in that including：Judge differential signal line from pin stretch out when, the first signal wire and secondary signal line in the differential signal line whether be Symmetrically；If it is, by first signal wire and the secondary signal coiling even number radian in the way of synchronous coiling.
- 2. the PCB layout method according to claim 1 for improving differential signal line impedance matching, it is characterised in that if It is no, then the length of first signal wire and the secondary signal line in the chip where the pin；If the length of first signal wire be more than the secondary signal line the length, according to the synchronization around First signal wire is wound on the inner arc side of the radian by mode processed, and the secondary signal line is wound on into the radian Outer arc side；If the length of first signal wire be less than the secondary signal line the length, according to the synchronization around First signal wire is wound on the outer arc side of the radian by mode processed, and the secondary signal line is wound on into the radian Inner arc side.
- 3. the PCB layout method according to claim 1 for improving differential signal line impedance matching, it is characterised in that described The spacing of first signal wire and other signal wires is more than 4 times of the line width of first signal wire.
- 4. the PCB layout method according to claim 1 for improving differential signal line impedance matching, it is characterised in that described The spacing of secondary signal line and other signal wires is more than 4 times of the line width of the secondary signal line.
- 5. the PCB layout method according to claim 1 for improving differential signal line impedance matching, it is characterised in that described First signal wire and the secondary signal line are smaller than default spacing.
- 6. the PCB layout method according to claim 1 for improving differential signal line impedance matching, it is characterised in that described The angle all same of radian.
- 7. the PCB layout method according to claim 1 for improving differential signal line impedance matching, it is characterised in that described The angle of radian is 180 degree or 90 degree.
- 8. the PCB layout method of the raising differential signal line impedance matching according to claim 1-7 any one, its feature It is, in addition to：Record the physical length of first signal wire and the physical length of the secondary signal line.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710860939.9A CN107484345A (en) | 2017-09-21 | 2017-09-21 | A kind of PCB layout method for the impedance matching for improving differential signal line |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710860939.9A CN107484345A (en) | 2017-09-21 | 2017-09-21 | A kind of PCB layout method for the impedance matching for improving differential signal line |
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| Publication Number | Publication Date |
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| CN107484345A true CN107484345A (en) | 2017-12-15 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710860939.9A Pending CN107484345A (en) | 2017-09-21 | 2017-09-21 | A kind of PCB layout method for the impedance matching for improving differential signal line |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109548268A (en) * | 2018-11-01 | 2019-03-29 | 郑州云海信息技术有限公司 | A kind of PCB impedance adjustment, control system and a kind of PCB layout plate |
| CN113011123A (en) * | 2021-02-19 | 2021-06-22 | 山东英信计算机技术有限公司 | Method, system and device for compensating length of differential signal line |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5818308A (en) * | 1995-11-16 | 1998-10-06 | Murata Manufacturing Co., Ltd. | Coupled line element |
| CN101925252A (en) * | 2010-08-05 | 2010-12-22 | 浪潮电子信息产业股份有限公司 | Wiring method for improving signal quality |
| US20130015925A1 (en) * | 2011-07-14 | 2013-01-17 | Chung Yuan Christian University | Delay line structure |
| US20130037315A1 (en) * | 2011-08-09 | 2013-02-14 | Chung Yuan Christian University | Delay line structure |
-
2017
- 2017-09-21 CN CN201710860939.9A patent/CN107484345A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5818308A (en) * | 1995-11-16 | 1998-10-06 | Murata Manufacturing Co., Ltd. | Coupled line element |
| CN101925252A (en) * | 2010-08-05 | 2010-12-22 | 浪潮电子信息产业股份有限公司 | Wiring method for improving signal quality |
| US20130015925A1 (en) * | 2011-07-14 | 2013-01-17 | Chung Yuan Christian University | Delay line structure |
| US20130037315A1 (en) * | 2011-08-09 | 2013-02-14 | Chung Yuan Christian University | Delay line structure |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109548268A (en) * | 2018-11-01 | 2019-03-29 | 郑州云海信息技术有限公司 | A kind of PCB impedance adjustment, control system and a kind of PCB layout plate |
| CN113011123A (en) * | 2021-02-19 | 2021-06-22 | 山东英信计算机技术有限公司 | Method, system and device for compensating length of differential signal line |
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Application publication date: 20171215 |