CN107481755A - A kind of bit structure of polymorphic magnetic storage - Google Patents
A kind of bit structure of polymorphic magnetic storage Download PDFInfo
- Publication number
- CN107481755A CN107481755A CN201610419994.XA CN201610419994A CN107481755A CN 107481755 A CN107481755 A CN 107481755A CN 201610419994 A CN201610419994 A CN 201610419994A CN 107481755 A CN107481755 A CN 107481755A
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- Prior art keywords
- magnetic
- polymorphic
- bit structure
- magnetic storage
- bit
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
Abstract
The present invention relates to a kind of bit structure of polymorphic magnetic storage, the bit structure of the memory includes polymorphic magnetic tunnel junction memory cell array, the on-off circuit being made up of wordline, bit line and switching device.The bit structure of the polymorphic magnetic storage have the advantages that the reading speed of magnetic RAM (MRAM) it is fast, can erasable infinitely, energy consumption be low and Flouride-resistani acid phesphatase；It is safe meanwhile the polymorphic magnetic storage only could realize reprogram under the auxiliary of magnetic field, it can be used as the multiple programmable memory of preferable high security；Meanwhile the magnetic tunnel junction memory unit of the polymorphic magnetic storage has multiple resistance states, the information of 3 or 4 bits can be recorded inside a memory cell, the density of data storage is effectively improved, reduces chip area.The memory bit can be used for needing microprocessor and digital circuit of the characteristics such as safe, reading speed is fast, energy consumption is low, Flouride-resistani acid phesphatase, anti-adverse environment etc..
Description
Technical field
The present invention relates to nonvolatile memory and semiconductor applications, more particularly to a kind of bit of polymorphic magnetic storage
Structure.
Background technology
Current magnetic storage bit is more using the 1T1R of triode one MTJ (MTJ) resistance of series connection
Structure, in order to ensure to provide sufficiently large reset current and device reliability for MTJ, the size of triode generally can not be done too
Small, therefore, the storage density of magnetic storage is limited to provide the size of the triode of reset current for MTJ.
The content of the invention
The present invention to overcome above-mentioned weak point, and it is an object of the present invention to provide a kind of bit structure of polymorphic magnetic storage,
Effectively lift the information storage density of magnetic storage.Principle of the invention based on magnetic RAM, it is proposed that
Using bit of the MTJ as the polymorphic magnetic storage of information memory cell, the magnetic storage bit has MRAM
Reading speed it is fast, can erasable infinitely, energy consumption is low and the advantages that Flouride-resistani acid phesphatase, and multiple bits can be stored in a bit
Information.
The present invention is to reach above-mentioned purpose by the following technical programs：A kind of bit structure of polymorphic magnetic storage, bag
Include：Polymorphic magnetic tunnel junction memory cell array, on-off circuit；On-off circuit connects with polymorphic magnetic tunnel junction memory cell array
Connect, control it.
Preferably, the polymorphic magnetic tunnel junction memory unit has multiple resistance states, by two MTJs
Serial or parallel connection combination is formed, and one of magnetic tunnel becomes bottom pinning, and another is top pinning, two magnetic tunnels
The pinning direction of knot is identical.
Preferably, the thin magnetic film of the MTJ is magnetic anisotropy or perpendicular magnetic anisotropic in plane
Any one.
Preferably, the magnetic tunnel becomes arbitrary shape；Preferably, in plane magnetic anisotropy magnetic tunnel
Become ellipse in road；The magnetic tunnel of perpendicular magnetic anisotropic becomes circle.
Preferably, the MTJ is made up of pinning layer thin magnetic film, free layer thin magnetic film, insulating interlayer,
Insulating interlayer is clipped between pinning layer thin magnetic film, free layer thin magnetic film；The direction of magnetization of pinning layer thin magnetic film is fixed；From
External magnetic field is depended on by the magnetization orientation of layer thin magnetic film and spin polarized current acts on, for producing different resistance states.
Preferably, the constituent of the pinning layer thin magnetic film, free layer thin magnetic film is times of iron, cobalt, boron, nickel
Meaning is a kind of or combines；The constituent of the insulating interlayer is any one of aluminum oxide, magnesia or combined.
Preferably, the mode that is connected in series of described two MTJs is to share a direct stacking of pinning layer to be formed
Multilayer film, pass through any one in wire realization interconnection, shared electrode realization interconnection.
Preferably, the parallel of described two magnetic tunnel-junctions be share a direct stacking of pinning layer formed it is more
Tunic and then any one that interconnection, shared electrode realization interconnection are realized by wire.
Preferably, described on-off circuit include wordline, bit line, switching device, switching device respectively with wordline, bit line
Connection；Described switching device is any one in diode selecting device, CMOS transistor.
Preferably, absolute resistance of the polymorphic magnetic tunnel junction memory unit by two MTJs of control
Value obtains multiple resistance states with tunneling resistance ratio；The absolute resistance value of two of which MTJ and tunneling resistance ratio
Value can be identical or different.
Preferably, the electric current that described on-off circuit can be provided is much smaller than and compiled based on spin transfer torque principle
Cheng Suoxu electric currents；On-off circuit provide size of current by reduce supply voltage, reduce supply current, using current-limiting circuit,
Transistor width is reduced to be regulated and controled.
The beneficial effects of the present invention are：1) present invention uses MTJ (MTJ) as the more of information memory cell
State magnetic storage bit, have the advantages that MRAM reading speed is fast, can erasable infinitely, energy consumption is low and Flouride-resistani acid phesphatase, be to manage
The high performance magnetic memory thought；2) the magnetic tunnel junction memory unit of the polymorphic magnetic storage bit has multiple resistance shapes
State, the information of 3 or 4 bits can be recorded inside a memory cell, is effectively improved the density of data storage, reduced
Chip area.
Brief description of the drawings
Fig. 1 is a kind of position of polymorphic magnetic storage according to embodiments of the present invention using diode selecting device as switch
The schematic diagram of meta structure；
Fig. 2 is a kind of bit of polymorphic magnetic storage according to embodiments of the present invention using CMOS transistor as switch
The schematic diagram of structure；
Fig. 3 is a kind of structural representation of polymorphic magnetic tunnel junction memory unit according to embodiments of the present invention；
Fig. 4 is the structural representation of another polymorphic magnetic tunnel junction memory unit according to embodiments of the present invention；
Fig. 5 is the structural representation of the third polymorphic magnetic tunnel junction memory unit according to embodiments of the present invention；
Fig. 6 is the structural representation of the 4th kind of polymorphic magnetic tunnel junction memory unit according to embodiments of the present invention.
Embodiment
With reference to specific embodiment, the present invention is described further, but protection scope of the present invention is not limited in
This：
Embodiment 1：Fig. 1 reference is：Wordline WL, bit line BL, MTJ MTJ, switch are diode；Fig. 2
Reference be：Wordline WL, bit line BL, MTJ MTJ, switch are CMOS transistor；Fig. 3 to Fig. 6 reference
For：Free magnetic layer FL (Free Layer), pinned magnetic PL (Pinned Layer), insulating barrier IL (Insulating
Layer), MTJ MTJ.
In the present embodiment, the bit structure of polymorphic magnetic storage is as shown in figure 1, including wordline WL, bit line BL, magnetic tunnel
The polymorphic magnetic memory cell of road knot 1MTJ1 and MTJ 2MTJ2 composition, the memory cell selecting being made up of diode are opened
Close.Memory cell selecting switch can also use CMOS transistor, as shown in Figure 2.Both the above structure can optional one.
Wherein, MTJ1 and MTJ2 magnetospheric magnetization horizontally or vertically magnetizes in direction along face, and MTJ1 and MTJ2
Pinning layer position is different, and a pinning layer is in bottom, then another pinning layer is at top.The pinning of MTJ1 and MTJ2 pinning layer
Direction is identical.
In the present embodiment, polymorphic magnetic tunnel junction memory unit is as shown in figure 3, two MTJ pass through a shared pinning layer
Direct stacking forms multilayer film.
Embodiment 2：In the present embodiment, the bit structure of polymorphic magnetic storage is as shown in figure 1, including wordline WL, bit line
The polymorphic magnetic memory cell of BL, MTJ 1MTJ1 and MTJ 2MTJ2 compositions, the storage being made up of diode
Unit selection switchs.Memory cell selecting switch can also use CMOS transistor, as shown in Figure 2.Both the above structure can be optional
One.
Wherein, MTJ1 and MTJ2 magnetospheric magnetization horizontally or vertically magnetizes in direction along face, and MTJ1 and MTJ2
Pinning layer position is different, and a pinning layer is in bottom, then another pinning layer is at top.The pinning of MTJ1 and MTJ2 pinning layer
Direction is identical.
In the present embodiment, polymorphic magnetic tunnel junction memory unit is as shown in figure 4, two MTJ pass through wire or shared one
Electrode realizes interconnection.Wherein, up, MTJ2 pinning layers are in lower section for MTJ1 pinning layers.
Embodiment 3：In the present embodiment, the bit structure of polymorphic magnetic storage is as shown in figure 1, including wordline WL, bit line
The polymorphic magnetic memory cell of BL, MTJ 1MTJ1 and MTJ 2MTJ2 compositions, the storage being made up of diode
Unit selection switchs.Memory cell selecting switch can also use CMOS transistor, as shown in Figure 2.Both the above structure can be optional
One.
Wherein, MTJ1 and MTJ2 magnetospheric magnetization horizontally or vertically magnetizes in direction along face, and MTJ1 and MTJ2
Pinning layer position is different, and a pinning layer is in bottom, then another pinning layer is at top.The pinning of MTJ1 and MTJ2 pinning layer
Direction is identical.
In the present embodiment, polymorphic magnetic tunnel junction memory unit is as shown in figure 5, two MTJ pass through wire or shared one
Electrode realizes interconnection.Wherein, MTJ1 pinning layers are in lower section, and MTJ2 pinning layers are up.
Embodiment 4：In the present embodiment, the bit structure of polymorphic magnetic storage is as shown in figure 1, including wordline WL, bit line
The polymorphic magnetic memory cell of BL, MTJ 1MTJ1 and MTJ 2MTJ2 compositions, the storage being made up of diode
Unit selection switchs.Memory cell selecting switch can also use CMOS transistor, as shown in Figure 2.Both the above structure can be optional
One.
Wherein, MTJ1 and MTJ2 magnetospheric magnetization horizontally or vertically magnetizes in direction along face, and MTJ1 and MTJ2
Pinning layer position is different, and a pinning layer is in bottom, then another pinning layer is at top.The pinning of MTJ1 and MTJ2 pinning layer
Direction is identical.
In the present embodiment, polymorphic magnetic tunnel junction memory unit is as shown in fig. 6, two MTJ are in parallel by wire or electrode
Realize interconnection.Wherein, up, MTJ2 pinning layers are in lower section for MTJ1 pinning layers.
The technical principle for being the specific embodiment of the present invention and being used above, if conception under this invention institute
The change of work, during the spirit that its caused function is still covered without departing from specification and accompanying drawing, it should belong to the present invention's
Protection domain.
Claims (10)
- A kind of 1. bit structure of polymorphic magnetic storage, it is characterised in that including：Polymorphic magnetic tunnel junction memory cell array, On-off circuit；On-off circuit is connected with polymorphic magnetic tunnel junction memory cell array, is controlled it.
- A kind of 2. bit structure of polymorphic magnetic storage according to claim 1, it is characterised in that：The polymorphic magnetic Tunneling junction memory cell has multiple resistance states, is combined and formed by two MTJ serial or parallel connections, one of magnetic Bottom pinning is become in property tunnel, and another is top pinning, and the pinning direction of two MTJs is identical.
- A kind of 3. bit structure of polymorphic magnetic storage according to claim 2, it is characterised in that：The magnetic tunnel Knot be made up of pinning layer thin magnetic film, free layer thin magnetic film, insulating interlayer, insulating interlayer be clipped in pinning layer thin magnetic film, from By between layer thin magnetic film；The direction of magnetization of pinning layer thin magnetic film is fixed；The magnetization orientation of free layer thin magnetic film depends on External magnetic field and spin polarized current effect, for producing different resistance states.
- A kind of 4. bit structure of polymorphic magnetic storage according to claim 3, it is characterised in that：The magnetic tunnel The thin magnetic film of knot is any one of magnetic anisotropy or perpendicular magnetic anisotropic in plane.
- A kind of 5. bit structure of polymorphic magnetic storage according to claim 4, it is characterised in that：The magnetic tunnel Become arbitrary shape；Preferably, the magnetic tunnel of magnetic anisotropy becomes ellipse in plane；Perpendicular magnetic anisotropic Magnetic tunnel becomes circle.
- A kind of 6. bit structure of polymorphic magnetic storage according to claim 3, it is characterised in that：The pinning layer magnetic Property film, free layer thin magnetic film constituent for iron, cobalt, boron, nickel any one or combination；The structure of the insulating interlayer Into any one that composition is aluminum oxide, magnesia or combine.
- A kind of 7. bit structure of polymorphic magnetic storage according to claim 2, it is characterised in that：Described two magnetic The mode that is connected in series of tunnel knot is to share the direct stacking of a pinning layer to form multilayer film, interconnection is realized by wire, is shared One electrode realizes any one in interconnection.
- A kind of 8. bit structure of polymorphic magnetic storage according to claim 2, it is characterised in that：Described two magnetic tunnels The parallel of road knot is to share the direct stacking of a pinning layer to form multilayer film and then realize interconnection by wire, share One electrode realizes any one of interconnection.
- A kind of 9. bit structure of polymorphic magnetic storage according to claim 1, it is characterised in that：Described switch electricity Road includes wordline, bit line, switching device, and switching device is connected with wordline, bit line respectively；Described switching device selects for diode Select any one in device, CMOS transistor.
- A kind of 10. bit structure of polymorphic magnetic storage according to claim 1, it is characterised in that：Described switch The electric current that circuit can be provided is much smaller than is programmed required electric current based on spin transfer torque principle；The electricity that on-off circuit provides Stream size is by reducing supply voltage, reduction supply current, being regulated and controled using current-limiting circuit, diminution transistor width.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201610419994.XA CN107481755A (en) | 2016-06-13 | 2016-06-13 | A kind of bit structure of polymorphic magnetic storage |
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| CN201610419994.XA CN107481755A (en) | 2016-06-13 | 2016-06-13 | A kind of bit structure of polymorphic magnetic storage |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108538879A (en) * | 2018-03-09 | 2018-09-14 | 上海新储集成电路有限公司 | A kind of memory cell structure of three-dimensional storage |
| CN110277490A (en) * | 2019-06-24 | 2019-09-24 | 中国科学院微电子研究所 | STT-MRAM reference unit and preparation method thereof and chip comprising the reference unit |
| CN110660435A (en) * | 2018-06-28 | 2020-01-07 | 中电海康集团有限公司 | MRAM memory cell, array and memory |
| WO2020177451A1 (en) * | 2019-03-01 | 2020-09-10 | 浙江驰拓科技有限公司 | Spin-orbit torque magnetic random access memory unit and magnetic random access memory |
| CN111739570A (en) * | 2019-03-25 | 2020-10-02 | 中电海康集团有限公司 | SOT-MRAM memory cell and SOT-MRAM memory |
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Application publication date: 20171215 |