CN107463459A - Store method, device, system and the terminal device of system exception internal storage data - Google Patents
Store method, device, system and the terminal device of system exception internal storage data Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0715—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a system implementing multitasking
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
- G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0766—Error or fault reporting or storing
- G06F11/0787—Storage of error reports, e.g. persistent data storage, storage using memory protection
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Abstract
This application discloses a kind of store method, device, system and the terminal device of system exception internal storage data, wherein this method includes:Whether the count value of detection Watch Dog Timer exceeds preset value;If exceeding preset value, the internal storage data in DDR is preserved by the way of self-refresh using the Micro-processor MCV control Double Data Rate synchronous DRAM DDR in system CPU;After DDR, which completes interior data, to be preserved, the application processor in control system CPU enters system program running status;After the application processor enters system program operation, the internal storage data in DDR is stored into default storage medium.Technical scheme only needs the preservation of internal system program operation internal data when achieving that system exception, the instruction that need not be sent by external device to system, find that where goes wrong according to internal data during system exception, implementation is stronger, improves Resolving probiems efficiency.
Description
Technical field
The present invention relates to communication technical field, more particularly to a kind of store method of system exception internal storage data, device, it is
System and terminal device.
Background technology
Intelligent television is almost the indispensable household electrical appliance of each family in recent years, and its function is also more and more.And in intelligence
The project development stage of TV, system CPU can run into various abnormal problems, be transported as applied in processing unit ARM cores
There is the problems such as kernel panic (kernel fault), EMS memory error, memory overwriting, internal memory are trampled, system performance in capable software
To crash, restarting phenomenon, system is caused to cannot respond to any control instruction in the external world.
When present analysis system in case of system halt, the problems such as restarting, main available log information includes:Serial ports daily record,
Logcat daily records (android daily records), dmesg (linux kernel daily record), anr (android exceptions trace log),
Tomstones (android abnormal logs) etc..When conventional CPU exceptions occur, such as kernel-driven layer null pointer, application
During layer deadlock, check that these above-mentioned log informations can determine questions and prospect substantially, solve problem after finding questions and prospect.And work as
When appearance memory address crosses the border, trampled, these log informations, which can only provide where, to go wrong, but can not provide and why ask
Topic, these log informations have no to help.Therefore, during the problems such as running into memory overwriting, trampling, it usually needs system is connected into arm
Emulation tool Trace, reruns pathological system, and system problem is reappeared using Trace, so as to find which process or
Task there is a problem and why go wrong.
But only operation exception process or during task under given conditions, system CPU exception just occurs, causes to ask
The probability for inscribing reproduction is low.Also anomaly caused by memory overwriting, the problems such as trampling is varied, causes anomaly not
It is determined that so as to add the difficulty of problem repetition.And embedded system (linux or android) is mostly multi-CPU system,
, it is necessary to check which or which CPU core goes wrong after appearance CPU exceptions, compared to monokaryon system, workload is added,
So that problem repetition is more difficult, thus, the implementation using Trace reproduction problems is poor, and the efficiency for solving problem is low.In addition,
Itself also there is the problems such as expensive, complex operation in this emulation tools of Trace, therefore, in hardware cost and human cost
Aspect does not also have advantage.
The content of the invention
The invention provides a kind of store method, device, system and the terminal device of system exception internal storage data, to solve
When abnormal problem occurs in system at present, analysis method implementation is poor, solves the problem of problem efficiency is low.
In a first aspect, the embodiments of the invention provide a kind of store method of system exception internal storage data, methods described bag
Include:
Whether the count value of detection Watch Dog Timer exceeds preset value;
If exceeding preset value, the Micro-processor MCV control Double Data Rate in the system central processor CPU is utilized
Synchronous DRAM DDR preserves the internal storage data in the DDR by the way of self-refresh;
After the DDR, which completes interior data, to be preserved, the application processor in the system CPU is controlled to enter system journey
Sort run state;
After the application processor enters system program operation, the internal storage data storage in the DDR is deposited to default
In storage media.
Second aspect, the embodiments of the invention provide a kind of save set of system exception internal storage data, including:Processing
Device, memory and communication interface, the processor, the memory are connected with the communication interface by communication bus;
The communication interface, for receiving self-refresh command;
The memory, for store program codes;
The processor, for reading the program code stored in the memory, and perform method described above.
The third aspect, the embodiments of the invention provide a kind of preservation system of system exception internal storage data, including it is above-mentioned
The save set of system exception internal storage data, in addition to:Application processor, Micro-processor MCV and Double Data Rate synchronous dynamic
Random access memory DDR, the MCU and DDR are connected by peripheral bus with the application processor respectively;
The DDR, for preserving internal storage data by the way of self-refresh;
The MCU, for being controlled in the presence of the save set of the system exception internal storage data in the DDR preservations
Deposit data;
The application processor, for entering system program running status under the control of the MCU, to restart system.
Fourth aspect, the embodiments of the invention provide a kind of terminal device, including system exception internal memory number described above
According to preservation system.
Technical scheme provided by the invention can include the following benefits:
In scheme provided in an embodiment of the present invention, whether the count value of the Watch Dog Timer in detecting system CPU exceeds
Preset value, if exceeding preset value, proof system occurs abnormal, and system brings into operation abnormal program, i.e., using in system CPU
Micro-processor MCV control Double Data Rate synchronous DRAM DDR preserves the internal memory number in DDR by the way of self-refresh
According to.Control DDR to enter self-refresh mode by MCU, caused data in system program running in preservation DDR, avoid be
System restarts the data failure in rear DDR.After internal storage data in DDR has preserved, the application processor in control system CPU enters
System program running status, that is, restart system CPU, also has for convenience of subsequent analysis processing data, enters system in application processor
After system program operation, the internal storage data in DDR is stored into default storage medium, in USB flash disk.Staff can deposit to default
Internal storage data in storage media is analyzed, and finds that the problems such as memory overwriting, trample occurs in where, and avoids staff from keeping eventually
End equipment carries out analyze data, influences other staff and carries out other work.The guarantor of system exception internal storage data provided by the invention
Deposit the guarantor that method, apparatus, system and terminal device only need internal system program to run internal data when achieving that system exception
Deposit, it is not necessary to the instruction sent by external device to system, find that where goes wrong according to internal data during system exception,
Implementation is stronger, improves Resolving probiems efficiency.
It should be appreciated that the general description and following detailed description of the above are only exemplary and explanatory, not
Can the limitation present invention.
Brief description of the drawings
In order to illustrate more clearly of technical scheme, letter will be made to the required accompanying drawing used in embodiment below
Singly introduce, it should be apparent that, for those of ordinary skills, without having to pay creative labor,
Other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is a kind of structural representation of the minimum composition system of terminal device;
Fig. 2 be a kind of terminal device minimum composition system in CPU structural representation
Fig. 3 is a kind of flow chart of the store method for system exception internal storage data that the embodiment of the present invention one provides;
Fig. 4 is flow chart detailed S402 in the store method of system exception internal storage data provided in an embodiment of the present invention;
Fig. 5 is a kind of flow chart of the store method for system exception internal storage data that the embodiment of the present invention two provides;
Fig. 6 is the structural representation of the save set of system exception internal storage data provided in an embodiment of the present invention.
Embodiment
In the project development stage of intelligent television, embedded system (Linux or android) can run into various systems
System crashes, the problems such as restarting, for example, kernel panic (kernel fault), RAM leakage, memory overwriting, trample etc. it is abnormal, this
When system be not responding to the man-machine interaction mode of similar command row to understand the state of current system, i.e. system is in shape out of control
State, it is not responding to any control instruction in the external world.
At present to solve system exception, it is necessary to external arm emulation tools Trace, reruns pathological system, pass through emulation
Instrument Trace reappears to problem, internal storage access mistake occurs to find which process or task, but only in specific bar
Operation exception process or during task under part, just occurs system exception, the reproduction probability that throws into question is low, also embedded system
It is mostly multiple nucleus system, adds the difficulty of problem repetition, so that the implementation of Trace reproduction problems is poor, solves problem
Efficiency it is low.To solve these problems, the embodiment of the present invention provides a kind of store method of pathological system internal storage data, is not required to
External device reappears to problem, only needs the software of system in itself to preserve the internal storage data under system exception state, carries
The efficiency of high Resolving probiems.
Fig. 1 is a kind of structural representation of system in terminal device.As shown in figure 1, the system of the terminal device includes:In
Central processor CPU (Central Processing Unit) 100, Double Data Rate synchronous DRAM DDR (Double
Synchronous Dynamic Random Access Memory) 200 and nonvolatile memory EMMC (Embedded
Multi Media Card) 300, wherein,
EMMC300 is nonvolatile memory, and equivalent to the hard disk of PC computers, for storage program area mirror image, it is special
Point is that data can preserve after power down.
DDR200's (Double Data Rate), i.e. Double Data Rate synchronous DRAM, wherein Double Data Rate
The rising and falling edges being meant that in clock can transmit data, the synchronous signal for being meant that all data transfers and using
Will be by clock come synchronous.Common DDR chips have DDR, DDR2, DDR3, DDR4, i.e. the four of DDR technologies on the market at present
Version.
When program is run, the software in CPU is to enter line program in DDR to run, caused number in program operation process
According to being stored in DDR, produced problem in the internal storage data analysis software running in DDR can be passed through.
Fig. 2 is a kind of structural representation of system CPU in terminal device.As shown in Fig. 2 system CPU 100 is included at application
Manage device 101, WDT (Watchdog Timer, house dog) 102, EMMC controllers 103, DDR controller 104, MCU
(Microcontroller Unit, microprocessor) 105 and shared drive 106, wherein,
WDT102, EMMC controller 103, DDR controller 104 and MCU105 are handled by peripheral bus and application respectively
Device 101 is connected, and application processor 101 is connected with shared drive 106 respectively with MCU105.
What is run on application processor 101 is linux or android operating systems, and the main flow of application processor 101 is at present
ARM cores.
WDT102 is independently of the hardware watchdog of application processor 101, is responsible for supervisory control system running situation, and it realizes former
Reason is that the time-out time of this WatchDog Timer is set during start, and application processor 101 is periodically gone the counter of timer
Reset, be commonly called as feeding dog.If the abnormal conditions such as deadlock occur for system, dog can not be fed, WDT102 is responsible for restarting system.
EMMC controllers 103, DDR controller 104 respectively with outside EMMC300, DDR200 device it is corresponding, be responsible for
DDR200, EMMC300 provide clock, data, control signal etc..
MCU105 is single-chip microcomputer framework, runs the program software independently of application processor 101 thereon, is responsible for system standby
Behavior afterwards, such as the function such as standby wakeup.MCU is generally C51core.
If shared drive 106 is the SRAM sram of one piece of dry capacity inside CPU, application processor 101
Data exchange between MCU105 is realized by shared drive 106.
When there is memory overwriting in system CPU, tramples etc. it is abnormal when, the application processor 101 inside CPU is not responding to any control
System order, but WDT102, MCU105 be independently of application processor 101, still it can run during system exception.But system CPU
After there is exception, house dog time-out can be triggered and restart system, the internal storage data in DDR200 can lose after system CPU is restarted
Effect, staff can not be according to where internal storage data problem analyses.
In order to solve the problems, such as that the internal storage data failure after abnormal restarting in DDR occurs in system CPU, the embodiment of the present invention carries
A kind of store method of system exception internal storage data is supplied, during the core of this method:When system CPU appearance exception, cause to guard the gate
Dog timer expired, before system is restarted, MCU controls DDR preserves the internal storage data in DDR by the way of self-refresh, to keep away
Exempt from the internal storage data failure after system reboot in DDR.
The store method of system exception internal storage data provided in an embodiment of the present invention is carried out below with reference to accompanying drawing detailed
Explanation.
Fig. 3 is the flow chart of the store method for the pathological system internal storage data that the embodiment of the present invention one provides, and this method should
In system for Fig. 2 terminal device, more specifically, the executive agent of methods described can be in system shown in Figure 2 CPU
WDT, MCU and application processor, main processing steps include:
S401:Whether the count value of detection Watch Dog Timer exceeds preset value.
During system CPU start operation, by way of read-write register to WatchDog Timer set overtime preset value and
The instruction to be performed, i.e. timeout treatment function when time-out occurs, during system normal operation, periodically go the counter of timer is clear
Zero, it is commonly called as feeding dog.If system generation deadlock etc. is abnormal, dog can not be fed, the count value of Watch Dog Timer will exceed
Preset value.Therefore by detecting whether the count value of Watch Dog Timer exceeds preset value to judge it is different whether system CPU occurs
Often.
Whether the count value for detecting Watch Dog Timer is watchdog module oneself detection beyond preset value, that is, performs master
Body is house dog WDT, independent of other modules.
S402:It is double using the Micro-processor MCV control in the system central processor CPU if exceeding preset value
Times speed synchronous DRAM DDR preserves the internal storage data in the DDR by the way of self-refresh.
Detect that the count value of Watch Dog Timer exceeds preset value, then it is abnormal to show that system CPU occurs, now system is transported
The abnormal program of row.Jumping to MCU programs by house dog WDT, (program in system CPU is realized by way of read-write register
Program switching, house dog switches to MCU operation programs by way of reading MCU registers herein), DDR is controlled by MCU
Preserve its internal internal storage data.
Micro-processor MCV, generally C51 cores, it is responsible for entering standby mode in application processor (ARM cores), does not stop
Detection external wake event, such as detection user whether press remote control power keys, if it is detected then to application processing
It is electric on device, it is then wake up and jumps to application processor operation.
The specific steps that MCU control DDR preserve data using self-refresh mode are as shown in Figure 4:
S412:The MCU sends self-refresh command by the DDR controller in the system CPU to the DDR.
S422:The DDR enters self-refresh mode after receiving the self-refresh command, to preserve the internal memory in the DDR
Data.
DDR is a kind of DRAM (Dynamic Random Access Memory, dynamic RAM), and basic storage is single
Member is the grid capacitance of metal-oxide-semiconductor, and electric capacity keeps the limited time of electric charge, in order to supplement the electric charge missed in time, it is necessary to regularly give
Grid capacitance supplements electric charge, and the operation of this supplement electric charge is referred to as refresh operation, is exactly to read by turns each unit to fill once in fact
Electricity.
Refresh operation is divided into two kinds:AR (Auto Refresh, automatic to refresh) and SR (Self Refresh, self-refresh).
Whether which kind of refreshing mode, all outside row address information need not be provided, because this is being automatically brought into operation for inside.For
Have one inside AR, SDRAM (Synchronous Dynamic Random Access Memory, synchronous DRAM)
Individual row address maker (also referred to as refresh counters) is used for automatically sequentially generating row address.
The data that SR is then mainly used under park mode low power consumpting state preserve.When sending AR orders, by CKE (pin)
Disarmed state is placed in, has been put into SR patterns, is now no longer rely on system clock work, but carry out according to the clock of inside
Refresh is operated.All external signals during SR in addition to CKE are all invalid, only make the effective ability of CKE again
Exit SR patterns and enter normal operating state.
Usual DDR operation clock is provided by the DDR controller integrated on CPU.In MCU programs, MCU passes through
Read and write DDR controller address register mode control DDR controller to DDR send self-refresh command, DDR chips received from
Enter self-refresh mode after refreshing instruction, DDR its internal internal storage data after self-refresh is preserved, will not be in system weight
Failed after opening.
S403:After the DDR, which completes interior data, to be preserved, the application processor in the system CPU is controlled to enter
System program running status.
After DDR enters self-refresh mode, the internal storage data inside DDR is preserved, now by MCU programming jumps to application
Processor program, application processor program is run, to restart system.Specifically, MCU is by reading application processor (ARM cores
The heart) mode of address register controls the program of application processor to enter running status, to restart system.
S404:After the application processor enters system program operation, by the internal storage data storage in the DDR in advance
If in storage medium.
For convenience of internal storage data during analysis system exception, after restarting system, the internal storage data storage in DDR is arrived default
In storage medium, such as USB flash disk, mobile hard disk, avoid staff from keeping for a long time and analyze data is carried out before terminal device, influence
Other operations of other staff.Internal storage data in DDR is preserved into comprising the following steps that to default storage medium:
After application processor in system CPU enters system program operation, whether detecting system, which has accessed default storage, is situated between
Matter, default storage medium is such as accessed, then system automatically writes the internal storage data in DDR in default storage medium.
After internal storage data in DDR is stored into default storage medium, it is marked in system journal, reminds work people
Member's system CPU occurs abnormal, and internal storage data during system exception has been preserved into default storage medium, and staff can be to pre-
If the data in storage medium are analyzed, find which process or internal storage access mistake occurs in task, it is different so as to solve system
Chang Wenti.
Store method provided in an embodiment of the present invention, after the count value for detecting Watch Dog Timer exceeds preset value,
The internal storage data in DDR is preserved by the way of self-refresh using the MCU controls DDR in system CPU, so as to avoid DDR
In internal storage data failed after system reboot;After data in DDR have preserved, the application processor in control system CPU
Into system program running status, to restart system, and after application processor enters system program operation, in DDR
Deposit data is stored into default storage medium, facilitates internal storage data during staff's analysis system exception.It is provided by the invention
The store method of system exception internal storage data only needs the guarantor of internal system program operation internal data when achieving that system exception
Deposit, it is not necessary to the instruction sent by external device to system, find that where goes wrong according to internal storage data during system exception,
Implementation is stronger, improves Resolving probiems efficiency.
The embodiment of the present invention additionally provides a kind of store method of system exception internal storage data, as shown in figure 5, this method should
In system for Fig. 2 terminal device, more specifically, the executive agent of methods described can be in system shown in Figure 2 CPU
WDT, MCU and application processor, main processing steps include:
S501:Whether the count value of detection Watch Dog Timer exceeds preset value.
S502:After the count value of Watch Dog Timer exceeds preset value, at the Micro-processor MCV and the application
Abnormality mark is set in shared drive between reason device.
After the count value for detecting Watch Dog Timer exceeds preset value, it is abnormal to show that system occurs, now starts to hold
Program under row abnormality.Whether there is exception for compartment system, after the count value of Watch Dog Timer exceeds preset value,
Abnormality mark is set in shared drive, and abnormality mark is 32 integers.If shared drive is one piece of dry capacity inside CPU
SRAM sram, the data exchange between application processor and MCU are by Sharing Memory Realization.
S503:Used using the Micro-processor MCV control Double Data Rate synchronous DRAM DDR in system CPU
The mode of self-refresh preserves the internal storage data in the DDR.
S504:After the DDR, which completes interior data, to be preserved, the application processor in the system CPU is controlled to enter
System program running status.
S505:During application processor runs bootloader programs, detect in the shared drive and whether deposit
In abnormality mark.
S506:If in the presence of by the internal storage data storage in the DDR into default storage medium.
S507:If being not present, application processor program is continued to run with, to restart system.
Once normal starting procedure is terminal device:When the upper electricity of exchange or direct current are started shooting, application processor (ARM cores
The heart) bring into operation, according to bootloader on software, --- linux --- android order is run successively.The a certain moment,
Standby request is have received, such as user presses the power keys of remote control, then application processor (ARM cores) out of service, MCU
Bring into operation.The MCU program software moment has detected whether power on request, if so, then notifying application processor (ARM cores) to open
Machine, jump to application processor (ARM cores) and continue to run with.
There is memory overwriting, trampled etc. abnormal in system, causes system reboot, the internal storage data now preserved in DDR just has
Meaning, which process can be found according to the internal storage data in DDR or internal storage access mistake occurs in task, so as to solve problem.But
If normal boot-strap or the system reboot caused by hardware problem, now the internal storage data in DDR is not helped to Resolving probiems
Help, therefore preserve the internal storage data in DDR with regard to nonsensical.
When application processor runs bootloader programs, system is that may have access to extraneous storage device, is now detected
It whether there is abnormality mark in shared drive, if abnormality mark be present, show that system is due to that CPU appearance is abnormal and just restarted
, the internal storage data in DDR is stored into default storage medium, facilitates and solves the problems, such as;If abnormality mark is not present, show
System is due to that other reasonses are just restarted or normal boot-strap, now only needs normal activation system, by the internal memory in DDR
Data Cun Chudao, which is preset in storage medium, completely need not then.
Store method provided in an embodiment of the present invention, after the count value for detecting Watch Dog Timer exceeds preset value,
Abnormality mark is set in the shared drive between MCU and application processor, and the MCU controls DDR in reutilization system CPU is used
The mode of self-refresh preserves the internal storage data in DDR, so as to avoid the data in DDR from being failed after system reboot;In DDR
After interior data have preserved, the application processor in control system CPU enters system program running status, to restart system, and
In the bootloader runnings of application processor, detect in shared drive and whether there is abnormality mark, if in the presence of, by
Internal storage data in DDR is stored into default storage medium, if being not present, normal activation system.System provided by the invention
The store method of abnormal internal storage data only needs the preservation of internal system program operation internal data when achieving that system exception, no
The instruction sent by external device to system is needed, finds that where goes wrong according to internal data during system exception, is implemented
Property is stronger, improves Resolving probiems efficiency.
Fig. 6 is a kind of structural representation of the save set of system exception internal storage data provided in an embodiment of the present invention.Such as
Shown in Fig. 6, the save set 600 of the system exception internal storage data, its structure includes:At least one processor 601, internal memory 602,
Peripheral interface 603, input/output subsystem 604, power circuit 605 and communication line 606.
In figure 6, arrow represents to carry out the communication and data transmission between the inscape of computer system, and it can profit
Realized with high-speed serial bus, parallel bus, storage area network and/or other appropriate communication technologys.
Internal memory 602 may include that operating system 612 and internal storage data preserve routine 622.For example, internal memory 602 may include at a high speed
Random access memory, disk, static RAM (SRAM), dynamic random access memory (DRAM), read-only deposit
Reservoir (ROM), flash memory or non-voltile memory.Internal memory 602 can store preserves routine for operating system 612 and internal storage data
622 program coding, that is to say, that may include the software mould needed for the action of the save set 600 of system exception internal storage data
Block, instruction set architecture or a variety of data outside it.Now, other controllers of the grade of peripheral interface 603 and internal memory 602 are deposited
Taking can be controlled by processor 601.
Peripheral interface 603 can set the input of the save set 600 of system exception internal storage data and/or output periphery
It is standby to be combined with processor 601, internal memory 602.Also, input/output subsystem 604 can be by a variety of input/output ancillary equipment
It is combined with peripheral interface 603.For example, input/output subsystem 604 may include display, keyboard, mouse, printer
Deng specifically, including being used for the control that is combined CPU and DDR with peripheral interface 603 in input/output subsystem 604
Device processed.According to another side, input/output periphery also can without input/output subsystem 604 and and peripheral interface
603 are combined, i.e. CPU and DDR can be also combined without input/output subsystem 604 with peripheral interface 603.
Power circuit 605 can be to all or part of supply electric power of the circuit element of terminal device.For example, power circuit
605 may include such as electric power management system, battery or the more than one power supply of exchange (AC), charging system, power failure monitor electricity
Road, power converter or inverter, power state marker character are generated for electric power, managed, other any circuit elements of distribution
Part.
Communication line 606 can be communicated using at least one interface with other computer systems, such as be entered with control system
Row communication.
Processor 601 is abnormal by implementing the software module being stored in internal memory 602 or instruction set architecture executable system
The multiple functions and processing data of the save set 600 of internal storage data.That is, processor 601 is by performing basic calculation
The input/output calculation of art, logic and computer system, may be configured as handling the order of computer program.
Processor 601 forms the store method of the system exception internal storage data for performing above-described embodiment one to two.
Fig. 6 embodiment is only an example of the save set 600 of the system exception internal storage data of terminal device, system
The save set 600 of abnormal internal storage data can have following structure or configuration:The partial circuit element shown in Fig. 6 is omitted, or is entered
One step possesses the circuit element of addition not shown in Fig. 6, or combines more than two circuit elements.For example, it is used for shift(ing) ring
The computer system of the communication terminal in border can also further comprise sensor etc. in addition to the circuit element shown in Fig. 6, and
The RF for communication (WiFi, 6G, LTE, Bluetooth, NFC, Zigbee etc.) is may also comprise in communication line 606
The circuit of communication.Circuit element included in the save set 600 of system exception internal storage data can be by including more than one
The combination of both hardware, software or the hardware and software of the integrated circuit that signal transacting or application program are becomed privileged and realize.
The control of save set 600 of the system exception internal storage data of above-mentioned composition performs abnormal program, and in inspection in real time
The working condition of user action is surveyed, whether the count value that the device also detects Watch Dog Timer exceeds preset value, and when true
When devise a stratagem numerical value exceeds preset value, the internal storage data in DDR is preserved by the way of self-refresh using MCU controls DDR, is avoided
Internal storage data in DDR fails after system reboot.
Based on the save set of the system exception internal storage data shown in Fig. 6, the embodiments of the invention provide a kind of system is different
The preservation system of normal internal storage data, the system include the save set 600 of the system exception internal storage data shown in Fig. 6, in addition to
Application processor (ARM cores), Micro-processor MCV and Double Data Rate synchronous DRAM DDR, wherein, MCU with
DDR is connected by peripheral bus with application processor respectively.DDR, for preserving internal storage data by the way of self-refresh;System
Whether the save set 600 of abnormal internal storage data, the count value for detecting Watch Dog Timer exceed preset value;MCU, it is used for
DDR is controlled to preserve internal storage data in the presence of the save set 600 of the system exception internal storage data;Application processor, use
In entering system program running status under MCU control, to restart system
The preservation system also includes DDR controller, and MCU is connected with DDR controller by peripheral bus, for MCU's
Under control self-refresh command is sent to DDR;DDR enters self-refresh mode according to self-refresh command, to preserve the internal memory number in DDR
According to.
The preservation system also includes shared drive, application processor and MCU respectively with shared Memory linkage;Shared drive,
For when the count value of Watch Dog Timer exceeds preset value, abnormality mark to be set in it;Run in application processor
In bootloader program process, the internal storage data in DDR is stored into default storage medium after detecting abnormality mark.
The embodiment of the present invention additionally provides a kind of terminal device, including the system exception internal storage data in above-described embodiment
Preservation system.
For convenience of description, it is divided into various units during description apparatus above with function to describe respectively.Certainly, this is being implemented
The function of each unit can be realized in same or multiple softwares and/or hardware during invention.
Those skilled in the art will readily occur to the present invention its after considering specification and putting into practice the disclosure invented here
Its embodiment.The application be intended to the present invention any modification, purposes or adaptations, these modifications, purposes or
Person's adaptations follow the general principle of the present invention and including undocumented common knowledges in the art of the invention
Or conventional techniques.Description and embodiments are considered only as exemplary, and true scope and spirit of the invention are by following
Claim is pointed out.
Invention described above embodiment is not intended to limit the scope of the present invention..
Claims (10)
1. a kind of store method of system exception internal storage data, it is characterised in that methods described includes:
Whether the count value of detection Watch Dog Timer exceeds preset value;
It is synchronous using the Micro-processor MCV control Double Data Rate in the system central processor CPU if exceeding preset value
Dynamic RAM DDR preserves the internal storage data in the DDR by the way of self-refresh;
After the DDR, which completes interior data, to be preserved, the application processor in the system CPU is controlled to be transported into system program
Row state;
After the application processor enters system program operation, the internal storage data storage in the DDR is situated between to default storage
In matter.
2. the method as described in claim 1, it is characterised in that whether the count value for detecting Watch Dog Timer exceeds preset value
Afterwards, methods described also includes:
After the count value for detecting Watch Dog Timer exceeds the preset value, in the Micro-processor MCV and the application
Abnormality mark is set in shared drive between processor;
And
After the application processor enters system program operation, the internal storage data storage in the DDR is situated between to default storage
In matter, including:
During the application processor runs bootloader programs, detect in the shared drive with the presence or absence of described
Abnormality mark;
If in the presence of by the internal storage data storage in the DDR into the default storage medium.
3. method as claimed in claim 2, it is characterised in that deposit the internal storage data storage in the DDR to described preset
In storage media, including:
Detect after the abnormality mark in the shared drive being present, detect whether the system accesses default storage medium;
If access, the internal storage data in the DDR is write in the default storage medium automatically.
4. the method as described in claim 1, it is characterised in that utilize the microprocessor in the system central processor CPU
MCU controls Double Data Rate synchronous DRAM DDR preserves the internal storage data in the DDR by the way of self-refresh,
Including:
The MCU sends self-refresh command by the DDR controller in the system CPU to the DDR;
The DDR enters self-refresh mode after receiving the self-refresh command, to preserve the internal storage data in the DDR.
5. the method as described in claim 1, it is characterised in that control the application processor in the system CPU to enter system
Running state of programs, including:
The MCU controls the program of the application processor to enter by way of reading the application processor address register
Running status, to restart the system.
A kind of 6. save set of system exception internal storage data, it is characterised in that including:Processor, memory and communication interface,
The processor, the memory are connected with the communication interface by communication bus;
The communication interface, for receiving self-refresh command;
The memory, for store program codes;
The processor, for reading the program code stored in the memory, and perform as any in claim 1 to 5
Method described in.
A kind of 7. preservation system of system exception internal storage data, it is characterised in that including:System as claimed in claim 6 is different
The save set of normal internal storage data, in addition to:Application processor, Micro-processor MCV and Double Data Rate synchronous dynamic random are deposited
Reservoir DDR, the MCU and DDR are connected by peripheral bus with the application processor respectively;
The DDR, for preserving internal storage data by the way of self-refresh;
The MCU, for controlling the DDR to preserve internal memory number in the presence of the save set of the system exception internal storage data
According to;
The application processor, for entering system program running status under the control of the MCU, to restart system.
8. system as claimed in claim 7, it is characterised in that the system also includes DDR controller, and the MCU and DDR is controlled
Device processed is connected by peripheral bus, for sending self-refresh command to the DDR under the control of the MCU;
The DDR enters self-refresh mode according to the self-refresh command, to preserve the internal storage data in the DDR.
9. system as claimed in claim 7, it is characterised in that the system also includes shared drive, the application processor
It is connected respectively with the shared drive with MCU;
The shared drive, for when the count value of Watch Dog Timer exceeds preset value, abnormality mark to be set in it;
In the application processor runs bootloader program process, detect in the DDR after the abnormality mark
Internal storage data store into default storage medium.
10. a kind of terminal device, it is characterised in that including the system exception internal memory number as any one of claim 7 to 9
According to preservation system.
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Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108228389A (en) * | 2018-01-11 | 2018-06-29 | 青岛海信移动通信技术股份有限公司 | A kind of method and terminal for carrying out data backup |
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101286130A (en) * | 2007-04-11 | 2008-10-15 | 中兴通讯股份有限公司 | Embedded equipment reset fault positioning accomplishing method |
CN101630278A (en) * | 2008-07-18 | 2010-01-20 | 深圳富泰宏精密工业有限公司 | Method for recording crash abnormal information of electronic device and electronic device |
US20130124795A1 (en) * | 2010-07-29 | 2013-05-16 | Junkei Sato | Semiconductor device and data processing system |
CN103377095A (en) * | 2012-04-24 | 2013-10-30 | 华为技术有限公司 | Running log storage method and device |
US20140122922A1 (en) * | 2012-10-26 | 2014-05-01 | Lsi Corporation | Methods and structure to assure data integrity in a storage device cache in the presence of intermittent failures of cache memory subsystem |
CN104536840A (en) * | 2014-12-31 | 2015-04-22 | 北京兆易创新科技股份有限公司 | Watchdog timer and control method thereof |
CN104866051A (en) * | 2014-02-24 | 2015-08-26 | 华为技术有限公司 | Method for predicting watchdog resetting, microcontroller and embedded system |
-
2017
- 2017-08-14 CN CN201710693906.XA patent/CN107463459B/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101286130A (en) * | 2007-04-11 | 2008-10-15 | 中兴通讯股份有限公司 | Embedded equipment reset fault positioning accomplishing method |
CN101630278A (en) * | 2008-07-18 | 2010-01-20 | 深圳富泰宏精密工业有限公司 | Method for recording crash abnormal information of electronic device and electronic device |
US20130124795A1 (en) * | 2010-07-29 | 2013-05-16 | Junkei Sato | Semiconductor device and data processing system |
CN103377095A (en) * | 2012-04-24 | 2013-10-30 | 华为技术有限公司 | Running log storage method and device |
US20140122922A1 (en) * | 2012-10-26 | 2014-05-01 | Lsi Corporation | Methods and structure to assure data integrity in a storage device cache in the presence of intermittent failures of cache memory subsystem |
CN104866051A (en) * | 2014-02-24 | 2015-08-26 | 华为技术有限公司 | Method for predicting watchdog resetting, microcontroller and embedded system |
CN104536840A (en) * | 2014-12-31 | 2015-04-22 | 北京兆易创新科技股份有限公司 | Watchdog timer and control method thereof |
Non-Patent Citations (2)
Title |
---|
ERIC SCHLAEPFER: "COMPARISON OF INTERNAL AND EXTERNAL WATCHDOG TIMERS", 《HTTPS://WWW.MAXIMINTEGRATED.COM/EN/DESIGN/TECHNICAL-DOCUMENTS/APP-NOTES/4/4229.HTML》 * |
VELANJUN: "内存的刷新与自刷新", 《HTTPS://BLOG.CSDN.NET/VELANJUN/ARTICLE/DETAILS/11584589》 * |
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CN113742113A (en) * | 2020-05-29 | 2021-12-03 | 上海微电子装备(集团)股份有限公司 | Embedded system health management method, equipment and storage medium |
CN112199230A (en) * | 2020-10-19 | 2021-01-08 | 广东电网有限责任公司佛山供电局 | Storage controller supporting multi-core system exception handling |
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WO2022166875A1 (en) * | 2021-02-04 | 2022-08-11 | 展讯通信(上海)有限公司 | Log storage method, communication apparatus, chip, and module device |
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CN116701041B (en) * | 2023-07-27 | 2023-11-10 | 飞腾信息技术有限公司 | Memory data retention method, retention device and related equipment |
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