CN107436752A - Abnormal in-situ FTIR spectroelectrochemitry method, apparatus and computer-readable recording medium - Google Patents
Abnormal in-situ FTIR spectroelectrochemitry method, apparatus and computer-readable recording medium Download PDFInfo
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- CN107436752A CN107436752A CN201710594077.XA CN201710594077A CN107436752A CN 107436752 A CN107436752 A CN 107436752A CN 201710594077 A CN201710594077 A CN 201710594077A CN 107436752 A CN107436752 A CN 107436752A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0715—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a system implementing multitasking
Abstract
The application provides a kind of abnormal in-situ FTIR spectroelectrochemitry method, apparatus and computer-readable recording medium, wherein, this method includes：Obtain and perform exception return instruction, the exception return instruction includes command code, the command code is used to indicate that the last item of computing device to abnormality processing function instructs, perform the exception return instruction, ejected with the information of destination register heap changed program counter value and will be pressed into abnormal stack from abnormal stack, return to the normal processing function for continuing executing with and being interrupted.The technical scheme does not need software code is live to exception to recover, and reduces software code space-consuming and power consumption, improves the execution efficiency of processor.
Description
Technical field
The application is related to field of computer technology, more particularly to a kind of abnormal in-situ FTIR spectroelectrochemitry method, apparatus and computer can
Read storage medium.
Background technology
In existing computer system, processor is as System Control Center, it is necessary to enter to multiple hardware devices in system
Row management.For example, when some program in the normal execution system of processor, it is possible that being called by external event, system
Or the phenomenon that situations such as instruction exception execution interrupts.Now, processor can be to simultaneously diversion treatments are different after program execution scene protection
Ordinary affair part, and anomalous event perform terminate after recover abnormal and perform scene, continue executing with the processing routine being interrupted.
At this stage, abnormal scene protection and the realization recovered can be realized by running the software program of setting.Specifically
, before anomalous event starts execution, it is abnormal that the pop down program by running setting will need register file to be protected to be pressed into
Stack, to preserve the relevant information for being interrupted program, accordingly, after anomalous event execution terminates, pass through the bullet stack program of setting
The register file for being pressed into abnormal stack is ejected into abnormal stack, to recover the phase for being interrupted program being saved before anomalous event performs
Information is closed, and then ensures that processor continues executing with the processing routine being interrupted.
However, the processor that the pop down program set in above-mentioned abnormal scene protection and restoration methods and bullet stack program use
Instruction is very more (for example in MIPS frameworks, if desired to be protected and is recovered to more than 30 individual register files, now need 60
A plurality of processor instruction), the memory space not only taken up is big, and because execute instruction is excessive, causes that execution efficiency is low, power consumption
Greatly.
In summary, it is soft when carrying out scene protection using software code in existing abnormal scene protection and restoration methods
The memory space that part code takes is big, causes that the execution efficiency of processor is low, power consumption is big.
The content of the invention
The application provides a kind of abnormal in-situ FTIR spectroelectrochemitry method, apparatus and computer-readable recording medium, existing different to solve
The problem of computing device efficiency is low, power consumption is big in normal in-situ FTIR spectroelectrochemitry method.
A kind of abnormal in-situ FTIR spectroelectrochemitry method that the application first aspect provides, including：
Exception return instruction is obtained, the exception return instruction includes command code, and the command code is used to indicate processor
Go to the last item instruction of abnormality processing function；
The exception return instruction is performed, with the destination register heap changed program counter value and will be pressed into abnormal stack
Information ejected from the abnormal stack, and return to the normal processing function for continuing executing with and being interrupted.
In the embodiment of the application, the acquisition exception return instruction, including：
An instruction is obtained in the memory for storing the abnormality processing function；
The instruction is parsed, obtains the command code in the instruction；
When command code in the instruction is consistent with the command code of the default exception return instruction, the finger is determined
Make as the exception return instruction.
In another embodiment of the application, before the acquisition exception return instruction, in addition to：
When getting exception request, the normal processing function being carrying out is interrupted；
Information in the destination register heap corresponding to the normal processing function is pressed into the abnormal stack, and turned to
Perform abnormality processing function corresponding to the exception request.
In above-described embodiment of the application, stack maintenance module is provided with the processor；
The information by the destination register heap corresponding to the normal processing function is pressed into the abnormal stack, bag
Include：
By the stack maintenance module by the information pressure in the destination register heap corresponding to the normal processing function
Enter the abnormal stack；
It is described to perform the exception return instruction, deposited with changing program counter value and will be pressed into the target of abnormal stack
The information of device heap ejects from the abnormal stack, and returns to the normal processing function for continuing executing with and being interrupted, including：
The exception return instruction is performed, to change program counter value and will be pressed into institute by the stack maintenance module
The information in abnormal stack is stated to eject and write in the destination register heap in the register for corresponding to number successively；
When all information for being pressed into the abnormal stack all eject, the normal processing for continuing executing with and being interrupted is returned
Function.
In above-described embodiment of the application, register protected field is provided with the stack maintenance module and abnormal stack refers to
Pin；
The register protected field is used for the quantity for indicating the destination register heap, and the abnormal stack pointer is used to indicate
The position of the destination register heap.
In the another embodiment of the application, the destination register heap includes：General-purpose register and system control are posted
Storage heap；
The general-purpose register is the combination for being used to preserve the general register of data operation in the processor, described
System control register heap is the combination for being used to preserve the system control register of processor state in the processor.
The application second aspect provides a kind of abnormal onsite rehabilitation devices, including：
Instruction acquisition module, for obtaining exception return instruction, the exception return instruction includes command code, the operation
Code is used to indicate that the last item of computing device to abnormality processing function instructs；
Execution module is instructed, for performing the exception return instruction, to change program counter value and will be pressed into different
The information of the destination register heap of normal stack ejects from the abnormal stack, and returns to the normal processing function for continuing executing with and being interrupted.
In the embodiment of the application, the instruction acquisition module, for obtaining exception return instruction, it is specially：
The instruction acquisition module, specifically for obtaining a finger in the memory for storing the abnormality processing function
Order, parses the instruction, obtains the command code in the instruction, command code in the instruction is returned with the default exception
Refer to order command code it is consistent when, determine it is described instruction be the exception return instruction.
In another embodiment of the application, described device, in addition to：Processing module；
The processing module, in the instruction acquisition module before exception return instruction is obtained, it is different when getting
Often during request, the normal processing function being carrying out is interrupted, the target corresponding to the normal processing function is deposited
Information in device heap is pressed into the abnormal stack, and turns to and perform abnormality processing function corresponding to the exception request.
In above-described embodiment of the application, stack maintenance module is provided with the processor；
The processing module, for the information in the destination register heap corresponding to the normal processing function to be pressed into
The abnormal stack, it is specially：
The processing module, specifically for normally handling the mesh corresponding to function by described by the stack maintenance module
Information in scalar register file heap is pressed into the abnormal stack；
The instruction execution module, for performing the exception return instruction, to change program counter value and will press
Enter the information of the destination register heap of abnormal stack after the abnormal stack ejection, and return to the normal processing for continuing executing with and being interrupted
Function, it is specially：
The instruction execution module, specifically for performing the exception return instruction, with change program counter value and
The information that be will be pressed into by the stack maintenance module in the abnormal stack eject successively and write it is right in the destination register heap
In the register for answering number, when all information for being pressed into the abnormal stack all eject, the institute for continuing executing with and being interrupted is returned to
State normal processing function.
In above-described embodiment of the application, register protected field is provided with the stack maintenance module and abnormal stack refers to
Pin；
The register protected field is used for the quantity for indicating the destination register heap, and the abnormal stack pointer is used to indicate
The position of the destination register heap.
In the another embodiment of the application, the destination register heap includes：General-purpose register and system control are posted
Storage heap；
The general-purpose register is the combination for being used to preserve the general register of data operation in the processor, described
System control register heap is the combination for being used to preserve the system control register of processor state in the processor.
The application third aspect provides a kind of computer-readable recording medium, is stored thereon with computer program, the journey
The method as described in above-mentioned first aspect is realized when sequence is executed by processor.
The abnormal in-situ FTIR spectroelectrochemitry method, apparatus and computer-readable recording medium, processor that the embodiment of the present application provides are led to
Acquisition exception return instruction is crossed, the exception return instruction includes command code, and the command code is used to indicate computing device to exception
The last item instruction of function is handled, and performs above-mentioned exception return instruction, to change program counter value and will be pressed into different
The information of the destination register heap of normal stack ejects from abnormal stack, and returns to the normal processing function for continuing executing with and being interrupted.The skill
Art scheme does not need software code is live to exception to recover, and reduces software code space-consuming and power consumption, improves place
Manage the execution efficiency of device.
Brief description of the drawings
, below will be to embodiment or existing in order to illustrate more clearly of the embodiment of the present application or technical scheme of the prior art
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are this Shens
Some embodiments please, for those of ordinary skill in the art, without having to pay creative labor, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is the schematic flow sheet for the abnormal in-situ FTIR spectroelectrochemitry embodiment of the method one that the embodiment of the present application provides；
Fig. 2 is that the instruction of processor in the abnormal in-situ FTIR spectroelectrochemitry method that the embodiment of the present application provides performs schematic diagram；
Fig. 3 is the schematic flow sheet for the abnormal in-situ FTIR spectroelectrochemitry embodiment of the method two that the embodiment of the present application provides；
Fig. 4 is the schematic flow sheet for the abnormal in-situ FTIR spectroelectrochemitry embodiment of the method three that the embodiment of the present application provides；
Fig. 5 is the configuration diagram that the normal execution path of processor and abnormal stack are safeguarded in the embodiment of the present application；
Fig. 6 A are the configuration diagram one of abnormal maintenance register in stack maintenance module in embodiment illustrated in fig. 5；
Fig. 6 B are the configuration diagram two of abnormal maintenance register in stack maintenance module in embodiment illustrated in fig. 5；
Fig. 7 is the structural representation for the abnormal onsite rehabilitation devices embodiment one that the embodiment of the present application provides；
Fig. 8 is the structural representation for the abnormal onsite rehabilitation devices embodiment two that the embodiment of the present application provides.
Embodiment
To make the purpose, technical scheme and advantage of the embodiment of the present application clearer, below in conjunction with the embodiment of the present application
In accompanying drawing, the technical scheme in the embodiment of the present application is clearly and completely described, it is clear that described embodiment is
Some embodiments of the present application, rather than whole embodiments.Based on the embodiment in the application, those of ordinary skill in the art
The every other embodiment obtained under the premise of creative work is not made, belong to the scope of the application protection.
At this stage, processor is often called by external event, system when program normally performs or programmed instruction is abnormal
Situations such as interrupt.Come from that system is called and what programmed instruction was abnormal interrupts referred to as common exception, come from interrupting for external event, claim
To interrupt.Once producing exception, processor must be responded most of the time, interrupt normal program flow, and jump to regulation
Entry address go fetching and perform exception handler.After the completion of exception handler execution, then need rebound normal
Program flow continues executing with.
The key of exception handling is that normal program flow can be interrupted and terminate in anomalous event processing in processor
Recover afterwards and correctly perform, this also just needs to carry out abnormal scene protection.Abnormal scene protection refers to hold into anomalous event
Before first instruction of row exception handler, the necessary internal informations such as some register files of processor are preserved, and
When exception handler performs completion and returns again to normal program flow by some register files of the processor preserved before
Information is recovered.
Therefore, when producing anomalous event and entering exception handler, if abnormal live not yet complete preservation, locates
Reason device can not perform exception handler, accordingly, when exception handler returns, if abnormal live not yet completely extensive
Multiple, then processor can not perform continuation normal procedure.
At present, main in the prior art to realize abnormal scene protection and recovery using two ways, i.e. software performs scene
Protection and the more set register files of setting in processor core.
Wherein, software performs scene protection and referred to before exception handler is performed, and passes through the software program of setting
Register file to be protected will be needed to be pressed into abnormal stack, and in the ending of exception handler, then the software program for passing through setting
The register pair that will be pressed into abnormal stack ejects abnormal stack.But there is the problem of more in this mode：Software pop down and bullet stack use
Processor instruction it is too many, take excessive code memory space, processor instruction is too many, causes its execution efficiency very low, need
Want tens bat processor cycles could computing complete, considerably increase abnormality processing time of processor core, power consumption is big.
The method of more set register files is set to refer to every time when entering exception handler, using another in processor core
A set of register file, protection exception scene, this method ultrahigh in efficiency for an independent abnormality processing are not needed then now.Than
Such as, when having individual general register more than 30 in MIPS frameworks, individual general register more than 2 set 30 can be set, perform normal procedure
First set general-purpose register is used during stream, when receiving exception request and entering exception handler, then using another set of logical
Use register file.But this method there is also it is corresponding the problem of：For example, this method is to embedded abnormal (for example interruption) incapability
Power, thus without the average abnormality processing time is reduced, set more set register files to use excessive hardware resource, cause to handle
Device long term voyage, power consumption and cost uprise.
What deserves to be explained is above-mentioned so-called embedded exception refers to that processor core is carrying out an exception handler
When, another exception request is received again, and by that analogy, embedding abnormal level in theory can be infinitely deep.Obviously it is embedded abnormal
It is also required to carry out scene protection every time, the register files that cover after the completion of use more, it is necessary to software carries out scene protection, this
When, it can equally produce above-mentioned software and perform the problem of scene protection is present.
Because the execution time of abnormal scene protection belongs to the part of the whole abnormality processing time of processor, thus,
Abnormal scene protection mechanism in processor largely effects on the time T of one anomalous event of processor average treatmentint, also
Affect the abnormality processing bandwidth (1/T of processorint), and abnormality processing bandwidth has reacted the exception handling ability of processor.
However, many application scenarios have very high requirement to abnormality processing bandwidth.Such as in real time operating system,
It is required that processor quick response and can be handled when receiving the exception request that external equipment is sent, to be controlled in the defined time
Production process processed makes quick response to processing system.Because promptness and reliability are the main spies of real time operating system
Point, therefore, relatively low abnormality processing bandwidth can substantially reduce the promptness and reliability of real time operating system.
In addition, in embedded microcontroller, due to more emphasizing the controlling of processor, processor core can receive a lot
The different types of anomalous event of kind, it is desirable to quick response and processing can be carried out, thus it is very high to abnormality processing bandwidth demand, it is long
The abnormality processing time can reduce its abnormality processing bandwidth.
For processor present in abnormal scene protection in the prior art and restoration methods execution efficiency is low, power consumption is big
The problem of, this application provides a kind of abnormal in-situ FTIR spectroelectrochemitry method, apparatus and computer-readable recording medium, and this is abnormal live extensive
Compound method need not perform software code and carry out scene protection and recovery, reduce the memory space of software code occupancy, improve
The execution efficiency of processor, small power consumption.In addition, this method can also support embedded exception well, average exception is reduced
Processing time, improve the abnormality processing bandwidth of processor core.Below, the technical scheme of the application is entered by specific embodiment
Row describes in detail.
It should be noted that these specific embodiments can be combined with each other below, for same or analogous concept
Or process may repeat no more in certain embodiments.
Fig. 1 is the schematic flow sheet for the abnormal in-situ FTIR spectroelectrochemitry embodiment of the method one that the embodiment of the present application provides.Fig. 2 is this Shen
Please embodiment provide abnormal in-situ FTIR spectroelectrochemitry method in processor instruction perform schematic diagram.The embodiment of the present application combination Fig. 1 and
Fig. 2 is mainly illustrated using processor as executive agent to the abnormal in-situ FTIR spectroelectrochemitry method.As shown in figure 1, the application is implemented
The abnormal in-situ FTIR spectroelectrochemitry method that example provides, may include steps of：
Step 11, exception return instruction is obtained, wherein, the exception return instruction includes command code, and the command code is used to refer to
Show that the last item of computing device to abnormality processing function instructs.
Because the instruction of computing device stores in memory, therefore processor can successively be performed and taken out from memory
Instruction.Thus, in the embodiment of the present application, abnormality processing function corresponding to the exception request that processor receives, corresponding to it
Instruction also preserves in memory, and therefore, processor can the instruction fetch from memory successively when performing the abnormality processing function
And perform successively.
In the embodiment of the present application, in order that processor knows when the execution of abnormality processing function is terminating in time, lead to
Crossing, which increases by one at the end of abnormality processing function, is used to identify the instruction that abnormality processing function terminates, and is defined as abnormal return and refers to
Make (Interrupt Return, INT_RET).For example, referring to shown in Fig. 2, because the sign on of abnormality processing function is
INT_BEG, the END instruction (i.e. exception return instruction) of abnormality processing function is INT_RET, and INT_BEG and abnormal return refer to
Make INT_RET belong to a part for abnormality processing function, therefore this can be got during the above-mentioned abnormality processing function of computing device
Exception return instruction, i.e. processor can get the exception return instruction when going to the end of abnormality processing function.
Optionally, the exception return instruction in the application includes command code, and the exception return instruction is got in processor
When, it can parse to obtain command code therein, by analyzing the command code, determine the command code and the exception of setting
The command code of the last item instruction of reason function is identical, and therefore, the command code can be used to indicate that computing device to exception
Manage the last item instruction of function.
Step 12, above-mentioned exception return instruction is performed, with the target changed program counter value and will be pressed into abnormal stack
The information of register file ejects from abnormal stack, and returns to the normal processing function for continuing executing with and being interrupted.
In the embodiment of the present application, during the above-mentioned exception return instruction of computing device, it will trigger the processor while hold
Following two operations of row.
Specifically, during the above-mentioned exception return instruction of computing device, on the one hand, processor modification programmed counting will be triggered
Device value, it is revised as the PC values of target effective instruction and removes the system control deposit that processor state is preserved in processor
Abnormal identification field on device, the PC values of target effective instruction are for indicating that exception request corresponds to the IA of abnormal point.
For example, in fig. 2, the instruction of abnormal point is instruction i, i.e., changes the program counter value in processor first, make program
Counter points to first instruction of abnormality processing function, secondly performs completion in abnormality processing function, when exception returns, modification
Program counter value in processor, program counter is set to point to the instruction i of normal procedure.What deserves to be explained is abnormality processing
Function preserves the value in the system control register of abnormal point instruction PC values before may changing, so in abnormal return
When, program counter just may not be directed to the instruction i of normal procedure.
So during computing device exception return instruction, show that executed instructs to the last item of abnormality processing function,
I.e. anomalous event corresponding to exception request performs completion, so, the PC values in processor modification processor can be triggered, so that its
The IA of abnormal point corresponding to exception request is pointed to (for example, the instruction i) in Fig. 2, returns to normal processing function, make
Processor enters the execution pattern of normal processing function.
In addition, during the above-mentioned exception return instruction of computing device, on the other hand, triggering processor is responded exception request
The information for being pressed into the destination register heap of abnormal stack before ejects abnormal stack, to recover abnormal live.
What deserves to be explained is the step of triggering processor modification PC values takes the normal execution path of processor, at it
After the completion of, processor, which can continue to take from program counter to instruct corresponding to normal processing function, to be performed；And at triggering
The step of information that reason device will be pressed into the destination register heap of abnormal stack ejects from abnormal stack takes the abnormal stack maintenance in backstage,
The path does not influence the normal execution path of processor, can be in running background.Thus, it will be reduced using exception return instruction
The average abnormality processing time.In addition, this method can also support embedded exception well, the abnormality processing of processor core is improved
Bandwidth, and this method only consumes less hardware resource, it is low in energy consumption.
The abnormal in-situ FTIR spectroelectrochemitry method that the embodiment of the present application provides, by obtaining exception return instruction, the exception, which returns, to be referred to
Order includes command code, and the command code is used to indicate that the last item of computing device to abnormality processing function instructs, and then performs
The exception return instruction, processor modification program counter value can be made and will be pressed into the letter of the destination register heap of abnormal stack
Breath returns to the normal processing function for continuing executing with and being interrupted after the abnormal stack ejection.The technical scheme, utilize abnormal return
The ejection of abnormal stack information is realized in instruction, and it does not need software code is live to exception to recover, and reduces software code and accounts for
With space and power consumption, the execution efficiency of processor is improved.
As a kind of example, Fig. 3 is that the flow for the abnormal in-situ FTIR spectroelectrochemitry embodiment of the method two that the embodiment of the present application provides is shown
It is intended to.The embodiment of the present application is the detailed description to above-mentioned steps 11 on the basis of above-described embodiment.As shown in figure 3, at this
Apply in embodiment, above-mentioned acquisition exception return instruction may include steps of：
Step 31, an instruction is obtained in the memory of storage abnormality processing function.
Specifically, in the embodiment of the present application, processor, will be successively from being stored with exception when performing abnormality processing function
Instruction fetch in the memory of function is handled, and is performed successively in sequence, until all taking and having performed abnormality processing function
Corresponding instruction.
Step 32, the above-mentioned instruction of parsing, obtain the command code in instruction.
Optionally, every instruction of computing device includes command code, and the command code is used to represent that computing device refers to
The position of order or the function of corresponding instruction.In the embodiment of the present application, processor parsing is from being stored with abnormality processing function
The instruction got in memory, the command code in being instructed.Because the command code that every instruction includes is different, therefore,
When processor is by analyzing each command code, it may be determined that go out position, concrete meaning or the function of corresponding instruction.
When step 33, the command code in above-mentioned instruction are consistent with the command code of default exception return instruction, it is determined that should
Instruct as exception return instruction.
Optionally, designer by set different command codes define instruction, therefore, when processor get it is above-mentioned
During command code in instruction, the command code can be analyzed, and then what instruction the instruction for determining to get is specifically.If
Judge that the command code in the instruction is identical with the command code of default exception return instruction in processor, then can determine that the instruction
For exception handling instruction, that is, think that computing device has arrived the last item instruction of abnormality processing function, determine the abnormality processing
Function performs completion.Thus, processor can trigger processor modification programmed counting in the subsequent execution exception return instruction
Device value, it is set to point to the normal processing function of abnormal point, while in the bullet stack for carrying out abnormal stack automatically from the background, to recover different
Often scene.
The abnormal in-situ FTIR spectroelectrochemitry method that the embodiment of the present application provides, by being obtained in the memory of storage abnormality processing function
Take an instruction, parse the instruction, can get the command code in the instruction, so the command code in the instruction with it is default
When the command code of exception return instruction is consistent, it is exception return instruction that can determine the instruction.The technical scheme is abnormal by inciting somebody to action
Return instruction is arranged on the end of abnormality processing function, thus when computing device is to the exception return instruction, it is determined that abnormal
Processing function performs completions, can trigger processor and changes program counter value and to the destination register heap of the abnormal stack of press-in
Information carries out playing stack processing, is laid a good foundation to shorten the average abnormality processing time of processor.
Optionally, on the basis of above-described embodiment, Fig. 4 is that the abnormal in-situ FTIR spectroelectrochemitry method that the embodiment of the present application provides is real
Apply the schematic flow sheet of example three.As shown in figure 4, in the embodiment of the present application, before above-mentioned steps 11, that is, obtaining abnormal return
Before referring to order, the abnormal in-situ FTIR spectroelectrochemitry method of the embodiment of the present application offer, also comprise the following steps：
Step 41, when getting exception request, interrupt the normal processing function being carrying out.
If processor during normal processing function is performed, is called by external event, system or programmed instruction is abnormal
Interrupted Deng anomaly source, that is, anomaly source have issued exception request, therefore processor can get the exception request.Moreover,
For processor when getting the exception request, just pause performs the normal processing function being carrying out, that is, interrupts normal processing letter
Several execution.
Step 42, the abnormal stack of information press-in that will normally handle in destination register heap corresponding to function, and turn to execution
Abnormality processing function corresponding to exception request.
Can return to ensure processor after abnormality processing function corresponding to exception request has been performed continue executing with by
The normal processing function interrupted, in the processor response exception request, and performs abnormality processing function corresponding to the exception request
Before, not only need to protect to extremely live, that is, need that normal processing function corresponding informance will be preserved in processor
Information in destination register heap is preserved, and it needs to be determined that goes out the target effective instruction of abnormal point, by the target
Program counter value is stored in the system control register of processor corresponding to effective instruction, while within a processor at preservation
Manage and put abnormal identification field on the system control register of device state, the abnormal identification field is used to indicate that processor is in abnormal mould
Formula, in addition, also to change program counter (program counter, PC) value in processor, point to program counter different
Often first instruction of abnormality processing function corresponding to request, so that processor, which turns to, performs the abnormality processing function.
In embodiments herein, in order to solve computing device efficiency existing for Software thread protection in the prior art
Low, the problem of power consumption is big, by being extended to the function of processor, target corresponding to function will be normally handled using processor
Information in register file carries out press process.
Specifically, shown in reference picture 2, when processor gets exception request, will pass through processor will normally handle letter
Information in destination register heap corresponding to number is pressed into abnormal stack and preserved, and then changes the program counter in processor
Value, turn to and perform abnormality processing function corresponding to exception request.
The abnormal in-situ FTIR spectroelectrochemitry method that the embodiment of the present application provides, before exception return instruction is obtained, and is getting
During exception request, the normal processing function being carrying out is interrupted, and by destination register heap corresponding to normal processing function
Information is pressed into abnormal stack, is subsequently diverted to perform abnormality processing function corresponding to exception request, so for subsequently through performing exception
Return instruction realizes that the press process of information in destination register heap is laid a good foundation.
As a kind of example, in above-described embodiment of the application, stack maintenance module is provided with above-mentioned processor, is being located
When reason device gets exception request, the stack maintenance module can be utilized to the letter in destination register corresponding to normal processing function
Breath carries out pop down and plays stack processing.
Specifically, in above-mentioned steps 42, the information in the destination register heap corresponding to normal processing function is pressed into
The abnormal stack, can be achieved by the steps of：
Information in destination register heap corresponding to normal processing function is pressed into by abnormal stack by the stack maintenance module.
Accordingly, above-mentioned steps 12, that is, above-mentioned exception return instruction is performed, to change program counter value and will be pressed into
The information of the destination register heap of abnormal stack ejects from abnormal stack, and return continue executing with the normal processing function that is interrupted can be with
It is achieved by the steps of：
Above-mentioned exception return instruction is performed, to change program counter value and will be pressed into exception by the stack maintenance module
Information in stack is ejected and write in destination register heap in the register for corresponding to number successively, and in the institute for being pressed into abnormal stack
When having information whole ejection, the normal processing function for continuing executing with and being interrupted is returned.
Specifically, in the embodiment of the present application, processor is when performing exception return instruction, the abnormal stack of stack maintenance module
Safeguard and actually performed on backstage.Processor often plays stack once, and the information of ejection is write into general-purpose register or system controls
In the register of the corresponding number of register, accordingly, abnormal stack pointer subtracts one, is played stack next time, until it is all it
The information of the destination register of preceding preservation all ejects.
In embodiments herein, because the abnormal stack of stack maintenance module is maintained in what is performed on backstage, thus now
Think that processor is carrying out one section of program.If processor is carrying out a certain instruction, but the source behaviour that the instruction needs
Count and be not yet ejected, then the streamline of processor can pause until the source operand needed is ejected, and the instruction just may proceed to
Perform, this process is ensured by hardware, to software-transparent.
Illustrated below by specific implementation of the specific example to stack maintenance module in processor.
Optionally, Fig. 5 is the framework signal that the normal execution path of processor and abnormal stack are safeguarded in the embodiment of the present application
Figure.Fig. 6 A are the configuration diagram one of abnormal maintenance register in stack maintenance module in embodiment illustrated in fig. 5.Fig. 6 B are Fig. 5 institutes
Show the configuration diagram two of abnormal maintenance register in stack maintenance module in embodiment.In reference picture 1 and embodiment illustrated in fig. 4
Analyze and combine and understood shown in Fig. 5, stack maintenance module is provided with processor.As a kind of implementation example, the stack maintenance module
In be provided with register protected field and abnormal stack pointer, the register protected field is used to indicate the number of above-mentioned destination register heap
Amount, the abnormal stack pointer are used for the position for indicating destination register heap.
Optionally, in embodiment is applied for, above-mentioned destination register heap includes：General-purpose register and system control deposit
Device heap.
Wherein, the general-purpose register is for the combination for the general register for preserving data operation, system in processor
Control register heap is the combination for being used to preserve the system control register of processor state in processor.
Specifically, general register is the register for participating in preserving operational data in processor, the source operation typically instructed
Belong to general register with purpose operation note.System control register heap is the register for preserving processor state,
Such as no matter processor is to be in User space, or kernel mode, the domain for having corresponding system control register indicate.Entering
During the abnormal scene protection of row, most of or even whole general registers are required for protecting, a small number of even zero system control deposits
Device is needed to protect, and it is determined according to the framework of processor.
For example, as shown in figure 5, stack maintenance module includes abnormal maintenance register (INT_SP), the abnormal maintenance is posted
The composition of storage is as shown in fig. 6 a or 6b.Fig. 6 A are exemplary provide be abnormal maintenance register in 32 bit processors group
Into, Fig. 6 B it is exemplary provide be abnormal maintenance register in 64 bit processors composition.As shown in Figure 6 A and 6 B, processor
A high position (Interrupt_SP, i.e. I_SP) for middle abnormal maintenance register is a high position for abnormal stack pointer, and the abnormal stack pointer is used
In the position of instruction destination register heap, the low level of abnormal maintenance register mends 0, is defined as register protected field (Protect_
Num), the register protected field is used for the quantity for indicating destination register heap.
For example, referring to shown in Fig. 6 A, in the abnormal maintenance register of 32 bit processors, register protected field takes low 2
Position, now abnormal stack pointer is { I_SP, 2 ' b00 }, wherein, 2 ' b00 represent that the position of low 2 bit mends 0, for representing abnormal existing
Field needs register count to be protected.
Optionally, table 1 is the explanation of the register protected field of abnormal maintenance register in 32 bit processors.As shown in table 1,
Register protected field is 0x0, represents that stack maintenance module does not safeguard any register, is equivalent to and is not turned on abnormal stack maintenance mechanism；
Register protected field is 0x1, represents that stack maintenance module safeguards preceding 8 general registers in register file；Register protected field
For 0x2, represent that stack maintenance module safeguards preceding 16 general registers in register file；Register protected field is 0x3, represents stack
Maintenance module safeguards preceding 32 general registers in register file.
Table 1
| Register protected field | Explanation |
| 0x0 | Any register is not safeguarded, it is equivalent to be not turned on abnormal stack maintenance mechanism |
| 0x1 | Safeguard preceding 8 general registers in register file |
| 0x2 | Safeguard preceding 16 general registers in register file |
| 0x3 | Safeguard preceding 32 general registers in register file |
Similarly, shown in reference picture 6B, in the abnormal maintenance register of 64 bit processors, register protected field takes low 3
Position, now abnormal stack pointer is { I_SP, 3 ' b000 }, wherein, 3 ' b000 represent that the position of low 3 bit mends 0, for representing abnormal
Scene needs register count to be protected.
What deserves to be explained is in the embodiment of the present application, maintenance quantity and position for system control register, depend on
In the framework of processor, the quantity for the system control register for needing to safeguard herein for stack maintenance module and position are no longer superfluous
State.
Shown in reference picture 5, processor includes two paths, and one is normal execution path, and it is mainly used in performing just
Often processing function, another is abnormal stack maintenance, and it is mainly used in recover live to exception when occurring abnormal.Should
The configuration diagram of Fig. 5 displayings is the universal stand composition of processor processing anomalous event, is compared with generality.
Specifically, as shown in figure 5, when processor normally performs, instruction is obtained first, and using decoding unit to getting
Instruction decoded, and then directly performed using execution unit, such as, participate in computing using arithmetic element, and utilize physics
Register file preserves the data for participating in computing or the state for preserving processor, and is visited by being realized between memory access unit and memory
Deposit operation.
Optionally, configuration diagram shown in Fig. 5, renaming unit, transmitter unit, reorder queue and memory access are also included
Correlation unit etc..I.e. when processor is the framework of Out-of-order execution, also include renaming unit, transmitter unit, reorder team
Row etc..Wherein, renaming unit is to solve the problems, such as reversely to rely on, and to carry out renaming processing during Out-of-order execution.Order again
Name processing corresponds to the register number (being referred to as " logic register ") described in program in physical register number.Each instruction
The logic register of write-in result must be assigned on the physical register of free time.Transmitter unit can incite somebody to action in a cycle
A plurality of instruction issue is to execution unit.Reorder queue is used for the instruction to be performed processor carry out order adjustment, to reach
The purpose of Out-of-order execution.Memory access correlation unit can write the result of look-up command in corresponding internal memory.
What deserves to be explained is the processor of above-mentioned renaming unit, transmitter unit, reorder queue for non-Out-of-order execution
And need not.
Optionally, as shown in figure 5, after processor gets exception request, processor equally obtains from memory
Instruction, and decoded using decoding unit, but processor utilizes stack maintenance module to destination register in physical register file
After the information of heap carries out pop down, then abnormality processing function is performed, finally after the completion of abnormality processing function execution, recycle stack dimension
The information for the destination register heap that shield module will be pressed into abnormal stack carries out playing stack processing.
Reference picture 5 understands that abnormal stack is located in memory, thus when abnormal stack maintenance module is to abnormal stack addressing at multiplexing
The memory access interface of device is managed, therefore unnecessary memory access resource need not be increased newly, it is low in energy consumption.
Optionally, the abnormal maintenance register (INT_SP) in stack maintenance module can use a system control register
Realize, in fact, a general register can also be used to realize that it can be set according to actual conditions, the application is implemented
Example is simultaneously not limited thereof.Optionally, the embodiment of the present application can be configured using various ways to abnormal stack pointer, and
And in the abnormal maintenance register of setting, the register protected field of setting allows processor to select which is protected deposit
Device, register protected field can have a variety of allocative decisions, and possibly even without the domain, it is (such as silent not give software right to choose
Recognize protection all general registers and necessary system control register etc.).
Following is the application device embodiment, can be used for performing the application embodiment of the method.It is real for the application device
The details not disclosed in example is applied, refer to the application embodiment of the method.
Fig. 7 is the structural representation for the abnormal onsite rehabilitation devices embodiment one that the embodiment of the present application provides.Such as Fig. 7 institutes
Show, the abnormal onsite rehabilitation devices of the present embodiment can include：Instruction acquisition module 71 and instruction execution module 72.
Wherein, the instruction acquisition module 71, for obtaining exception return instruction, the exception return instruction includes command code,
The command code is used to indicate that the last item of computing device to abnormality processing function instructs.
The instruction execution module 72, for performing exception return instruction, to change program counter value and will be pressed into different
The information of the destination register heap of normal stack ejects from abnormal stack, and returns to the normal processing function for continuing executing with and being interrupted.
Abnormal onsite rehabilitation devices in the present embodiment can be used for the implementation for performing embodiment of the method shown in Fig. 1, tool
Body implementation is similar with technique effect, repeats no more here.
Optionally, in the above-described embodiments, above-mentioned instruction acquisition module 71, for obtaining exception return instruction, it is specially：
The instruction acquisition module 71, specifically for obtaining a finger in the memory for storing the abnormality processing function
Order, parses the instruction, obtains the command code in the instruction, command code in the instruction is returned with the default exception
Refer to order command code it is consistent when, determine it is described instruction be the exception return instruction.
Optionally, on the basis of above-described embodiment, Fig. 8 is that the abnormal onsite rehabilitation devices that the embodiment of the present application provides are real
Apply the structural representation of example two.As shown in figure 8, the abnormal onsite rehabilitation devices of the present embodiment can also include：Processing module 81.
The processing module 81, in the instruction acquisition module 71 before exception return instruction is obtained, when getting
During exception request, the normal processing function being carrying out is interrupted, the target corresponding to the normal processing function is posted
Information in storage heap is pressed into the abnormal stack, and turns to and perform abnormality processing function corresponding to the exception request.
Further, on the basis of above-described embodiment, stack maintenance module is provided with the processor.
Above-mentioned processing module 81, for by the information pressure in the destination register heap corresponding to the normal processing function
Enter the abnormal stack, be specially：
Above-mentioned processing module 81, it is described corresponding to function specifically for described will normally be handled by the stack maintenance module
Information in destination register heap is pressed into the abnormal stack.
Accordingly, above-mentioned instruction execution module 72, for performing the exception return instruction, to change program counter value
And will be pressed into abnormal stack destination register heap information after the abnormal stack ejection, and return and continue executing with what is be interrupted
Normal processing function, it is specially：
Above-mentioned instruction execution module 72, specifically for performing the exception return instruction, with change program counter value with
And the information that be will be pressed into by the stack maintenance module in the abnormal stack is ejected and write in the destination register heap successively
In the register of corresponding number, when all information for being pressed into the abnormal stack all eject, return continues executing with what is be interrupted
The normal processing function.
In above-described embodiment of the application, register protected field is provided with above-mentioned stack maintenance module and abnormal stack refers to
Pin.
Wherein, the register protected field is used for the quantity for indicating the destination register heap, and the abnormal stack pointer is used
In the position for indicating the destination register heap.
As a kind of example, in the above-described embodiments, above-mentioned destination register heap includes：General-purpose register and system control
Register file processed.
Wherein, general-purpose register is the combination for being used to preserve the general register of data operation in the processor, is
System control register heap is the combination for being used to preserve the system control register of processor state in the processor.
The abnormal onsite rehabilitation devices that the embodiment of the present application provides, performing normal processing function pair using stack maintenance module should
The stacking of information in destination register heap and bullet stack, and referred to when playing stack using abnormal return at abnormality processing function end
Order is triggered, it is not necessary to which software code carries out scene protection, reduces code space and power consumption, solves in abnormal live guarantor
In shield, the problem of code redundancy or hardware resource consumption of prior art are excessive, power consumption is bigger than normal, execution efficiency is low, in addition,
The technical program can also support embedded interruption well, reduce average interrupt processing time, improve in processor core
Disconnected process bandwidth.
The embodiment of the present application provides a kind of computer equipment, including processor, memory and is stored on the memory
And the computer program that can be run on a processor, abnormal in-situ FTIR spectroelectrochemitry as described above is realized during the computing device described program
The technical scheme of embodiment of the method.
The embodiment of the present application provides a kind of computer-readable recording medium, is stored thereon with computer program, described program
The technical scheme of abnormal in-situ FTIR spectroelectrochemitry embodiment of the method as described above is realized when being executed by processor.
One of ordinary skill in the art will appreciate that：Realizing all or part of step of above-mentioned each method embodiment can lead to
The related hardware of programmed instruction is crossed to complete.Foregoing program can be stored in a computer read/write memory medium.The journey
Sequence upon execution, execution the step of including above-mentioned each method embodiment；And foregoing storage medium includes：ROM, RAM, magnetic disc or
Person's CD etc. is various can be with the medium of store program codes.
Finally it should be noted that：Various embodiments above is only to illustrate the technical scheme of the application, rather than its limitations；To the greatest extent
The application is described in detail with reference to foregoing embodiments for pipe, it will be understood by those within the art that：Its according to
The technical scheme described in foregoing embodiments can so be modified, either which part or all technical characteristic are entered
Row equivalent substitution；And these modifications or replacement, the essence of appropriate technical solution is departed from each embodiment technology of the application
The scope of scheme.
Claims (13)
- A kind of 1. abnormal in-situ FTIR spectroelectrochemitry method, it is characterised in that including：Exception return instruction is obtained, the exception return instruction includes command code, and the command code is used to indicate computing device The last item to abnormality processing function instructs；Perform the exception return instruction, with change program counter value and will be pressed into abnormal stack destination register heap letter Breath ejects from the abnormal stack, and returns to the normal processing function for continuing executing with and being interrupted.
- 2. according to the method for claim 1, it is characterised in that the acquisition exception return instruction, including：An instruction is obtained in the memory for storing the abnormality processing function；The instruction is parsed, obtains the command code in the instruction；When command code in the instruction is consistent with the command code of the default exception return instruction, determine that the instruction is The exception return instruction.
- 3. method according to claim 1 or 2, it is characterised in that before the acquisition exception return instruction, also wrap Include：When getting exception request, the normal processing function being carrying out is interrupted；Information in the destination register heap corresponding to the normal processing function is pressed into the abnormal stack, and turns to execution Abnormality processing function corresponding to the exception request.
- 4. according to the method for claim 3, it is characterised in that stack maintenance module is provided with the processor；The information by the destination register heap corresponding to the normal processing function is pressed into the abnormal stack, including：Information in the destination register heap corresponding to the normal processing function is pressed into by institute by the stack maintenance module State abnormal stack；It is described to perform the exception return instruction, with the destination register heap changed program counter value and will be pressed into abnormal stack Information ejected from the abnormal stack, and return to the normal processing function for continuing executing with and being interrupted, including：The exception return instruction is performed, to change program counter value and will be pressed into by the stack maintenance module described different Information in normal stack is ejected and write in the destination register heap in the register for corresponding to number successively；When all information for being pressed into the abnormal stack all eject, the normal processing letter for continuing executing with and being interrupted is returned Number.
- 5. according to the method for claim 4, it is characterised in that be provided with the stack maintenance module register protected field and Abnormal stack pointer；The register protected field is used for the quantity for indicating the destination register heap, and the abnormal stack pointer is described for indicating The position of destination register heap.
- 6. method according to claim 1 or 2, it is characterised in that the destination register heap includes：General-purpose register With system control register heap；The general-purpose register is for the combination for the general register for preserving data operation, the system in the processor Control register heap is the combination for being used to preserve the system control register of processor state in the processor.
- A kind of 7. abnormal onsite rehabilitation devices, it is characterised in that including：Instruction acquisition module, for obtaining exception return instruction, the exception return instruction includes command code, and the command code is used Instructed in the last item of instruction computing device to abnormality processing function；Execution module is instructed, for performing the exception return instruction, to change program counter value and will be pressed into abnormal stack The information of destination register heap ejected from the abnormal stack, and return to the normal processing function for continuing executing with and being interrupted.
- 8. device according to claim 7, it is characterised in that the instruction acquisition module, refer to for obtaining abnormal return Order, it is specially：The instruction acquisition module, specifically for obtaining an instruction, solution in the memory for storing the abnormality processing function The instruction is analysed, obtains the command code in the instruction, command code in the instruction refers to default abnormal return When the command code of order is consistent, determine that the instruction is the exception return instruction.
- 9. the device according to claim 7 or 8, it is characterised in that also include：Processing module；The processing module, for before exception return instruction is obtained, being asked in the instruction acquisition module when getting exception When asking, the normal processing function being carrying out is interrupted, by the destination register heap corresponding to the normal processing function In information be pressed into the abnormal stack, and turn to and perform abnormality processing function corresponding to the exception request.
- 10. device according to claim 9, it is characterised in that stack maintenance module is provided with the processor；The processing module, for by described in the information press-in in the destination register heap corresponding to the normal processing function Abnormal stack, it is specially：The processing module, specifically for being posted the target corresponding to the normal processing function by the stack maintenance module Information in storage heap is pressed into the abnormal stack；The instruction execution module, for performing the exception return instruction, to change program counter value and will be pressed into different The information of the destination register heap of normal stack returns to the normal processing letter for continuing executing with and being interrupted after the abnormal stack ejection Number, it is specially：The instruction execution module, specifically for performing the exception return instruction, to change program counter value and pass through The information that the stack maintenance module will be pressed into the abnormal stack ejects and writes correspondence number in the destination register heap successively In the register of code, when all information for being pressed into the abnormal stack all eject, return continue executing be interrupted it is described just Often processing function.
- 11. device according to claim 10, it is characterised in that be provided with register protected field in the stack maintenance module With abnormal stack pointer；The register protected field is used for the quantity for indicating the destination register heap, and the abnormal stack pointer is described for indicating The position of destination register heap.
- 12. the device according to claim 7 or 8, it is characterised in that the destination register heap includes：General register Heap and system control register heap；The general-purpose register is for the combination for the general register for preserving data operation, the system in the processor Control register heap is the combination for being used to preserve the system control register of processor state in the processor.
- 13. a kind of computer-readable recording medium, is stored thereon with computer program, it is characterised in that described program is processed The method as described in above-mentioned any one of claim 1-6 is realized when device performs.
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