CN107423244B - A kind of flexible configuration device and its implementation being multiplexed function pin - Google Patents
A kind of flexible configuration device and its implementation being multiplexed function pin Download PDFInfo
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- CN107423244B CN107423244B CN201710284911.5A CN201710284911A CN107423244B CN 107423244 B CN107423244 B CN 107423244B CN 201710284911 A CN201710284911 A CN 201710284911A CN 107423244 B CN107423244 B CN 107423244B
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
- H03K19/017536—Interface arrangements using opto-electronic devices
Abstract
The invention discloses a kind of flexible configuration devices and its implementation for being multiplexed function pin, described device includes level setup module and isolation module, level setup module is used to complete the configuration of hardware configuration signal, including resistance R1, R2 and switching device SW1, resistance R1 and R2 are connected in series between power supply and multiplexing function pin, the end resistance R1 connects to power supply, the end resistance R2 is connect with multiplexing function pin, one end of switching device SW1 is connect with ground, the other end is connect with the junction of resistance R1 and R2, isolation module is switching device SW2, one end is connect with the junction of multiplexing function pin and resistance R2, the other end is connect with opposite end device.The present invention solves the problems, such as that chip commissioning and maintenance are inconvenient, while keeping versatility of the multiplexing function pin as GPIO when unrestricted using the combinational circuit of the level configuration module of two resistance and a switch composition and the isolation module of a switch composition.
Description
Technical field
The present invention relates to chip application design fields, and in particular to it is a kind of be multiplexed function pin flexible configuration device and its
Implementation method.
Background technique
It is common, processor chips (such as CPU, MCU, DSP) after electrification reset, system there are two types of mode can choose into
Enter: first: personal code work mode starts to move personal code work, then by personal code work control processor chip operation；The
Two: commissioning mode, the most commonly used is connected by JTAG (Joint Test Action Group, combined testing action group) interface
Connect the commissioning software interactive after emulator with host computer, and the code control processor chip work by running on commissioning software
Make.As the processing capacity of processor chips constantly increases, the function of realization becomes increasingly complex, and deposits to storage personal code work
Storage space requirement is also increasing, and more and more processor chips store personal code work using external storage chip, and
For flexible design, the interface that processor chips receive personal code work usually has multiple selections.It thus relates in system
When starting, the interface selection of personal code work is moved.
Hardware configuration signal is to be matched during processor chips electrification reset by what the level state on pin obtained
Confidence breath, mainly configuration chip selection system enter any mode and which interface to move code by, and initial
The parameters such as change system phase-locked loop frequency.GPIO (General Purpose Input Output, universal input/output interface) is
The common pin signal of processor chips is the signal that flexibly can be defined and be controlled by personal code work.With processor chips
Pin resource is more and more nervous, and the use of hardware configuration signal and GPIO signal does not conflict, and hardware configuration signal is often
It is multiplexed with GPIO mouthfuls, that is, shares a chip pin, this kind of pin is then referred to as multiplexing function pin.Concrete implementation is as follows,
When processor chips are in reset state, it is desirable that the pin of above-mentioned multiplexing function is used as hardware configuration signal to use at this time, when outer
The reset signal in portion jumps, and when releasing chip reset state, the latch built in processor chips is triggered in this hopping edge, by hardware
The state latch of configuration signal is lived, it is, the state of above-mentioned multiplexing function pin no longer influences after releasing chip reset state
Hardware configuration information.Into after personal code work, then it can be used as normal GPIO mouthfuls of use.
In existing design, hardware configuration signal is configured most commonly by the directly upper drop-down of non-essential resistance, is passed through
The purpose of reserved NC resistance position, the pattern switching needed when reaching commissioning, configuration modification, but this simple reservation operations
Will lead to inconvenience when system function commissioning and later product are safeguarded, such as enter each time commissioning Pattern localization problem or
Changing a hardware configuration parameter will be by soldering iron come welding kesistance, other than causing debugging and testing personnel's orientation problem inconvenient, frequency
Numerous welding can also make Pad off etc. on plate, reduce the yields of product.Another situation, in order to avoid above scheme
Inconvenience, conditional system will increase logic chip such as CPLD, and (ComplexProgrammable Logic Device is answered
Miscellaneous programmable logic device) come realize configuration hardware configuration information function and connection expanding GPIO message number, this scheme without
It doubts and increases cost, power consumption, PCB layout area, complexity of system etc., make succinctly being restricted for system, in addition, in order to keep away
The opposite end device for exempting from above-mentioned multiplexing function pin generates uncertain influence during processor chips latch configuration information, it is desirable that
Opposite end device necessarily is in high-impedance state in the process, or does not directly connect opposite end device, then limits above-mentioned multiplexing function
Versatility when pin is as GPIO.
Summary of the invention
The purpose of the present invention is in view of the above shortcomings of the prior art, provide a kind of flexible configuration of multiplexing function pin
Device and its implementation, the device solve in processor chips existing design in the case where not increasing system complexity
The problem of caused commissioning and later maintenance inconvenience, while making versatility of the multiplexing function pin as GPIO when unrestricted
System.
The purpose of the present invention can be achieved through the following technical solutions:
A kind of flexible configuration device being multiplexed function pin, including level setup module and isolation module, the level are set
Module is set for completing the configuration of hardware configuration signal, including resistance R1, resistance R2 and a switching device SW1, the electricity
Resistance R1 and resistance R2 be connected in series between power supply and multiplexing function pin, the end resistance R1 connects to power supply, the end resistance R2 with answer
It is connected with function pin, one end of the switching device SW1 is connect with ground, the junction of the other end and resistance R1 and resistance R2
Connection, the isolation module are that a switching device SW2 is kept away during being multiplexed function pin as hardware configuration signal
The uncertain driving condition for exempting from opposite end device influences, and determines that the Configuration Values of hardware configuration signal by level setup module completely,
One end of the switching device SW2 is connect with the junction of multiplexing function pin and resistance R2, and the other end is connect with opposite end device.
Further, the Standard resistance range of the resistance R1 is 1K Ω -4.7K Ω, and the Standard resistance range of resistance R2 is 1K Ω -
4.7KΩ。
Further, the on off operating mode switching of the switching device SW1 is controlled by control signal CTL1, the switching device
The on off operating mode switching of SW2 is controlled by control signal CTL2.
Further, the switching device SW1 is mechanical switch, and such as toggle switch, corresponding control signal CTL1 is
It manually controls；Or be electronic switch, such as MOS transistor device, optocoupler, corresponding control signal CTL1 is level letter
Number.
Further, the switching device SW2 is electronic switch, such as MOS transistor device, optocoupler, corresponding control
Signal CTL2 processed is level signal.
A kind of implementation method of above-mentioned flexible configuration device for being multiplexed function pin, comprising the following steps:
1) before processor chips normally power on, control signal CTL1 setting switching device SW1 is off-state, in this shape
Under state, multiplexing function pin signal is pulled upward to high level by resistance R1 and resistance R2 series connection；
2) after processor chips completion powers on, hardware reset signal is state of claiming, control signal CTL2 and processor core
The hardware reset signal of piece is same level state, and the switching device SW2 of this level state control isolation module is in and disconnects
State, the connection of isolation and opposite end device, avoids the influence driven by force by opposite end device；
3) after the hardware reset signal of processor chips is maintained at the state of claiming for a period of time, hardware reset signal switching
For release conditions, level signal changes, and the jump triggering of generation is latched on pin along processor chips Internal latches
Level information, and the monitoring to above-mentioned multiplexing function pin level state is discharged, control signal CTL2 delay follows hardware reset
Signal realizes the overturning of level, and the level state control isolation module switching device SW2 after overturning is in closed state, so that on
Multiplexing function pin is stated to connect with opposite end device；
4) it is closed state that control signal CTL1, which resets switching device SW1, in this state, is multiplexed function pin
2) and step 3) signal then passes through resistance R2 and switching device SW1 pulls down to low level, re-execute the steps, then processor chips
Hardware configuration information change.
Further, in step 3), the time that the hardware reset signal of processor chips is maintained at the state of claiming is
100ms。
Compared with the prior art, the invention has the following advantages and beneficial effects:
1, the present invention switchs composition with one by using the level configuration module of two resistance and a switch composition
The combinational circuit of isolation module has reached controllable, has been configured flexibly pull down resistor especially by segmentation and bypass resistance means
Effect, not only facilitate system comissioning and later maintenance work implementation, the cost, power consumption, PCB cloth of system will not be caused
Situation product is obviously increased with complexity.
2, the present invention is come using the isolation module of a switch composition especially by the reset signal that processor chips carry
Control switch, to reach the influence of isolation opposite end component and the normal two-way interactive when GPIO when realizing hardware configuration
Intelligent transition effect, the limitation of versatility when avoiding to above-mentioned multiplexing function pin as GPIO.
Detailed description of the invention
Fig. 1 is the flexible configuration device principle block diagram of the multiplexing function pin of the embodiment of the present invention.
Fig. 2 is the example circuit diagram of the flexible configuration device of the multiplexing function pin of the embodiment of the present invention.
Specific embodiment
Present invention will now be described in further detail with reference to the embodiments and the accompanying drawings, but embodiments of the present invention are unlimited
In this.
Embodiment:
As shown in Figure 1, present embodiments providing a kind of flexible configuration device of multiplexing function pin, which includes level
Setup module and isolation module, the level setup module are used to complete the configuration of hardware configuration signal, including resistance R1, resistance
R2 and switching device SW1, the resistance R1 and resistance R2 are connected in series between power supply and multiplexing function pin, resistance
The end R1 connects to power supply, and the end resistance R2 is connect with multiplexing function pin, and one end of the switching device SW1 is connect with ground, separately
One end is connect with the junction of resistance R1 and resistance R2, and the isolation module is a switching device SW2, in multiplexing function pin
During as hardware configuration signal, avoids the uncertain driving condition of opposite end device from influencing, make matching for hardware configuration signal
It sets value to be determined by level setup module completely, one end of the switching device SW2 and the connection of multiplexing function pin and resistance R2
Place's connection, the other end are connect with opposite end device.
As shown in Fig. 2, using the processor chips of above-mentioned multiplexing function pin for the dsp chip of TI company, model
TCI6638K2KBAAW2；The resistance value of two resistance R1 and R2 in level setup module are all 1k Ω, and device SW1 is Omron
Toggle switch AH6-4102；Switching device SW2 in isolation module is the TS5A3157DBVR chip of TI company,
The switching logic of TS5A3157DBVR chip is that when IN1 is high level, COM1 connects with NO1 pin；When IN1 is low level,
COM1 is disconnected with NO1 pin.The pin PIN_D29 of TCI6638K2KBAAW2 is above-mentioned multiplexing function pin, in DSP_
The rising edge of POR_RESET_N latches bootmode configuration information, as GPIO mouthfuls of uses after running into personal code work.
DSP_RESETSTAT_N is reset initialization completion status flag bit, should when TCI6638K2KBAAW2 is in reset state
Signal is low level, and after DSP_POR_RESET_N jump is high level 10ms, which is jumped as high level, claims processor
Chip initiation configuration is completed.Under normal logic, DSP_RESETSTAT_N and DSP_POR_RESET_N form delay and follow pass
System.
The implementation method of the flexible configuration device of above-mentioned multiplexing function pin the following steps are included:
Step 1: toggle switch SW1 is pushed off-state, this state before processor chips normal electrification reset
Under, pin signal then passes through two resistance value 1k Ω and is connected in series to 1.8V, i.e. DSP_GPIO2_BOOTMODE1 is arranged to 1；
Step 2:, into electrification reset process, DSP_POR_RESET_N is in low electricity after processor chips normally power on
Flat, DSP_RESETSTAT_N exports low level by processor chips at this time, and inputs as the IN1 of TS5A3157DBVR, so that
DSP_GPIO2_BOOTMODE1 signal and DSP_GPIO2_TO_FPGA signal disconnect.
Step 3: DSP_POR_RESET_N is jumped after keeping low level 100ms as high level, the rising edge triggering of generation
Processor chips Internal latches latch BOOTMODE1's is configured to 1, and discharges the monitoring to DSP_GPIO2_BOOTMODE1,
After 10ms, processor chips initial configuration is completed, and DSP_RESETSTAT_N exports high level, and as TS5A3157DBVR
IN1 input so that DSP_GPIO2_BOOTMODE1 signal is connect with DSP_GPIO2_TO_FPGA signal；
Step 4: being configured to 0 to change BOOTMODE1, then toggle switch SW1 is pushed into closed state, this shape
Under state, pin signal then passes through resistance 1k Ω and pulls down to GND, re-execute the steps two and step 3, then processor chips is hard
Part configuration BOOTMODE1 will be configured as 0.
The above, only the invention patent preferred embodiment, but the scope of protection of the patent of the present invention is not limited to
This, anyone skilled in the art is in the range disclosed in the invention patent, according to the present invention the skill of patent
Art scheme and its patent of invention design are subject to equivalent substitution or change, belong to the scope of protection of the patent of the present invention.
Claims (7)
1. a kind of flexible configuration device for being multiplexed function pin, it is characterised in that: including level setup module and isolation module, institute
Level setup module is stated for completing the configuration of hardware configuration signal, including resistance R1, resistance R2 and a switching device
SW1, the resistance R1 and resistance R2 are connected in series between power supply and multiplexing function pin, and the end resistance R1 connects to power supply, electricity
The resistance end R2 is connect with multiplexing function pin, and one end of the switching device SW1 is connect with ground, the other end and resistance R1 and resistance
The junction of R2 connects, and the isolation module is a switching device SW2, in multiplexing function pin as hardware configuration signal
In the process, avoiding the uncertain driving condition of opposite end device influences, and the Configuration Values of hardware configuration signal are arranged by level completely
Module determines that one end of the switching device SW2 is connect with the junction of multiplexing function pin and resistance R2, the other end and opposite end
Device connection.
2. a kind of flexible configuration device for being multiplexed function pin according to claim 1, it is characterised in that: the resistance R1
Standard resistance range be 1K Ω -4.7K Ω, the Standard resistance range of resistance R2 is 1K Ω -4.7K Ω.
3. a kind of flexible configuration device for being multiplexed function pin according to claim 1, it is characterised in that: the derailing switch
The on off operating mode switching of part SW1 is controlled by control signal CTL1, and the on off operating mode of the switching device SW2 switches by control signal
CTL2 control.
4. a kind of flexible configuration device for being multiplexed function pin according to claim 1, it is characterised in that: the derailing switch
Part SW1 is mechanical switch, and corresponding control signal CTL1 is to manually control；Or be electronic switch, corresponding control letter
Number CTL1 is level signal.
5. a kind of flexible configuration device for being multiplexed function pin according to claim 1, it is characterised in that: the derailing switch
Part SW2 is electronic switch, and corresponding control signal CTL2 is level signal.
6. a kind of implementation method for the flexible configuration device for being multiplexed function pin, which comprises the following steps:
1) before processor chips normally power on, control signal CTL1 setting switching device SW1 is off-state, in this state
Under, multiplexing function pin signal is pulled upward to high level by resistance R1 and resistance R2 series connection；
2) after processor chips completion powers on, hardware reset signal is to claim state, controls signal CTL2 and processor chips
Hardware reset signal is same level state, and the switching device SW2 of this level state control isolation module is in an off state,
The connection of isolation and opposite end device, avoids the influence driven by force by opposite end device；
3) after the hardware reset signal of processor chips is maintained at the state of claiming for a period of time, hardware reset signal, which is switched to, to be released
State is put, level signal changes, and the level on pin is latched in the jump triggering of generation along processor chips Internal latches
Information, and the monitoring to above-mentioned multiplexing function pin level state is discharged, control signal CTL2 delay follows hardware reset signal
The overturning for realizing level, the level state control isolation module switching device SW2 after overturning is in closed state, so that above-mentioned multiple
It is connect with function pin with opposite end device；
4) it is closed state that control signal CTL1, which resets switching device SW1, in this state, is multiplexed function pin signal
Low level is then pulled down to by resistance R2 and switching device SW1, is re-execute the steps 2) with step 3), then processor chips is hard
Part configuration information changes.
7. a kind of implementation method of flexible configuration device for being multiplexed function pin according to claim 6, it is characterised in that:
In step 3), the time that the hardware reset signal of processor chips is maintained at the state of claiming is 100ms.
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| CN110221650B (en) * | 2019-06-18 | 2021-04-09 | 中国人民解放军国防科技大学 | Clock generator suitable for high-performance network processor chip |
| CN111198527B (en) * | 2020-01-15 | 2021-03-30 | 北京实干兴邦科技有限公司 | FPGA-based GPIO output state control device, control method and application |
| CN113127078B (en) * | 2021-03-30 | 2023-04-25 | 山东英信计算机技术有限公司 | CPLD configuration selection method and device |
| CN117060680A (en) * | 2021-08-25 | 2023-11-14 | Oppo广东移动通信有限公司 | Power management circuit and control method and system thereof |
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| CN1728554A (en) * | 2004-07-30 | 2006-02-01 | 杭州华为三康技术有限公司 | Circuit for configuring chip pins with multiplexing functions, and method for configuring chip pins with multiplexing functions |
| CN102279830A (en) * | 2011-08-01 | 2011-12-14 | 北京航空航天大学 | Multifunctional data acquisition module based on compact peripheral component interconnect (CPCI) bus |
| CN102572352A (en) * | 2011-12-26 | 2012-07-11 | 中兴通讯股份有限公司 | HDMI multiplexing method, HDMI, and equipped provided with HDMI |
| CN105404538A (en) * | 2015-12-25 | 2016-03-16 | 广州慧睿思通信息科技有限公司 | FPGA-based device and method for loading and upgrading object codes |
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Patent Citations (4)
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|---|---|---|---|---|
| CN1728554A (en) * | 2004-07-30 | 2006-02-01 | 杭州华为三康技术有限公司 | Circuit for configuring chip pins with multiplexing functions, and method for configuring chip pins with multiplexing functions |
| CN102279830A (en) * | 2011-08-01 | 2011-12-14 | 北京航空航天大学 | Multifunctional data acquisition module based on compact peripheral component interconnect (CPCI) bus |
| CN102572352A (en) * | 2011-12-26 | 2012-07-11 | 中兴通讯股份有限公司 | HDMI multiplexing method, HDMI, and equipped provided with HDMI |
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