CN107393816A - Low-temperature epitaxy method and apparatus - Google Patents

Low-temperature epitaxy method and apparatus Download PDF

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Publication number
CN107393816A
CN107393816A CN201610327612.0A CN201610327612A CN107393816A CN 107393816 A CN107393816 A CN 107393816A CN 201610327612 A CN201610327612 A CN 201610327612A CN 107393816 A CN107393816 A CN 107393816A
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China
Prior art keywords
low
temperature epitaxy
temperature
sih
epitaxy equipment
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CN201610327612.0A
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Chinese (zh)
Inventor
三重野文健
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Zing Semiconductor Corp
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Zing Semiconductor Corp
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Priority to CN201610327612.0A priority Critical patent/CN107393816A/en
Priority to TW105132931A priority patent/TW201742117A/en
Publication of CN107393816A publication Critical patent/CN107393816A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/205—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/42—Silicides

Abstract

The present invention provides a kind of low-temperature epitaxy method and apparatus, and the low-temperature epitaxy equipment uses ultraviolet source, extension realized by way of being cracked to reaction source gas, the low-temperature epitaxy method is with (SiH2) n gases as reaction source, are cracked to (SiH2) the n gases using ultraviolet light and deposit silicon in substrate surface.The present invention is cracked to (SiH2) n gases by the way of ultraviolet photodestruciton and deposits silicon in substrate surface, the temperature needed for silicon epitaxy can be substantially reduced, and improve the speed of extension, the temperature of silicon epitaxy of the present invention can be reduced to 370 600 DEG C, and the speed of deposit can be improved to 13 370nm/min；Epitaxial temperature of the present invention is low, and deposition rate is high, can meet more advanced device requirement, such as logical device, realizes more shallow narrower junction depth, and can effectively realize the three-dimensional stacking structure of device.Present invention process and equipment are simple, are with a wide range of applications in field of semiconductor manufacture.

Description

Low-temperature epitaxy method and apparatus
Technical field
The present invention relates to a kind of semiconductor fabrication process and equipment, more particularly to a kind of low-temperature epitaxy method and apparatus.
Background technology
In order to overcome some shortcomings in epitaxy technique, the existing many new progresses of epitaxial growth technology.Existing epitaxy technique bag Include：1. reduced pressure epitaxy：Auto-doping phenomenon is the phenomenon being difficult to avoid that in the epitaxial process for make source using halogen compounds, i.e., from base The piece back side, calandria surface and from anter piece backward, can all have dopant to move to gas phase and enter back into epitaxial layer.From mixing It is miscellaneous to make impurities uneven concentration.If the pressure in reaction tube is dropped into about 160 supports, you can efficiently reduce auto-dope. 2. low-temperature epitaxy：It is miscellaneous in substrate to reduce to obtain the abrupt junction between substrate and thin epitaxial layer, it is necessary to reduce growth temperature The self-diffusion of matter epitaxial layers.Using He-SiH4Decompose, SiH2Cl2The methods of thermal decomposition and sputtering, all can obviously reduce temperature. 3. selective epitaxy：For preparing some particular devices, there is mask on substrate and be provided with window in certain area, single crystalline layer is only being opened The region growing of window, and leave the region of mask not regrown epitaxial layer.4. liquid phase epitaxy：The raw material of grown epitaxial layer is existed Saturated solution is dissolved into solvent.When solution is identical with underlayer temperature, solution is covered on substrate, slow cooling, solute Monocrystalline is separated out by substrate crystal orientation.This method is usually used in the materials such as epitaxial growth GaAs.5. hetero-epitaxy：Substrate and epitaxial layer It is not same material, but lattice and thermal coefficient of expansion comparison match.Thus can on one substrate epitaxial growth go out it is different Epitaxial, such as in sapphire or spinel substrate Epitaxial growth silicon single crystal.6. molecular beam epitaxy：This is a kind of newest crystal life Substrate (is placed in ultrahigh vacuum cavity, it would be desirable to which the monocrystalline material of growth is individually placed in jeting furnace by element difference by long technology. Every kind of element is heated to appropriate temperature, it is projected with molecular flow, you can grows the monocrystalline of very thin (even monoatomic layer) The superlattice structure of layer and several metabolies.
Grown epitaxial layer has a variety of methods, but using it is most be process for vapor phase epitaxy, silicon (Si) vapour phase epitaxy generally use hydrogen (H2) Gas carries silicon tetrachloride (SiCl4) or trichlorosilane (SiHCl3), silane (SiH4) or dichloro hydrogen silicon (SiH2Cl2) etc. enter be equipped with silicon lining The reative cell at bottom, high-temperature chemical reaction is carried out in reative cell, siliceous reacting gas is reduced or is thermally decomposed, caused silicon atom In substrate silicon surface Epitaxial growth.The temperature of this process for vapor phase epitaxy about scope is 1000-1200 DEG C, however, this work Skill temperature is for 450mm or more wafer, and the problem of thermal stress is one very serious, it can cause inside wafer Linear dislocation, interlayer dislocation, or even the defects of make wafer cracked.If fruit only reduces the temperature of extension, can cause to sink Product rate reduction, so as to cause the reduction of production efficiency.In addition, for advanced process equipment, such as advanced logic is set Standby etc., it requires increasingly lower temperature to realize shallower and narrower junction depth.
In addition, if the temperature of vapour phase epitaxy is less than the technological temperature of three-dimensional stacking structure, can be realized using vapour phase epitaxy The three-dimensional stacking structure of device, the application scenarios of epitaxy technique are expanded significantly.
To provide a kind of solution of low-temperature epitaxy, Japanese catalyst company is in patent TOHKEMY 2015-53382, it is proposed that Using (SiH2) technologies of the n as reaction source progress low-temperature epitaxy, the depositing temperature of this epitaxy technology is 450-600 DEG C, is sunk Product speed is up to 13-210nm/min.However, in order to meet the needs of higher, there is provided a kind of that there is lower depositing temperature with more The low temperature epitaxial techniques of high sedimentation rate are necessary.
The content of the invention
In view of the above the shortcomings that prior art, it is an object of the invention to provide a kind of low-temperature epitaxy method and apparatus, it is used for Solve the problems, such as that temperature needed for epitaxy technique in the prior art is higher or extension speed is relatively low.
In order to achieve the above objects and other related objects, the present invention provides a kind of low-temperature epitaxy method, the low-temperature epitaxy method with (SiH2) n gases are as reaction source, using ultraviolet light to the (SiH2) n gases cracked and in substrate surface deposit silicon.
As a kind of preferred scheme of the low-temperature epitaxy method of the present invention, (SiH2) in n, n is integer, and n ＞ 3.
Further, described (SiH2) in n, n is integer, and 4≤n≤7.
As a kind of preferred scheme of the low-temperature epitaxy method of the present invention, (SiH2) n gas mixings have delivery gas, the fortune Gas carrier includes H2、N2, one or both of He and Ar combination of the above.
As a kind of preferred scheme of the low-temperature epitaxy method of the present invention, the temperature range of the low-temperature epitaxy method selection is 370-600 DEG C, the speed range of deposit is 13-370nm/min.
As a kind of preferred scheme of the low-temperature epitaxy method of the present invention, the substrate is from being monocrystalline substrate, its surface deposition Silicon be monocrystalline silicon
The present invention also provides a kind of low-temperature epitaxy equipment, and the low-temperature epitaxy equipment uses ultraviolet source, by reaction source gas The mode cracked realizes extension.
As a kind of preferred scheme of the low-temperature epitaxy equipment of the present invention, the ultraviolet source includes being arranged at the purple in front of reaction chamber Outer photodestruciton unit, for being cracked before reaction source is inputted into reaction chamber to reaction source.
Preferably, the ultraviolet photodestruciton unit includes cracking chamber and the ultraviolet light unit being arranged at outside the cracking chamber.
Further, the material of the cracking chamber is transparent material.
As a kind of preferred scheme of the low-temperature epitaxy equipment of the present invention, the low-temperature epitaxy equipment is used as using infrared light unit to be added Thermal.
As a kind of preferred scheme of the low-temperature epitaxy equipment of the present invention, set simultaneously above the reaction chamber of the low-temperature epitaxy equipment There are ultraviolet light unit and infrared light unit, infrared light unit is provided with below the reaction chamber.
As a kind of preferred scheme of the low-temperature epitaxy equipment of the present invention, the material of the reaction chamber that the low-temperature epitaxy equipment uses for Transparent material.
As a kind of preferred scheme of the low-temperature epitaxy equipment of the present invention, the low-temperature epitaxy equipment also includes being connected to reaction chamber Impurity gas input, for inputting impurity gas.
Further, the impurity gas includes one or both of n-type doping gas and p-type impurity gas.
As a kind of preferred scheme of the low-temperature epitaxy equipment of the present invention, the reaction chamber bottom is provided with support substrate, for propping up Support needs to carry out the substrate of extension.
As a kind of preferred scheme of the low-temperature epitaxy equipment of the present invention, the reaction source that the low-temperature epitaxy equipment uses includes (SiH2) n gases, (the SiH2) in n, n is integer, and n ＞ 3.
Preferably, described (SiH2) in n, n is integer, and 4≤n≤7.
Preferably, described (SiH2) n gas mixings have delivery gas, the delivery gas includes H2、N2, in He and Ar One or more combination.
Preferably, the be delayed outside temperature range of selection of the low-temperature epitaxy equipment is 370-600 DEG C, and the speed range of deposit is 13-370nm/min。
As described above, the low-temperature epitaxy method and apparatus of the present invention, has the advantages that：
First, the present invention is by the way of ultraviolet photodestruciton to (SiH2) n gases cracked and in substrate surface deposit silicon, can To substantially reduce the temperature needed for silicon epitaxy, and the speed of extension is improved, the temperature of silicon epitaxy of the present invention can be reduced to 370-600 DEG C, the speed of deposit can be improved to 13-370nm/min；
Second, epitaxial temperature of the present invention is low, and deposition rate is high, can meet more advanced device requirement, such as logical device, real Now more shallow narrower junction depth；
3rd, epitaxial temperature of the present invention is low, and deposition rate is high, can effectively realize the three-dimensional stacking structure of device.
4th, present invention process and equipment are simple, are with a wide range of applications in field of semiconductor manufacture.
Brief description of the drawings
Fig. 1 is shown as the structural representation of the low-temperature epitaxy equipment of the present invention.
Fig. 2 is shown as the step schematic flow sheet of low-temperature epitaxy method of the present invention.
Fig. 3 is shown as the low-temperature epitaxy method and temperature-deposition rate curve comparison figure of traditional epitaxy method of the present invention.
Component label instructions
101 (SiH2) n gas cavities
102 ultraviolet light units
103 cracking chambers
104 infrared light units
105 reaction chambers
106 delivery gas inputs
107 impurity gas inputs
108 tail gas output ends
109 support substrates
110 substrates
S11~S13 steps 1)~step 3)
Embodiment
Illustrate embodiments of the present invention below by way of specific instantiation, those skilled in the art can be as disclosed by this specification Content understand easily the present invention other advantages and effect.The present invention can also add by way of a different and different embodiment To implement or apply, the various details in this specification can also be based on different viewpoints and application, in the essence without departing from the present invention God is lower to carry out various modifications or alterations.
Refer to Fig. 1~Fig. 3.It should be noted that the diagram provided in the present embodiment only illustrates the present invention's in a schematic way Basic conception, in illustrating then only display with relevant component in the present invention rather than according to component count during actual implement, shape and Size is drawn, and kenel, quantity and the ratio of each component can be a kind of random change during its actual implementation, and its assembly layout type State may also be increasingly complex.
Embodiment 1
As shown in figure 1, the present embodiment provides a kind of low-temperature epitaxy equipment, the low-temperature epitaxy equipment uses ultraviolet source, passed through The mode cracked to reaction source gas realizes extension.
As shown in figure 1, the low-temperature epitaxy equipment specifically include delivery gas input 106, impurity gas input 107, (SiH2) n gas cavities 101, ultraviolet photodestruciton unit, reaction chamber 105, ultraviolet light unit 102, infrared light unit 104, tail Gas output end 108, support substrate 109 and substrate 110.
As shown in figure 1, in the present embodiment, the ultraviolet source includes the ultraviolet photodestruciton list for being arranged at the front of reaction chamber 105 Member, and multiple ultraviolet light units 102 of the top of reaction chamber 105 are arranged at, the ultraviolet light unit 102 is specifically selected as purple Outer smooth lamp, the ultraviolet photodestruciton unit are connected to (SiH2) between n gas cavities 101 and reaction chamber 105, in reaction source Reaction source is cracked before inputting into reaction chamber 105, the ultraviolet photodestruciton unit includes cracking chamber 103 and is arranged at Ultraviolet light unit 102 outside the cracking chamber, the material of the cracking chamber 103 is transparent material, such as quartz glass.
Meanwhile (the SiH for not partly being cleaved also2) n gases can with delivery gas enter together in reaction chamber 105, if It is placed in (the SiH that the ultraviolet lamp of the top of reaction chamber 105 is not cleaved to these2) n gases are further cracked, it is final after cracking It can be deposited in substrate 110, form monocrystalline silicon.The present invention is simultaneously using ultraviolet photodestruciton unit and ultraviolet lamp to (SiH2) n gas Body is cracked, and can greatly improve (SiH2) n gases utilization rate, reduce cost of material.Certainly, in other implementation processes In, the ultraviolet photodestruciton unit can also be individually used, without setting ultraviolet lamp above reaction chamber 105, with section Save equipment cost.
As an example, the reaction source that the low-temperature epitaxy equipment uses includes (SiH2) n gases, (the SiH2) in n, n is integer, And n ＞ 3.Further, described (SiH2) in n, n is integer, and 4≤n≤7, specifically, (the SiH2) n gases can be (SiH2)4、(SiH2)5、(SiH2)6、(SiH2)7Deng.
As shown in figure 1, the low-temperature epitaxy equipment is used as heater, the infrared light unit 104 using infrared light unit 104 Specific select is infrared lamp, and the infrared lamp is arranged at the top of the reaction chamber 105, and replaces with the ultraviolet lamp Arrangement, the infrared lamp and/or ultraviolet lamp be uniformly distributed in the reaction chamber 105 over and under, using being uniformly distributed Infrared lamp, the temperature homogeneity of the substrate 110 in reaction chamber 105 can be improved, improve the quality of epitaxial crystal.In addition, Because the present embodiment uses ultraviolet lamp and infrared lamp, the material of the reaction chamber 105 preferably uses transparent material, to improve The transmitance of light.Certainly, the set location of described ultraviolet light etc. and infrared lamp can be changed according to demand, and unlimited In example recited herein.
As shown in figure 1, (the SiH2) n gas cavities 101 front be connected with delivery gas input 106, for input transport Gas carrier, the delivery gas include H2、N2, one or both of He and Ar combination of the above, in the present embodiment, It is H that the delivery gas, which is selected,2。
As shown in figure 1, during silicon chip epitaxial growth, often need to control doping, to ensure to control resistivity.Used in N-type epitaxy layer Dopant be generally phosphine (PH3) or phosphorus trichloride (PCl3) etc.；Dopant used in p-type epitaxial layer is generally diborane (B2H6) Or boron chloride (BCl3) etc., therefore, in the present embodiment, the low-temperature epitaxy equipment is additionally provided with impurity gas input 107, For inputting impurity gas, to realize more extension functions, the impurity gas can include n-type doping gas and p-type One or both of impurity gas.In addition, in the present embodiment, the rear end of reaction chamber 105 is provided with tail gas output end 108, Discharge for tail gas.
As shown in figure 1, being provided with support substrate 109 in the reaction chamber 105, the top of support substrate 109 is placed with base Bottom 110.In the present embodiment, from being graphite substrate, the substrate 110 serves as a contrast the support substrate 109 from for monocrystalline silicon Bottom.
The low-temperature epitaxy equipment of the present invention with the temperature of traditional epitaxial device and deposition rate curve comparison figure as shown in figure 3, by Fig. 3, which can be seen that low-temperature epitaxy equipment of the invention and be delayed outside, only needs relatively low temperature range, and the temperature range is 370-600 DEG C, moreover, in this temperature range, the speed range of the deposit of silicon is 13-370nm/min, compared to conventional epitaxial The depositing temperature that equipment needs is 450-600 DEG C, and its deposition rate is only just that tool is had large improvement for 13-210nm/min And advantage.
Embodiment 2
As shown in FIG. 1 to 3, the present embodiment provides a kind of low-temperature epitaxy method, and the low-temperature epitaxy method is with (SiH2) n gases work For reaction source, using ultraviolet light to the (SiH2) n gases are cracked and in the surface deposition silicon of substrate 110.
As an example, (the SiH2) in n, n is integer, and n ＞ 3.Further, described (SiH2) in n, n is integer, And 4≤n≤7.Specifically, described (SiH2) n gases can be (SiH2)4、(SiH2)5、(SiH2)6、(SiH2)7Deng.
As an example, (the SiH2) n gas mixings have delivery gas, the delivery gas includes H2、N2, in He and Ar One or more combination.
Specifically, as shown in Fig. 2 the low-temperature epitaxy method includes step：
Step 1) S11 a, there is provided monocrystalline silicon wafer crystal, the monocrystalline silicon wafer crystal is placed in reaction chamber 105, and uses infrared light Monocrystalline silicon wafer crystal is heated to 370-600 DEG C by lamp；
Step 2) S12, is passed through (SiH2) n gases and delivery gas, and in (SiH2) n gases enter reaction chamber 105 before adopt Make its cracking with ultraviolet light, enter reaction chamber 105 with delivery gas after cracking；
Step 3) S13, reacting gas enter after reaction chamber 105, (the SiH not being cleaved2) n gases can be by positioned at reaction chamber The ultraviolet lamp of 105 tops further cracks, and the reacting gas after cracking is with 13-370nm/min deposition rate in monocrystalline silicon wafer Circular surfaces deposit to form single-crystal Si epitaxial layers.
The low-temperature epitaxy method of the present invention with the temperature of traditional epitaxy method and deposition rate curve comparison figure as shown in figure 3, by The low-temperature epitaxy method that Fig. 3 can be seen that the present invention only needs relatively low temperature range, and the temperature range is 370-600 DEG C, and It is heavy compared to what conventional epitaxial method needed and in this temperature range, the speed range of the deposit of silicon is 13-370nm/min Accumulated temperature degree is 450-600 DEG C, and its deposition rate is only just that tool is had large improvement and advantage for 13-210nm/min.
As described above, the low-temperature epitaxy method and apparatus of the present invention, has the advantages that：
First, the present invention is by the way of ultraviolet photodestruciton to (SiH2) n gases are cracked and in the surface deposition silicon of substrate 110, The temperature needed for silicon epitaxy can be substantially reduced, and improves the speed of extension, the temperature of silicon epitaxy of the present invention can be reduced to 370-600 DEG C, the speed of deposit can be improved to 13-370nm/min；
Second, epitaxial temperature of the present invention is low, and deposition rate is high, can meet more advanced device requirement, such as logical device, real Now more shallow narrower junction depth；
3rd, epitaxial temperature of the present invention is low, and deposition rate is high, can effectively realize the three-dimensional stacking structure of device.
4th, present invention process and equipment are simple, are with a wide range of applications in field of semiconductor manufacture.
So the present invention effectively overcomes various shortcoming of the prior art and has high industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, not for the limitation present invention.It is any to be familiar with this skill The personage of art all can carry out modifications and changes under the spirit and scope without prejudice to the present invention to above-described embodiment.Therefore, such as Those of ordinary skill in the art without departing from disclosed spirit with completed under technological thought all etc. Modifications and changes are imitated, should be covered by the claim of the present invention.

Claims (20)

  1. A kind of 1. low-temperature epitaxy method, it is characterised in that the low-temperature epitaxy method is with (SiH2) n gases are as reaction source, using purple Outer light irradiation is to (the SiH2) n gases cracked and in substrate surface deposit silicon.
  2. 2. low-temperature epitaxy method according to claim 1, it is characterised in that：(the SiH2) in n, n is integer, and n ＞ 3.
  3. 3. low-temperature epitaxy method according to claim 2, it is characterised in that：(the SiH2) in n, n is integer, and 4≤n≤7.
  4. 4. low-temperature epitaxy method according to claim 1, it is characterised in that：(the SiH2) n gas mixings have delivery gas, The delivery gas includes H2、N2, one or both of He and Ar combination of the above.
  5. 5. low-temperature epitaxy method according to claim 1, it is characterised in that：The temperature range of the low-temperature epitaxy method selection is 370-600 DEG C, the speed range of deposit is 13-370nm/min.
  6. 6. low-temperature epitaxy method according to claim 1, it is characterised in that：The substrate is from being monocrystalline substrate, its surface The silicon of deposit is monocrystalline silicon.
  7. 7. a kind of low-temperature epitaxy equipment, it is characterised in that the low-temperature epitaxy equipment uses ultraviolet source, by entering to reaction source gas The mode of row cracking realizes extension.
  8. 8. low-temperature epitaxy equipment according to claim 7, it is characterised in that：The ultraviolet source includes being arranged in front of reaction chamber Ultraviolet photodestruciton unit, for being cracked before reaction source is inputted into reaction chamber to reaction source.
  9. 9. low-temperature epitaxy equipment according to claim 8, it is characterised in that：The ultraviolet photodestruciton unit include cracking chamber and The ultraviolet light unit being arranged at outside the cracking chamber.
  10. 10. low-temperature epitaxy equipment according to claim 9, it is characterised in that：The material of the cracking chamber is transparent material.
  11. 11. low-temperature epitaxy equipment according to claim 7, it is characterised in that：The low-temperature epitaxy equipment uses infrared light list Member is used as heater.
  12. 12. low-temperature epitaxy equipment according to claim 7, it is characterised in that：Above the reaction chamber of the low-temperature epitaxy equipment Ultraviolet light unit and infrared light unit are provided with simultaneously, and infrared light unit is provided with below the reaction chamber.
  13. 13. low-temperature epitaxy equipment according to claim 7, it is characterised in that：The reaction chamber that the low-temperature epitaxy equipment uses Material be transparent material.
  14. 14. low-temperature epitaxy equipment according to claim 7, it is characterised in that：The low-temperature epitaxy equipment also includes being connected to The impurity gas input of reaction chamber, for inputting impurity gas.
  15. 15. low-temperature epitaxy equipment according to claim 14, it is characterised in that：The impurity gas includes n-type doping gas One or both of body and p-type impurity gas.
  16. 16. low-temperature epitaxy equipment according to claim 7, it is characterised in that：The reaction chamber bottom is provided with support substrate, For supporting the substrate for needing to carry out extension.
  17. 17. the low-temperature epitaxy equipment according to claim 7~16 any one, it is characterised in that：The low-temperature epitaxy equipment The reaction source of use includes (SiH2) n gases, (the SiH2) in n, n is integer, and n ＞ 3.
  18. 18. low-temperature epitaxy equipment according to claim 17, it is characterised in that：(the SiH2) in n, n is integer, and 4≤n≤7。
  19. 19. low-temperature epitaxy equipment according to claim 17, it is characterised in that：(the SiH2) n gas mixings have delivery gas Body, the delivery gas include H2、N2, one or both of He and Ar combination of the above.
  20. 20. low-temperature epitaxy equipment according to claim 17, it is characterised in that：The low-temperature epitaxy equipment is delayed selection outside Temperature range be 370-600 DEG C, the speed range of deposit is 13-370nm/min.
CN201610327612.0A 2016-05-17 2016-05-17 Low-temperature epitaxy method and apparatus Pending CN107393816A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201610327612.0A CN107393816A (en) 2016-05-17 2016-05-17 Low-temperature epitaxy method and apparatus
TW105132931A TW201742117A (en) 2016-05-17 2016-10-12 Low temperature epitaxy method and equipment

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Application Number Priority Date Filing Date Title
CN201610327612.0A CN107393816A (en) 2016-05-17 2016-05-17 Low-temperature epitaxy method and apparatus

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CN107393816A true CN107393816A (en) 2017-11-24

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6377111A (en) * 1986-09-19 1988-04-07 Matsushita Electric Ind Co Ltd Light-irradiated vapor growth apparatus
US5120394A (en) * 1988-11-11 1992-06-09 Fujitsu Limited Epitaxial growth process and growing apparatus
JPH0529234A (en) * 1991-07-25 1993-02-05 Fujitsu Ltd Epitaxial crowing method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6377111A (en) * 1986-09-19 1988-04-07 Matsushita Electric Ind Co Ltd Light-irradiated vapor growth apparatus
US5120394A (en) * 1988-11-11 1992-06-09 Fujitsu Limited Epitaxial growth process and growing apparatus
JPH0529234A (en) * 1991-07-25 1993-02-05 Fujitsu Ltd Epitaxial crowing method

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