CN107342692B - Alternating current chopping PWM dead zone generating circuit - Google Patents
Alternating current chopping PWM dead zone generating circuit Download PDFInfo
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- CN107342692B CN107342692B CN201611178960.2A CN201611178960A CN107342692B CN 107342692 B CN107342692 B CN 107342692B CN 201611178960 A CN201611178960 A CN 201611178960A CN 107342692 B CN107342692 B CN 107342692B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M5/00—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
- H02M5/02—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc
- H02M5/04—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters
- H02M5/22—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M5/275—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M5/293—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
- H02M1/325—Means for protecting converters other than automatic disconnection with means for allowing continuous operation despite a fault, i.e. fault tolerant converters
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The invention relates to an alternating current chopping PWM dead zone generating circuit which comprises a 220V alternating current signal processing circuit and a PWM signal processing circuit, wherein the input end of the 220V alternating current signal processing circuit is connected with the phase line and the zero line of a 220V alternating current signal, one signal input end of the PWM signal processing circuit is connected with the output end of the 220V alternating current signal processing circuit, the other input end of the PWM signal processing circuit is connected with a PWM signal PWM_IN, the third signal input end of the PWM signal processing circuit is connected with an input protection signal PRO_IN, and the output end of the PWM signal processing circuit outputs four-way driving signals PWM_OUT1, PWM_OUT2, PWM_OUT3 and PWM_OUT4. The PWM dead time of the circuit chopping and freewheeling is directly triggered by hardware, and PWM driving can be rapidly turned off when zero crossing signals are abnormal.
Description
Technical Field
The invention relates to a PWM control circuit, in particular to an alternating current chopping PWM dead zone generating circuit.
Background
At present, dead time is set by MCU (micro controller Unit) in PWM (pulse Width modulation) chopping and freewheeling of a chopper voltage regulating circuit, 4 paths of PWM signals are needed to drive chopping and freewheeling signals of positive and negative half cycles, once one path of PWM program or output is disturbed, an IGBT driving tube can be burnt out, moreover, the PWM dead time control cannot be changed along with the change of external voltage, and the speed is slow in protection function.
Disclosure of Invention
In order to solve the problems, the invention provides an alternating current chopping PWM dead zone generating circuit, wherein the chopping and freewheeling PWM dead zone time of the circuit is directly triggered by hardware, PWM driving can be rapidly turned off when zero crossing signals are abnormal, only one path of PWM signal output is needed for MCU, and a logic gate circuit is matched to drive a chopping signal and a freewheeling signal of positive and negative half cycles.
The invention adopts the following technical scheme: the alternating current chopper PWM dead zone generating circuit is characterized by comprising a 220V alternating current signal processing circuit and a PWM signal processing circuit, wherein the input end of the 220V alternating current signal processing circuit is connected with a phase line and a zero line of a 220V alternating current signal, one signal input end of the PWM signal processing circuit is connected with the output end of the 220V alternating current signal processing circuit, the other input end of the PWM signal processing circuit is connected with a PWM signal PWM_IN, the third signal input end of the PWM signal processing circuit is connected with an input protection signal PRO_IN, and the output end of the PWM signal processing circuit outputs four paths of driving signals PWM_OUT1, PWM_OUT2, PWM_OUT3 and PWM_OUT4.
Further, the 220V AC signal processing circuit includes an optocoupler U2, an optocoupler U3, an optocoupler U4, and an optocoupler U5, where a first pin of the optocoupler U2 is connected to one end of the capacitor C1 and the ac_n signal end, another end of the capacitor C1 is connected to one end of the resistor R1, one end of the capacitor C2, a second pin of the optocoupler U2, and a first pin of the optocoupler U3, another end of the resistor R1 is connected to the ac_l signal end, another end of the capacitor C2 is connected to the ac_n signal end and the second pin of the optocoupler U3, a fourth pin of the optocoupler U2 is connected to VCC voltage, a third pin of the optocoupler U2 is connected to one end of the resistor R3, one end of the capacitor C5, and another end of the PWM signal processing circuit signal input end of the resistor R3, and another end of the capacitor C6 are connected to VCC voltage, respectively;
the first pin of the optical coupler U4 is respectively connected with one end of the capacitor C3 and the AC_N signal end, the other end of the capacitor C3 is respectively connected with one end of the resistor R2, one end of the capacitor C4, the second pin of the optical coupler U4 and the first pin of the optical coupler U5, the other end of the resistor R2 is connected with the AC_L signal end, the other end of the capacitor C4 is respectively connected with the AC_N signal end and the second pin of the optical coupler U5, the fourth pin of the optical coupler U4 is connected with VCC voltage, the third pin of the optical coupler U4 is respectively connected with one end of the resistor R5, one end of the capacitor C7 and the signal input end of the PWM signal processing circuit, the other end of the resistor R6 and the other end of the capacitor C8 are respectively grounded, the fourth pin of the optical coupler U5 is connected with VCC voltage, and the third pin of the optical coupler U5 is respectively connected with one end of the resistor R6, one end of the capacitor C8 and the signal input end of the PWM signal processing circuit are grounded.
Further, the optocouplers U2, U3, U4 and U5 are PS2501 optocouplers.
Further, the PWM signal processing circuit includes an inverter U1, an and gate chip U6, and an or gate chip U7, where a first pin of the inverter U1 is connected to the signal terminal pwm_in, a second pin of the inverter U1 is connected to the first pin of the and gate chip U6, a fourth pin of the and gate chip U6, a third pin of the inverter U1 is connected to the third pin of the optocoupler U2, a fourth pin of the inverter U1 is connected to the tenth pin of the or gate chip U7, a fifth pin of the inverter U1 is connected to the third pin of the optocoupler U3, and a sixth pin of the inverter U1 is connected to the thirteenth pin of the or gate chip U7;
the second pin of the AND gate chip U6 is connected with the third pin of the optical coupler U4, the fifth pin of the AND gate chip U6 is connected with the third pin of the optical coupler U5, the third pin of the AND gate chip U6 is connected with the second pin of the OR gate chip U7, and the sixth pin of the AND gate chip U6 is connected with the fifth pin of the OR gate chip U7;
the first pin, the fourth pin, the ninth pin and the twelfth pin of the OR gate chip U7 are all connected with the protection signal input end PRO_IN, the third pin of the OR gate chip U7 is connected with the output end PWM_OUT1, the sixth pin of the OR gate chip U7 is connected with the output end PWM_OUT2, the eighth pin of the OR gate chip U7 is connected with the output end PWM_OUT3, and the eleventh pin of the OR gate chip U7 is connected with the output end PWM_OUT4.
Further, the inverter U1 is a six-inverter 74F04.
Further, the and gate chip U6 adopts a 74F08 chip.
Further, the or gate chip U7 is a 74F32 chip.
The beneficial effects of the invention are as follows: the PWM dead time of the circuit chopping and freewheeling is directly triggered by hardware, PWM driving can be rapidly turned off when zero crossing signals are abnormal, only one path of PWM signal output is needed for MCU, and the chopping signals and freewheeling signals of positive and negative half cycles can be driven by matching with a logic gate circuit.
Drawings
Fig. 1 is a schematic circuit diagram of the present invention.
Detailed Description
An ac chopper PWM dead zone generating circuit as shown in fig. 1 includes a 220V ac signal processing circuit and a PWM signal processing circuit.
The 220V alternating current signal processing circuit comprises an optocoupler U2, an optocoupler U3, an optocoupler U4 and an optocoupler U5, wherein a first pin of the optocoupler U2 is respectively connected with one end of a capacitor C1 and an AC_N signal end, the other end of the capacitor C1 is respectively connected with one end of a resistor R1, one end of the capacitor C2, a second pin of the optocoupler U2 and a first pin of the optocoupler U3, the other end of the resistor R1 is connected with an AC_L signal end, the other end of the capacitor C2 is respectively connected with an AC_N signal end and a second pin of the optocoupler U3, a fourth pin of the optocoupler U2 is connected with VCC voltage, a third pin of the optocoupler U2 is respectively connected with one end of a resistor R3, one end of the capacitor C5 and a signal input end of the PWM signal processing circuit, a fourth pin of the optocoupler U3 is connected with voltage, and a third pin of the optocoupler U3 is respectively connected with one end of a resistor R4, one end of the capacitor C6 and a signal input end of the PWM signal processing circuit, and the other end of the resistor R4 and the other end of the capacitor C6 are respectively grounded; the first pin of the optical coupler U4 is respectively connected with one end of the capacitor C3 and the AC_N signal end, the other end of the capacitor C3 is respectively connected with one end of the resistor R2, one end of the capacitor C4, the second pin of the optical coupler U4 and the first pin of the optical coupler U5, the other end of the resistor R2 is connected with the AC_L signal end, the other end of the capacitor C4 is respectively connected with the AC_N signal end and the second pin of the optical coupler U5, the fourth pin of the optical coupler U4 is connected with VCC voltage, the third pin of the optical coupler U4 is respectively connected with one end of the resistor R5, one end of the capacitor C7 and the signal input end of the PWM signal processing circuit, the other end of the resistor R6 and the other end of the capacitor C8 are respectively grounded, the fourth pin of the optical coupler U5 is connected with VCC voltage, and the third pin of the optical coupler U5 is respectively connected with one end of the resistor R6, one end of the capacitor C8 and the signal input end of the PWM signal processing circuit are grounded. The optocouplers U2, U3, U4 and U5 are PS2501 optocouplers.
The PWM signal processing circuit comprises an inverter U1, an AND gate chip U6 and an OR gate chip U7, wherein a first pin of the inverter U1 is connected with a signal end PWM_IN, a second pin of the inverter U1 is respectively connected with a first pin of the AND gate chip U6 and a fourth pin of the AND gate chip U6, a third pin of the inverter U1 is connected with a third pin of an optocoupler U2, a fourth pin of the inverter U1 is connected with a tenth pin of the OR gate chip U7, a fifth pin of the inverter U1 is connected with a third pin of the optocoupler U3, and a sixth pin of the inverter U1 is connected with a thirteenth pin of the OR gate chip U7; the second pin of the AND gate chip U6 is connected with the third pin of the optical coupler U4, the fifth pin of the AND gate chip U6 is connected with the third pin of the optical coupler U5, the third pin of the AND gate chip U6 is connected with the second pin of the OR gate chip U7, and the sixth pin of the AND gate chip U6 is connected with the fifth pin of the OR gate chip U7; the first pin, the fourth pin, the ninth pin and the twelfth pin of the OR gate chip U7 are all connected with the protection signal input end PRO_IN, the third pin of the OR gate chip U7 is connected with the output end PWM_OUT1, the sixth pin of the OR gate chip U7 is connected with the output end PWM_OUT2, the eighth pin of the OR gate chip U7 is connected with the output end PWM_OUT3, and the eleventh pin of the OR gate chip U7 is connected with the output end PWM_OUT4. The type of the inverter U1 is six inverters 74F04, the AND gate chip U6 adopts a 74F08 chip, and the OR gate chip U7 adopts a 74F32 chip.
The working principle of the whole circuit is as follows:
PRO_IN is an input protection signal, and is effective at high level; PWM_N is a PWM signal with adjustable duty ratio, and is triggered at high level; the AC_L is a phase line of a 220V alternating current input signal, the AC_N is a zero line of the 220V alternating current input signal, the PWM_OUT1, the PWM_OUT2, the PWM_OUT3 and the PWM_OUT4 are PWM signals which are modulated by the circuit and output to drive the alternating current chopper IGBT circuit, wherein the PWM_OUT1, the PWM_OUT2, the PWM_OUT3 and the PWM_OUT4 are effective when the output is low level, and the IGBT driving circuit can be triggered to work.
When the protection signal PRO_IN is at a high level, the PWM_OUT1, PWM_OUT2, PWM_OUT3 and PWM_OUT4 outputs high, the IGBT driving circuit is turned off, and when the protection signal PRO_IN is at a low level, the protection of the IGBT is released.
The PWM signal is changed into low level trigger through the inverter U1A, and is modulated with zero-crossing dead zone signals output by U2, U3, U4 and U5 and then is output to PWM_OUT1, PWM_OUT2, PWM_OUT3 and PWM_OUT4 so as to trigger an IGBT driving circuit.
When AC_L is IN a positive half cycle, the optocouplers U3 and U5 can be opened to output a high level, wherein U3 provides a follow current signal for the chopper circuit, U3 generates a signal PWM_OUT3 through U7D after passing through U1C and a protection signal to provide a positive half cycle follow current trigger signal for the chopper circuit, U5 and PWM_IN signals generate a signal PWM_OUT2 through U7B after passing through U6B and a protection signal to provide a positive half cycle follow current trigger signal for the chopper circuit, because the resistance values of R1 and R2 are different, the U3 is conducted before U5 is conducted, and the U3 is closed after U5 is closed, so that the follow current circuit can be ensured to work before the chopper circuit works, and the follow current circuit is closed after the follow current circuit does not work, and effective follow current is ensured to be provided for the chopper circuit.
When AC_L is IN a negative half cycle, the optocouplers U2 and U4 can be opened to output a high level, wherein U2 provides a follow current signal for the chopper circuit, U2 generates a signal PWM_OUT4 through U7C after passing through U1B and a protection signal to provide a negative half cycle follow current trigger signal for the chopper circuit, U4 and PWM_IN signals generate a signal PWM_OUT1 through U7A after passing through U6A and a protection signal to provide a negative half cycle follow current trigger signal for the chopper circuit, because the resistance values of R1 and R2 are different, the U2 is conducted before U4 is conducted, and can be closed after U4 is closed, the follow current circuit can be ensured to work before the chopper circuit works, and the follow current circuit is closed after the follow current circuit does not work, so that effective follow current is provided for the chopper circuit.
It should be noted that the above-described embodiments will enable those skilled in the art to more fully understand the specific structure of the present invention, but do not limit the invention in any way. Thus, while the specification and drawings and examples have been described in detail, it will be understood by those skilled in the art that the invention may be modified or equivalents; all technical solutions and modifications thereof which do not depart from the spirit and scope of the invention are included in the protection scope of the invention.
Claims (5)
1. The alternating current chopper PWM dead zone generating circuit is characterized by comprising a 220V alternating current signal processing circuit and a PWM signal processing circuit, wherein the input end of the 220V alternating current signal processing circuit is connected with a phase line and a zero line of a 220V alternating current signal, one signal input end of the PWM signal processing circuit is connected with the output end of the 220V alternating current signal processing circuit, the other input end of the PWM signal processing circuit is connected with a PWM signal PWM_IN, the third signal input end of the PWM signal processing circuit is connected with an input protection signal PRO_IN, and the output end of the PWM signal processing circuit outputs four paths of driving signals PWM_OUT1, PWM_OUT2, PWM_OUT3 and PWM_OUT4;
the 220V alternating current signal processing circuit comprises an optical coupler U2, an optical coupler U3, an optical coupler U4 and an optical coupler U5, wherein a first pin of the optical coupler U2 is respectively connected with one end of a capacitor C1 and an AC_N signal end, the other end of the capacitor C1 is respectively connected with one end of a resistor R1, one end of the capacitor C2, a second pin of the optical coupler U2 and a first pin of the optical coupler U3, the other end of the resistor R1 is connected with an AC_L signal end, the other end of the capacitor C2 is respectively connected with an AC_N signal end and a second pin of the optical coupler U3, a fourth pin of the optical coupler U2 is connected with VCC voltage, a third pin of the optical coupler U2 is respectively connected with one end of the resistor R3 and one end of the capacitor C5, the other end of the resistor R3 and the other end of the capacitor C5 are grounded, a third pin of the optical coupler U3 is respectively connected with one end of the resistor R4 and one end of the capacitor C6, and the other end of the resistor R4 and the other end of the capacitor C6 are grounded;
the first pin of the optical coupler U4 is respectively connected with one end of the capacitor C3 and the AC_N signal end, the other end of the capacitor C3 is respectively connected with one end of the resistor R2, one end of the capacitor C4, the second pin of the optical coupler U4 and the first pin of the optical coupler U5, the other end of the resistor R2 is connected with the AC_L signal end, the other end of the capacitor C4 is respectively connected with the AC_N signal end and the second pin of the optical coupler U5, the fourth pin of the optical coupler U4 is connected with VCC voltage, the third pin of the optical coupler U4 is respectively connected with one end of the resistor R5 and one end of the capacitor C7, the other end of the resistor R5 and the other end of the capacitor C7 are grounded, the fourth pin of the optical coupler U5 is respectively connected with one end of the resistor R6 and one end of the capacitor C8, and the other end of the resistor R6 and the other end of the capacitor C8 are grounded;
the PWM signal processing circuit comprises an inverter U1, an AND gate chip U6 and an OR gate chip U7, wherein a first pin of the inverter U1 is connected with a signal end PWM_IN, a second pin of the inverter U1 is respectively connected with a first pin of the AND gate chip U6 and a fourth pin of the AND gate chip U6, a third pin of the inverter U1 is connected with a third pin of an optocoupler U2, a fourth pin of the inverter U1 is connected with a tenth pin of the OR gate chip U7, a fifth pin of the inverter U1 is connected with a third pin of the optocoupler U3, and a sixth pin of the inverter U1 is connected with a thirteenth pin of the OR gate chip U7;
the second pin of the AND gate chip U6 is connected with the third pin of the optical coupler U4, the fifth pin of the AND gate chip U6 is connected with the third pin of the optical coupler U5, the third pin of the AND gate chip U6 is connected with the second pin of the OR gate chip U7, and the sixth pin of the AND gate chip U6 is connected with the fifth pin of the OR gate chip U7;
the first pin, the fourth pin, the ninth pin and the twelfth pin of the OR gate chip U7 are all connected with the protection signal input end PRO_IN, the third pin of the OR gate chip U7 is connected with the output end PWM_OUT1, the sixth pin of the OR gate chip U7 is connected with the output end PWM_OUT2, the eighth pin of the OR gate chip U7 is connected with the output end PWM_OUT3, and the eleventh pin of the OR gate chip U7 is connected with the output end PWM_OUT4.
2. The alternating current chopper PWM dead zone generating circuit of claim 1, wherein optocoupler U2, optocoupler U3, optocoupler U4, optocoupler U5 are PS2501 optocouplers.
3. The circuit of claim 1, wherein the inverter U1 is a six inverter 74F04.
4. The circuit of claim 1, wherein the and gate chip U6 is a 74F08 chip.
5. The circuit of claim 1, wherein the or gate die U7 is a 74F32 die.
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