CN107342286B - Transverse RC-IGBT device with surface double-gate control - Google Patents
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- 239000004065 semiconductor Substances 0.000 claims abstract description 10
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- 229910003465 moissanite Inorganic materials 0.000 claims description 4
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- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- 150000004706 metal oxides Chemical class 0.000 claims description 3
- 229910002601 GaN Inorganic materials 0.000 claims description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 9
- 238000010586 diagram Methods 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000005684 electric field Effects 0.000 description 3
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- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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Abstract
A transverse RC-IGBT device with surface double-gate control belongs to the technical field of power semiconductors. The device has a MOS pipe connected in series on a freewheeling diode with a traditional structure, and the MOS pipe is controlled to be opened and closed through a second grid electrode, so that the device functions the same as those of the traditional structure are achieved: when the RC-IGBT works in the forward direction, the MOS tube is closed, the N + collector region in the traditional structure is isolated by the MOS tube, and the device is equivalent to a pure IGBT at the moment, so that the voltage folding phenomenon in the traditional structure is completely eliminated; when the device works in the reverse direction, the MOS tube is controlled to be opened through the second grid electrode, and the freewheeling diode works normally. Meanwhile, different from the traditional longitudinal structure device, the invention belongs to a transverse device, the device is established on an epitaxial layer, and the device can be realized without a back process, so that the process difficulty is greatly reduced; the lateral voltage resistance of the device is also enhanced by the RESURF structure.
Description
Technical Field
The invention belongs to the technical field of power semiconductor devices, and particularly relates to a transverse RC-IGBT (reverse conducting insulated gate bipolar transistor) device with surface double-gate control.
Background
The power semiconductor device has the characteristics of high voltage resistance, strong control capability on large current and the like, and is widely applied to the fields of spaceflight, energy, industry and the like. The IGBT (insulated gate bipolar transistor) is used as a hot gate device in the technical field of power semiconductors, has the characteristics of high input impedance and low power consumption of the MOSFET, and also has strong current control capability of the BJT, and the withstand voltage value of the IGBT varies from hundreds of volts to thousands of volts. Although the IGBT has strong power management capability, the IGBT only has unidirectional conduction capability, and the IGBT has the advantages thatThe dots greatly limit its application. In order to solve the defect that the IGBT only has unidirectional conduction capability, an IGBT diode pair is formed and packaged together by externally connecting a reverse parallel diode, so that reverse reactive current can pass through, and the reverse parallel diode is called as a freewheeling diode (FWD); however, it is found that the method has the problems of performance mismatch between the IGBT and the freewheeling diode, cost rise and the like. In order to solve the above problems, an IGBT and a diode are integrated on one chip to form a new device, which is called an RC-IGBT (reverse conducting insulated gate bipolar transistor). The traditional RC-IGBT is formed by introducing N into the back surface+collector(N+Collector region) and then share one P with the IGBT—body region (P)-Body region) to form a freewheeling diode, the structure of which is shown in fig. 1; the RC-IGBT does have an improvement in performance and a reduction in cost compared to an external reverse diode, but is accompanied by problems such as a voltage flyback (voltage flyback) phenomenon. The reason for the voltage folding phenomenon is that due to the introduction of the N + collector, a direct path through the MOS transistor exists from the collector to the emitter, and the equivalent circuit of the direct path is as shown in fig. 2, so that when the voltage is low, the MOS transistor is firstly turned on, and the current is low; when the voltage is increased to a certain degree, the bipolar transistor is turned on, and a large number of minority carriers are injected into an N-drift region (N)-Drift) so that the on-resistance decreases sharply and the current increases rapidly with the appearance of a negative resistance effect (negative slope of the voltage-current curve of the device), the so-called voltage foldback phenomenon. In addition, the traditional RC-IGBT is a vertical device, and the implementation difficulty of the process is increased due to the introduction of the back process.
Disclosure of Invention
The invention aims to eliminate the voltage folding phenomenon in the traditional structure, reduce the implementation difficulty of the process and enhance the voltage endurance capability of a transverse device, and provides a transverse RC-IGBT device with surface double-gate control.
The technical scheme adopted by the invention is as follows:
a lateral RC-IGBT device with surface double-gate control is formed by connecting a plurality of identical cellular structures, wherein each cellular structure consists of two symmetrical structures which are symmetrical with each other, as shown in figure 4, one of the symmetrical structures comprises an emitter structure, a first MOS (metal oxide semiconductor) area structure, an N-epitaxial layer 1, a collector structure and a P-type substrate 8; the emitter structure comprises a first metal electrode 6, a P + emitting region 7 and an N + emitting region 5, wherein the P + emitting region 7 and the N + emitting region 5 are positioned below the first metal electrode 6, and ohmic contacts are respectively formed between the first metal electrode 6 and the P + emitting region 7 and between the first metal electrode 6 and the N + emitting region 5; the first MOS region structure includes a first gate 4, a first dielectric isolation layer 3 and a first P-body region 2, where the first dielectric isolation layer 3 is located below and in contact with the first gate 4, and a region located below and in contact with the first dielectric isolation layer 3 is sequentially from left to right: an N + emitter region 5, a first P-body region 2 and an N-epitaxial layer 1; the collector structure comprises a second metal electrode 10, a P + collector region 9 and an N + collector region 11, wherein the P + collector region 9 and the N + collector region 11 are positioned below the second metal electrode 10, and the second metal electrode 10 and the P + collector region 9 and the N + collector region 11 form ohmic contact respectively; wherein one of the symmetric structures further comprises a second MOS region structure; the second MOS region structure includes a second gate 12, a second dielectric isolation layer 13, and a second P-body region 14, where the second dielectric isolation layer 13 is located below and in contact with the second gate 12, and the region located below and in contact with the second dielectric isolation layer 13 is, from left to right, sequentially: an N-epitaxial layer 1, a second P-body region 14 and an N + collector region 11.
Furthermore, the N + emitter region 5 and the first P-body region 2 are both arranged in the N-epitaxial layer 1, and a part of the P + emitter region 7 is positioned in the N-epitaxial layer 1, and a part of the P + emitter region extends into the P-type substrate 8; the N + collector region 11, the second P-body region 14 and the P + collector region 9 are all in the N-epitaxial layer 1.
Further, the P + collector region 9 is in contact with the N + collector region 11 and the second P-body region 14, and the N + collector region 11 is surrounded by the P + collector region 9 and the second P-body region 14 without direct contact with the N-epitaxial layer 1.
Further, the P + emitter region 7, the N-epitaxial layer 1, the P + collector region 9 and the P-type substrate 8 form an equivalent RESURF structure with each other, as shown in fig. 5.
Further, the material of the first dielectric isolation layer 3 and the second dielectric isolation layer 13 can be SiO2、Si3N4Or Al2O3And the like. The semiconductor material used by the transverse RC-IGBT device can be made of Si, SiC, GaAs, SiC, GaN or SiGe.
The invention has the beneficial effects that:
1. in the transverse RC-IGBT device with the surface double-gate control, the N + collector region 11 is isolated from the N-epitaxial layer 1 through the P + collector region 9 and the second P-body region 14, so that the N + collector region and the N-epitaxial layer are not in direct contact; and then introducing a MOS tube controlled by a second grid 12 to control the communication between the N + collector region 11 and the N-epitaxial layer 1. When the device is in a forward working state, an MOS (metal oxide semiconductor) tube controlled by a second grid 12 is opened, and an N + collector region 11 is communicated with an N-epitaxial layer 1; when the device is in a reverse working state, the MOS tube controlled by the second grid 12 is closed, and the N + collector region 11 is isolated from the N-epitaxial layer 1; therefore, the voltage folding phenomenon caused by the introduction of the N + collector region 11 in the traditional structure is eliminated.
2. In the lateral RC-IGBT device with the surface double-gate control, the P + emission region 7, the N-epitaxial layer 1, the P + collector region 9 and the P type substrate 8 form an equivalent RESURF structure mutually, so that the purpose of enhancing the lateral withstand voltage of the device is achieved.
3. The transverse RC-IGBT device with the surface double-gate control provided by the invention is a transverse device, is more compatible with the traditional process, and has important application value.
Drawings
FIG. 1 is a schematic structural diagram of a conventional RC-IGBT device; wherein emitter is a metal emitter, gate is a grid, collector is a collector, and p-Body is p-Body region, N--drift is N-Drift region, n+-FS is n+Field stop layer, p+The collector is p+Collector region, n+The collector is n+And a collector region.
FIG. 2 is an equivalent circuit diagram of a conventional RC-IGBT device;
FIG. 3 is a schematic structural diagram of a lateral RC-IGBT device with surface double-gate control provided by the present invention; wherein 1 is an N-epitaxial layer (N)--epi), 2 is a first P-bodyThe region 3 is a first dielectric isolation layer, 4 is a first grid electrode, 5 is an N + emission region, 6 is a first metal electrode, 7 is a P + emission region, 8 is a P-type substrate (P-sub), 9 is a P + collector region, 10 is a second metal electrode, 11 is an N + collector region, 12 is a second grid electrode, 13 is a second dielectric isolation layer, and 14 is a second P-body region;
FIG. 4 is a schematic diagram of a cell structure of a lateral RC-IGBT device with surface double-gate control, which is composed of two symmetrical structures;
fig. 5 is an equivalent RESURF structure formed among the P + emitter region 7, the N-epitaxial layer 1, the P + collector region 9 and the P-type substrate 8 in the lateral RC-IGBT device with surface double-gate control provided by the present invention;
FIG. 6 is an equivalent circuit diagram of a lateral RC-IGBT device with surface double-gate control provided by the present invention;
fig. 7 is a schematic diagram of the voltage of each electrode of fig. 6 as a function of time during operation of the device.
Detailed Description
The technical scheme of the invention is described in detail in the following with reference to the accompanying drawings and embodiments:
as shown in fig. 4, the cell structure of the lateral RC-IGBT device with surface double-gate control provided by the present invention is composed of two symmetrical structures, wherein one of the symmetrical structures includes an emitter structure, a first MOS region structure, an N-epitaxial layer 1, a collector structure, and a P-type substrate 8; the emitter structure comprises a first metal electrode 6, a P + emitting region 7 and an N + emitting region 5, wherein the P + emitting region 7 and the N + emitting region 5 are positioned below the first metal electrode 6, and ohmic contacts are respectively formed between the first metal electrode 6 and the P + emitting region 7 and between the first metal electrode 6 and the N + emitting region 5; the first MOS region structure includes a first gate 4, a first dielectric isolation layer 3 and a first P-body region 2, where the first dielectric isolation layer 3 is located below and in contact with the first gate 4, and a region located below and in contact with the first dielectric isolation layer 3 is sequentially from left to right: an N + emitter region 5, a first P-body region 2 and an N-epitaxial layer 1; the collector structure comprises a second metal electrode 10, a P + collector region 9 and an N + collector region 11 which are positioned below the second metal electrode 10, the second metal electrode 10 and the POhmic contacts are respectively formed in the + collector region 9 and the N + collector region 11; wherein one of the symmetric structures further comprises a second MOS region structure; the second MOS region structure includes a second gate 12, a second dielectric isolation layer 13, and a second P-body region 14, where the second dielectric isolation layer 13 is located below and in contact with the second gate 12, and the region located below and in contact with the second dielectric isolation layer 13 is, from left to right, sequentially: an N-epitaxial layer 1, a second P-body region 14 and an N + collector region 11. The N + emitter region 5 and the first P-body region 2 are both arranged in the N-epitaxial layer 1, one part of the P + emitter region 7 is positioned in the N-epitaxial layer 1, and the other part of the P + emitter region extends into the P-type substrate 8; the N + collector region 11, the second P-body region 14 and the P + collector region 9 are all in the N-epitaxial layer 1. The P + collector region 9 is in contact with the N + collector region 11 and the second P-body region 14, the N + collector region 11 is surrounded by the P + collector region 9 and the second P-body region 14, and the N + collector region is not in direct contact with the N-epitaxial layer 1. A first metal electrode 6, a first medium isolating layer 3, a second metal electrode 10 and a second medium isolating layer 13 are arranged above the N-epitaxial layer 1, and a P-type substrate 8 is arranged below the N-epitaxial layer. The P + emitter region 7, the N-epitaxial layer 1, the P + collector region 9 and the P-type substrate 8 form an equivalent RESURF structure with each other, as shown in fig. 5. The semiconductor material is Si, the grid electrode material is polysilicon, and the materials of the first medium isolating layer 3 and the second medium isolating layer 13 are SiO2。
The working principle of the invention is as follows:
compared with the traditional device structure, the invention is equivalent to the fact that an MOS tube is connected in series with a freewheeling diode of the traditional structure, and the opening and closing of the MOS tube are controlled by the second grid electrode, so that the device function same as that of the traditional structure is realized, and the voltage folding phenomenon of the traditional device is eliminated. As shown in FIG. 6, for the equivalent circuit diagram of the lateral RC-IGBT device with surface double-gate control provided by the invention, when the RC-IGBT device is in the forward working state (Vce > 0 in FIG. 7), the MOS transistor controlled by G2 is always closed (V in FIG. 7)G2< 0), the MOS tube controlled by G1 can be opened (VG 1 > 0 shown in FIG. 7) or closed (V shown in FIG. 7)G1< 0), the whole device is opened when the MOS tube controlled by G1 is opened, and the whole device is closed when the MOS tube controlled by G1 is closed. When the MOS tube controlled by G2 is closed, the second P-body region 14 is close toThe accumulation of holes is formed on the surface of the second dielectric isolation layer 13, the conducting channel from the N-epitaxial layer 1 to the N + collector region 11 is closed, the N + collector region 11 is surrounded and shielded by the second P-body region 14 and the P + collector region 9, there is no direct path from the collector to the emitter through the MOS transistor controlled by the first gate 4 (as shown in fig. 2, the MOS transistor is directly communicated with the C electrode and the E electrode), the N + collector region 11 is isolated by the MOS transistor controlled by the second gate 12, and there is no voltage folding phenomenon caused by the introduction of the N + collector region 11 in the conventional RC-IGBT structure. When the device is in a reverse working state (Vce < 0 in figure 7), the MOS tube controlled by G2 is always opened (V in figure 7)G2< 0), the MOS tube controlled by G1 can be opened (V shown in FIG. 7)G1> 0) can also be closed (V as shown in FIG. 7G1< 0), when the MOS tube controlled by G1 is turned on, the MOS tube controlled by G1 and the diode are connected in parallel, so that the diode can be assisted to freewheel (through reverse current); when the MOS tube controlled by G1 is closed, only the diode is free-wheeling alone.
The transverse RC-IGBT device is built on the epitaxial layer, and the device is realized without a back process, so that the process difficulty is greatly reduced. In addition, the P + emission region 7, the N-epitaxial layer 1, the P + collector region and the P-type substrate 8 mutually form a RESURF structure equivalent to that shown in figure 5, so that an electric field peak value is converted from a surface transverse electric field to an in-vivo longitudinal electric field, and the voltage resistance of a transverse device is enhanced.
Claims (5)
1. A transverse RC-IGBT device with surface double-gate control is formed by connecting a plurality of identical cellular structures, wherein each cellular structure consists of two symmetrical structures which are symmetrical with each other, and one symmetrical structure comprises an emitter structure, a first MOS (metal oxide semiconductor) region structure, an N-epitaxial layer (1), a collector structure and a P-type substrate (8); the emitter structure comprises a first metal electrode (6), a P + emitting region (7) and an N + emitting region (5) which are positioned below the first metal electrode (6), wherein the first metal electrode (6) and the P + emitting region (7) and the N + emitting region (5) form ohmic contact respectively; the first MOS region structure comprises a first grid (4), a first medium isolation layer (3) and a first P-body region (2), wherein the first medium isolation layer (3) is positioned below the first grid (4) and is in contact with the first grid, and a region which is positioned below the first medium isolation layer (3) and is in contact with the first medium isolation layer is sequentially arranged from left to right: an N + emitter region (5), a first P-body region (2) and an N-epitaxial layer (1); the collector structure comprises a second metal electrode (10), a P + collector region (9) and an N + collector region (11) which are positioned below the second metal electrode (10), wherein the second metal electrode (10) and the P + collector region (9) and the N + collector region (11) form ohmic contact respectively; wherein one of the symmetric structures further comprises a second MOS region structure; the second MOS region structure comprises a second grid (12), a second medium isolation layer (13) and a second P-body region (14), wherein the second medium isolation layer (13) is positioned below the second grid (12) and is in contact with the second grid, and a region positioned below the second medium isolation layer (13) and is in contact with the second medium isolation layer is sequentially arranged from left to right: the N-epitaxial layer (1), the second P-body region (14) and the N + collector region (11); when the device is in a forward working state, the MOS tube controlled by the second grid (12) is opened, the N + collector region (11) is communicated with the N-epitaxial layer (1), when the device is in a reverse working state, the MOS tube controlled by the second grid (12) is closed, and the N + collector region (11) is isolated from the N-epitaxial layer (1).
2. The lateral RC-IGBT device with surface double-gate control according to claim 1, characterized in that the N + emitter region (5) and the first P-body region (2) are both in the N-epitaxial layer (1), and the P + emitter region (7) is partly located in the N-epitaxial layer (1) and partly extends into the P-type substrate (8); the N + collector region (11), the second P-body region (14) and the P + collector region (9) are all arranged in the N-epitaxial layer (1).
3. Lateral RC-IGBT device with surface double gate control according to claim 1, characterized in that the N + collector region (11) is surrounded by a P + collector region (9) and a second P-body region (14) without direct contact to the N-epitaxial layer (1).
4. Lateral RC-IGBT device with surface double gate control according to claim 1, characterized in that the P + emitter region (7), the N-epitaxial layer (1), the P + collector region (9) and the P-type substrate (8) form an equivalent RESURF structure with respect to each other.
5. The lateral RC-IGBT device with surface double gate control according to claim 1, wherein the semiconductor material of the lateral RC-IGBT device is made of Si, SiC, GaAs, SiC, GaN or SiGe.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5801431A (en) * | 1996-01-18 | 1998-09-01 | International Rectifier Corporation | MOS gated semiconductor device with source metal covering the active gate |
| CN101771073A (en) * | 2010-01-15 | 2010-07-07 | 电子科技大学 | High-speed insulated gate bipolar transistor on lateral SOI |
| CN106098763A (en) * | 2016-07-26 | 2016-11-09 | 电子科技大学 | A kind of RC LIGBT device and preparation method thereof |
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| US8866252B2 (en) * | 2011-09-15 | 2014-10-21 | Cambridge Semiconductor Limited | Power semiconductor devices and fabrication methods |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5801431A (en) * | 1996-01-18 | 1998-09-01 | International Rectifier Corporation | MOS gated semiconductor device with source metal covering the active gate |
| CN101771073A (en) * | 2010-01-15 | 2010-07-07 | 电子科技大学 | High-speed insulated gate bipolar transistor on lateral SOI |
| CN106098763A (en) * | 2016-07-26 | 2016-11-09 | 电子科技大学 | A kind of RC LIGBT device and preparation method thereof |
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