CN107340656A - Pixel electrode and preparation method, display panel - Google Patents
Pixel electrode and preparation method, display panel Download PDFInfo
- Publication number
- CN107340656A CN107340656A CN201710803287.5A CN201710803287A CN107340656A CN 107340656 A CN107340656 A CN 107340656A CN 201710803287 A CN201710803287 A CN 201710803287A CN 107340656 A CN107340656 A CN 107340656A
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- Prior art keywords
- bulge
- groove
- pixel electrode
- electrode
- film layer
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Geometry (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention provides a kind of pixel electrode, it is formed on array base palte, including transparent bulge-structure, the groove being formed on bulge-structure surface, the electrode that is covered in groove surfaces, the groove are arranged on the top of bulge-structure.Present invention also offers a kind of preparation method of pixel electrode, comprise the following steps：A transparent film layer is made on the surface of array base palte, development is exposed to film layer and forms bulge-structure and forms groove at the top of bulge-structure；Conductive film layer is made on bulge-structure, and patterning is carried out to conductive film layer and forms electrode, electrode covers on the surface of the recesses.Present invention also offers a kind of display panel, including described pixel electrode.Compared with prior art, display panel internal electric field permeability is improved, liquid crystal efficiency is effectively improved and improves LCD penetration.
Description
Technical field
The present invention relates to a kind of liquid panel technique, particularly a kind of pixel electrode and preparation method, display panel.
Background technology
Since the application popularization of liquid crystal display, its display quality improves year by year, high colour gamut, high-penetration rate and high-resolution
Product is bringing increasingly abundanter visual enjoyment.Liquid crystal panel is realized color by the combination of pixels of the color of RGB three
Color shows, to prevent ambient light from influenceing the colour mixture between pixel to liquid crystal panel display performance, can there is black square between each pixel
Battle array is blocked.
However, with the raising of liquid crystal display resolution ratio, liquid crystal panel interior pixels quantity is significantly increased, black matrix"
Occupy region to be consequently increased, cause the aperture opening ratio of liquid crystal display can reduce, so as to cause penetrance to substantially reduce.How to solve
Certainly penetrance caused by high-resolution is lost, and becomes the research emphasis of liquid crystal display development.
The content of the invention
For overcome the deficiencies in the prior art, the present invention provides a kind of pixel electrode and preparation method, display panel, improves aobvious
Show panel itself penetration of electric field rate, so as to effectively improve liquid crystal efficiency and improve LCD penetration.
The invention provides a kind of pixel electrode, be formed on array base palte, including transparent bulge-structure, be formed at it is convex
The groove on body structure surface, the electrode being covered in groove surfaces are played, the groove is arranged on the top of bulge-structure.
Further, the spacing between two neighboring bulge-structure is 0.1-20um.
Further, the width of the bulge-structure is 0.1-20um, is highly 0.1-10um.
Further, the width of the groove is 0.05-10um, depth 0.1-10um.
Present invention also offers a kind of preparation method of pixel electrode, including the pixel electrode being formed on array base palte,
The pixel electrode is obtained using following preparation method, and the preparation method comprises the following steps：
On the surface of array base palte make a transparent film layer, film layer is exposed development formed bulge-structure and
Groove is formed at the top of bulge-structure；
Conductive film layer is made on bulge-structure, and patterning is carried out to conductive film layer and forms electrode, the electrode covering
On the surface of the recesses.
Further, the spacing between two neighboring bulge-structure is 0.1-20um.
Further, the width of the bulge-structure is 0.1-20um, is highly 0.1-10um.
Further, the width of the groove is 0.05-10um, depth 0.1-10um.
Present invention also offers a kind of display panel, including described pixel electrode.
The present invention compared with prior art, by the way that pixel electrode is arranged to, with bulge-structure, set on bulge-structure
Put groove and cover electrode on the surface of groove, so that pixel electrode forms stereo electrod, can so improve display surface
Intralamellar part penetration of electric field rate, effectively improve liquid crystal efficiency and improve LCD penetration.
Brief description of the drawings
Fig. 1 is the schematic diagram that the present invention makes transparent film layer on array base palte；
Fig. 2 is the schematic diagram that bulge-structure and groove are formed after the present invention is exposed, developed to transparent film layer；
Fig. 3 is the schematic diagram that the present invention makes conductive layer on bulge-structure, groove and array base palte；
Fig. 4 is the schematic diagram that electrode is formed after the present invention patterns to conductive layer；
Fig. 5 is the schematic diagram of penetrance of the present invention；
Fig. 6 is the structural representation of array base palte.
Embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.
As shown in figure 4, the invention discloses a kind of pixel electrode, it is formed on the passivation layer of array base palte 4, pixel electricity
Pole 7 includes transparent bulge-structure 1, the groove 2 being formed on the surface of bulge-structure 1, the electrode 3 being covered on the surface of groove 2,
The groove 2 is arranged on the top of bulge-structure 1；
Above-mentioned array base palte is thin-film transistor array base-plate (TFT substrate), and its structure uses TFT of the prior art
Array base palte, as shown in fig. 6, including at least substrate 400, the cushion being set in turn on substrate 401, active layer 402, grid
Insulating barrier 403, grid 404, interlayer insulating film 405, the via of the via through interlayer insulating film 405 and gate insulator 403
The source electrode 406 and drain electrode 407, flatness layer 408, public electrode 409, passivation layer 410 contacted with active layer；The pixel electricity of the present invention
Pole 7 is contacted by the passivated via of layer 410 of electrode 3 and the via of flatness layer 408 with drain electrode 407, and the specific way of contact can root
It is configured according to needs, such as the passivated layer via of one extension is set in opening position of the electrode 3 above drain electrode and put down
Smooth layer via and drain contact, are not specifically limited herein；Thin-film transistor array base-plate is prior art in the present invention, herein
It is not described in detail.
The global shape of relief structure 1 of the present invention can be changed accordingly according to the pattern of pixel electrode, pixel electricity
The pattern of pole is formed by being combined more with bulge-structure 1.
As shown in figure 4, the cross sectional shape of bulge-structure 1 is trapezoidal, arc, rectangle etc., certainly, the invention is not restricted to this,
Can also be polygon, such as pentagon；Bulge-structure 1 is transparent material, such as photoresist, PFA materials (soluble poly four
PVF), SiNx, SiOx etc.；The width of bulge-structure 1 is 0.1-20um, is highly 0.1-10um, two neighboring bulge-structure
Spacing between 1 is 0.1-20um；It is noted herein that when bulge-structure 1 is the profiled shapes such as trapezoidal, arc, it is wide
It is Breadth Maximum to spend for 0.1-20um expressions, and what it is highly for 0.1-10um expressions is maximum height.
As shown in figure 4, the cross sectional shape of groove 2 can be trapezoidal, arc, rectangle etc., when groove is trapezoidal, groove
Bottom width is less than the width of opening, forms the trapezoidal of handstand；The width of groove 2 is 0.05-10um, depth 0.1-10um；
Here it is worth noting that when groove 2 for trapezoidal or arc when, foregoing width be 0.05-10um represent be maximum
Width, depth are maximum depth for 0.1-10um expressions.
As shown in figure 4, the electrode 3 being covered on the surface of groove 2 specifically, electrode 3 cover groove 2 both sides cell wall and
Bottom portion of groove；Electrode 3 is conductive material, such as ITO nesa coating, graphene conductive material etc..
The invention also discloses a kind of preparation method of pixel electrode, including it is formed on the passivation layer of array base palte 4
Pixel electrode 7, the pixel electrode are obtained using following preparation method, and the preparation method comprises the following steps：
As shown in figure 1, making a transparent film layer 5 on the surface of the passivation layer of array base palte 4, specifically, film layer 5 is
Transparent material, such as photoresist, PFA materials (soluble poly tetrafluoroethene), SiNx, SiOx etc.；Chemical vapor deposition can be used
Product or the mode of coating make, and are not especially limited herein；
Form bulge-structure 1 as shown in Fig. 2 being exposed development to film layer 5 and formed at the top of bulge-structure 1 recessed
Groove 2；Specifically, exposure can be carried out at twice, and exposure for the first time is to make bulge-structure, and second of exposure is making groove 2；When
So the invention is not restricted to this, it can also use more gray-level masks to carry out single exposure and bulge-structure 1 and groove 2, more GTGs are made
Light shield includes two kinds of light shield modes of Half tone Mask (intermediate tone mask) or Gray-tone Mask (gray level mask), herein
It is not specifically limited；
The cross sectional shape of bulge-structure 1 is trapezoidal, arc, rectangle etc., and certainly, the invention is not restricted to this, can also be more
Side shape, such as pentagon；The width of bulge-structure 1 is 0.1-20um, is highly 0.1-10um, two neighboring bulge-structure 1 it
Between spacing be 0.1-20um；It is noted herein that when bulge-structure 1 is the profiled shapes such as trapezoidal, arc, width is
0.1-20um represent for Breadth Maximum, what is highly represented for 0.1-10um is maximum height；
The cross sectional shape of groove 2 can be trapezoidal, arc, rectangle etc., and when groove is trapezoidal, the bottom width of groove is small
In the width of opening, the trapezoidal of handstand is formed；The width of groove 2 is 0.05-10um, depth 0.1-10um；Here it is worth note
Meaning, when groove 2 for trapezoidal or arc when, what foregoing width was that 0.05-10um represents is maximum width, and depth is
What 0.1-10um was represented is maximum depth；
As shown in figure 3, making conductive film layer 6 on bulge-structure 1, specifically, conductive film layer 6 is covered in exposed array
In 4 surface, bulge-structure 1 and groove 2；The making of conductive film layer 6 can be entered by the way of vacuum evaporation or sputter coating
OK, it is not especially limited herein；
As shown in figure 4, patterning is carried out to conductive film layer 6 forms electrode 3, the electrode 3 is covered in the surface of groove 2
On, here it is worth noting that 3 passivated layers of via of electrode and flatness layer via and drain contact；
The electrode 3 being covered on the surface of groove 2 is specifically, electrode 3 covers the both sides cell wall and bottom portion of groove of groove 2；
Electrode 3 is conductive material, such as ITO nesa coating, graphene conductive material etc..
In above-mentioned bulge-structure 1, its global shape can be changed accordingly according to the pattern of pixel electrode, pixel
The pattern of electrode is formed by being combined more with bulge-structure 1.
The invention also discloses a kind of display panel, including colored filter substrate (CF substrates) and array base palte, goes back
Including the pixel electrode 7 being formed on the passivation layer of array base palte 4, pixel electrode 7 includes transparent bulge-structure 1, is formed at
Groove 2 on the surface of bulge-structure 1, the electrode 3 being covered on the surface of groove 2, the groove 2 are arranged at the top of bulge-structure 1
In portion；
Above-mentioned array base palte is thin-film transistor array base-plate (TFT substrate), and its structure uses TFT of the prior art
Array base palte, it is exhausted including at least substrate, the cushion being set in turn on substrate, active layer, gate insulator, grid, interlayer
The source electrode and drain electrode, flatness layer, public affairs that the via of edge layer, the via through interlayer insulating film and gate insulator contacts with active layer
Common electrode, passivation layer；The pixel electrode of the present invention passes through 3 passivated layers of via of electrode and flatness layer via and drain contact
(not shown), thin-film transistor array base-plate are prior art, are not described in detail herein.
The global shape of relief structure 1 of the present invention can be changed accordingly according to the pattern of pixel electrode, pixel electricity
The pattern of pole is formed by being combined more with bulge-structure 1.
As shown in figure 4, the cross sectional shape of bulge-structure 1 is trapezoidal, arc, rectangle etc., certainly, the invention is not restricted to this,
Can also be polygon, such as pentagon；Bulge-structure 1 is transparent material, such as photoresist, PFA materials (soluble poly four
PVF), SiNx, SiOx etc.；The width of bulge-structure 1 is 0.1-20um, is highly 0.1-10um, two neighboring bulge-structure
Spacing between 1 is 0.1-20um；It is noted herein that when bulge-structure 1 is the profiled shapes such as trapezoidal, arc, it is wide
It is Breadth Maximum to spend for 0.1-20um expressions, and what it is highly for 0.1-10um expressions is maximum height.
As shown in figure 4, the cross sectional shape of groove 2 can be trapezoidal, arc, rectangle etc., when groove is trapezoidal, groove
Bottom width is less than the width of opening, forms the trapezoidal of handstand；The width of groove 2 is 0.05-10um, depth 0.1-10um；
Here it is worth noting that when groove 2 for trapezoidal or arc when, foregoing width be 0.05-10um represent be maximum
Width, depth are maximum depth for 0.1-10um expressions.
As shown in figure 4, the electrode 3 being covered on the surface of groove 2 specifically, electrode 3 cover groove 2 both sides cell wall and
Bottom portion of groove；Electrode 3 is conductive material, such as ITO nesa coating, graphene conductive material etc..
As shown in figure 5, carry out penetrance with routine of the prior art has bulge-structure pixel electrode by of the invention
Test understands that position penetrance will be apparently higher than prior art between two electrode wires for pixel electrode of the invention.
The present invention by bulge-structure among electrode design to liquid crystal (cell), electric field of improving the standard, while use is recessed
Groove designs, and maintains to reduce electrode upper vertical electric field region width while electrode surface area, increase electrode direct range (carries
High aperture).
Although the present invention has shown and described with reference to specific embodiment, it should be appreciated by those skilled in the art that：
In the case where not departing from the spirit and scope of the present invention limited by claim and its equivalent, can carry out herein form and
Various change in details.
Claims (9)
1. a kind of pixel electrode, is formed on array base palte, it is characterised in that：Including transparent bulge-structure (1), be formed at it is convex
The groove (2) on structure (1) surface, the electrode (3) being covered on groove (2) surface are played, the groove (2) is arranged at raised knot
On the top of structure (1).
2. pixel electrode according to claim 1, it is characterised in that：Spacing between two neighboring bulge-structure (1) is
0.1-20um。
3. pixel electrode according to claim 1, it is characterised in that：The width of the bulge-structure (1) is 0.1-20um,
Highly it is 0.1-10um.
4. pixel electrode according to claim 1, it is characterised in that：The width of the groove (2) is 0.05-10um, deep
Spend for 0.1-10um.
5. a kind of preparation method of pixel electrode, including the pixel electrode being formed on array base palte, it is characterised in that：The picture
Plain electrode is obtained using following preparation method, and the preparation method comprises the following steps：
On the surface of array base palte make a transparent film layer, film layer is exposed development formed bulge-structure (1) and
Groove (2) is formed at the top of bulge-structure (1)；
Conductive film layer is made on bulge-structure 1, and patterning is carried out to conductive film layer and forms electrode 3, electrode (3) covering
On the surface of groove (2).
6. the preparation method of pixel electrode according to claim 1, it is characterised in that：Two neighboring bulge-structure (1) it
Between spacing be 0.1-20um.
7. the preparation method of pixel electrode according to claim 1, it is characterised in that：The width of the bulge-structure (1)
It is highly 0.1-10um for 0.1-20um.
8. the preparation method of pixel electrode according to claim 1, it is characterised in that：The width of the groove (2) is
0.05-10um, depth 0.1-10um.
A kind of 9. display panel, it is characterised in that：Including the pixel electrode as described in claim any one of 1-4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710803287.5A CN107340656A (en) | 2017-09-08 | 2017-09-08 | Pixel electrode and preparation method, display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710803287.5A CN107340656A (en) | 2017-09-08 | 2017-09-08 | Pixel electrode and preparation method, display panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107340656A true CN107340656A (en) | 2017-11-10 |
Family
ID=60215418
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710803287.5A Pending CN107340656A (en) | 2017-09-08 | 2017-09-08 | Pixel electrode and preparation method, display panel |
Country Status (1)
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110764321A (en) * | 2019-10-16 | 2020-02-07 | 深圳市华星光电半导体显示技术有限公司 | Thin film transistor pixel electrode layer structure and display panel |
| US10868217B2 (en) | 2018-03-07 | 2020-12-15 | Kunshan New Flat Panel Display Technology Center Co., Ltd. | LED chips, method of manufacturing the same, and display panels |
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