CN107331698A - A kind of thin film transistor (TFT) and preparation method thereof, array base palte, display device - Google Patents
A kind of thin film transistor (TFT) and preparation method thereof, array base palte, display device Download PDFInfo
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- CN107331698A CN107331698A CN201710592753.XA CN201710592753A CN107331698A CN 107331698 A CN107331698 A CN 107331698A CN 201710592753 A CN201710592753 A CN 201710592753A CN 107331698 A CN107331698 A CN 107331698A
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- 239000010409 thin film Substances 0.000 title claims abstract description 92
- 238000002360 preparation method Methods 0.000 title claims abstract description 18
- 239000004065 semiconductor Substances 0.000 claims abstract description 96
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 60
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 60
- 229910052751 metal Inorganic materials 0.000 claims abstract description 57
- 239000000463 material Substances 0.000 claims abstract description 52
- 230000000694 effects Effects 0.000 claims abstract description 34
- 239000000126 substance Substances 0.000 claims abstract description 28
- 239000000758 substrate Substances 0.000 claims abstract description 28
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 46
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 40
- 239000001301 oxygen Substances 0.000 claims description 40
- 229910052760 oxygen Inorganic materials 0.000 claims description 40
- 239000011787 zinc oxide Substances 0.000 claims description 23
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 15
- 229910052733 gallium Inorganic materials 0.000 claims description 15
- 229910052738 indium Inorganic materials 0.000 claims description 15
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 15
- 230000015572 biosynthetic process Effects 0.000 claims description 14
- 239000011777 magnesium Substances 0.000 claims description 11
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 6
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 claims description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 5
- 229910052737 gold Inorganic materials 0.000 claims description 5
- 239000010931 gold Substances 0.000 claims description 5
- 229910052749 magnesium Inorganic materials 0.000 claims description 5
- 150000001875 compounds Chemical class 0.000 claims description 4
- 229910052757 nitrogen Inorganic materials 0.000 claims description 4
- 238000005516 engineering process Methods 0.000 abstract description 7
- 238000005286 illumination Methods 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 154
- 239000010408 film Substances 0.000 description 14
- 239000011229 interlayer Substances 0.000 description 10
- 239000012212 insulator Substances 0.000 description 8
- 239000011701 zinc Substances 0.000 description 8
- 230000007547 defect Effects 0.000 description 6
- 150000002500 ions Chemical class 0.000 description 6
- 230000009467 reduction Effects 0.000 description 6
- 230000007423 decrease Effects 0.000 description 5
- 238000009826 distribution Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- 230000005669 field effect Effects 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
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- 230000004888 barrier function Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 229910017107 AlOx Inorganic materials 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
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- 229910003070 TaOx Inorganic materials 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- QRSFFHRCBYCWBS-UHFFFAOYSA-N [O].[O] Chemical compound [O].[O] QRSFFHRCBYCWBS-UHFFFAOYSA-N 0.000 description 1
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- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 229910001425 magnesium ion Inorganic materials 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 230000000802 nitrating effect Effects 0.000 description 1
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- -1 polysiloxane Polymers 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
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- Thin Film Transistor (AREA)
Abstract
The invention provides a kind of thin film transistor (TFT) and preparation method thereof, array base palte, display device, it is related to display technology field, the reliability of thin film transistor (TFT) under light illumination can be effectively improved, and then improve the display performance of display device.Wherein, thin film transistor (TFT) includes the first active layer located at underlay substrate, first active layer is formed by the metal oxide semiconductor material doped with metallic element, and the chemical activity of the metallic element adulterated is higher than the chemical activity of the metallic element in metal-oxide semiconductor (MOS).Above-mentioned thin film transistor (TFT) is used to realize that picture is shown.
Description
Technical field
The present invention relates to display technology field, more particularly to it is a kind of thin film transistor (TFT) and preparation method thereof, array base palte, aobvious
Showing device.
Background technology
For amorphous silicon film transistor, oxide thin film transistor has high mobility, good uniformity,
The advantages of low temperature process, therefore, oxide backboard based on oxide thin film transistor (Oxide backplane, hereinafter referred to as
Oxide BP) technology is widely used in and realizes high-resolution, high refreshing frequency, narrow frame, the organic hair of the large scale of low-power consumption
In optical diode (Organic Light-Emitting Diode, hereinafter referred to as OLED) display device.
At present, although the switch special efficacy of oxide thin film transistor has been obtained for very big lifting, still, due to oxidation
The energy gap of the channel material of thing thin film transistor (TFT) is smaller, the reliability of oxide thin film transistor under light illumination, for example, bear
Bias Temperature light durability (Negative Bias Temperature Illumination Stability, hereinafter referred to as
NBTIS) characteristic is unsatisfactory, and this will certainly just influence the quality of the picture shown by OLED display, that is, influences OLED to show
The display performance of showing device.
The content of the invention
The invention provides a kind of thin film transistor (TFT) and preparation method thereof, array base palte, display device, it can effectively improve thin
The reliability of film transistor under light illumination, and then improve the display performance of display device.
To reach above-mentioned purpose, the present invention is adopted the following technical scheme that：
The first aspect of the present invention provides a kind of thin film transistor (TFT), including located at the first active layer of underlay substrate, institute
State the first active layer to be formed by the metal oxide semiconductor material doped with metallic element, the chemistry of the metallic element adulterated
Activity is higher than the chemical activity of the metallic element in the metal-oxide semiconductor (MOS).
In thin film transistor (TFT) provided by the present invention, including by the metal-oxide semiconductor (MOS) material doped with metallic element
Expect the first active layer formed, also, the chemical activity of the metallic element adulterated is higher than in metal-oxide semiconductor (MOS)
The chemical activity of metallic element.Based on metal-oxide semiconductor (MOS) principle, the doping metals member in metal-oxide semiconductor (MOS)
After element, the chemistry that the metallic element in metal-oxide semiconductor (MOS) is higher than by the chemical activity of the metallic element adulterated is lived
Property is sprinkled, so, oxygen element in metal-oxide semiconductor (MOS) is allowed near the stronger metallic element of chemical activity
It is mobile so that the electron density distribution of oxygen element is offset to the metallic element direction adulterated, such metal-oxide semiconductor (MOS)
The electron cloud overlapping degree reduction of middle oxygen element and metallic element, with reference to can decline so that conduction band bottom is offset to high-energy tail.And by
Keep constant in valence band location, conduction band bottom is offset to high-energy tail, which increases the energy difference between conduction band bottom and top of valence band,
The energy gap of metal-oxide semiconductor (MOS) is increased, and after the energy gap increase of metal-oxide semiconductor (MOS), in light
According under the conditions of, metal oxide semiconductor material does not absorb the photon of visible region energy substantially, so that as few as possible swash
Electron-hole pair is sent, and then improves the reliability of thin film transistor (TFT), such as NBTIS characteristics improve the display of display device
Energy.
The second aspect of the present invention provides a kind of preparation method of thin film transistor (TFT), the making side of the thin film transistor (TFT)
Method is applied in the thin film transistor (TFT) as described in the first aspect of the present invention, and the preparation method of the thin film transistor (TFT) includes：
One underlay substrate is provided；
In the underlay substrate the first active layer of formation, wherein, first active layer is by the gold doped with metallic element
Category oxide semiconductor material is formed, and the chemical activity of the metallic element adulterated is higher than in the metal-oxide semiconductor (MOS)
Metallic element chemical activity；
First active layer dorsad the underlay substrate surface formed the second active layer, wherein, described second has
Active layer is formed by the metal oxide semiconductor material of doping nonmetalloid, the ionic radius of the nonmetalloid adulterated with
The difference of the ionic radius of oxygen is in preset threshold range；
The 3rd active layer on the second active layer dorsad surface of first active layer, wherein, the described 3rd has
The oxide semiconductor material that active layer is adulterated by n-type is formed.
Using the thin film transistor (TFT) made by the preparation method of thin film transistor (TFT) provided by the present invention, including by doped with
First active layer of the metal oxide semiconductor material formation of metallic element, the metal oxide half by doping nonmetalloid
Second active layer of conductor material formation and the 3rd active layer formed by the oxide semiconductor material that n-type is adulterated.For
For first active layer, in metal-oxide semiconductor (MOS) after doped metallic elements, by the chemistry of metallic element adulterated
Activity is higher than the chemical activity of the metallic element in metal-oxide semiconductor (MOS), so that in metal-oxide semiconductor (MOS)
Oxygen element moved about to the stronger metallic element of chemical activity, and then cause the electron density distribution of oxygen element to being mixed
The electron cloud overlapping degree drop of oxygen element and metallic element in miscellaneous metallic element direction skew, such metal-oxide semiconductor (MOS)
It is low, with reference to can decline so that conduction band bottom is offset to high-energy tail, and then increases the energy difference between conduction band bottom and top of valence band, i.e.,
Increase the energy gap of metal-oxide semiconductor (MOS).After the energy gap increase of metal-oxide semiconductor (MOS), in illumination bar
Under part, metal oxide semiconductor material does not absorb the photon of visible region energy substantially, so that as few as possible inspire
Electron-hole pair, and then improve the reliability of thin film transistor (TFT), such as NBTIS characteristics.
For the second active layer, due to the ionic radius of nonmetalloid that is adulterated in the second active layer and oxygen
The difference of ionic radius is in preset threshold range, therefore, and the nonmetalloid adulterated can reduce oxidation with approximate substitution oxygen
The quantity of Lacking oxygen in thing thin film transistor (TFT) so that the threshold voltage of oxide thin film transistor drifts about to positive direction, obtains
The threshold voltage of appropriate value.In addition, the reduction of Lacking oxygen quantity, can also further reduce volume defect density, so as to improve oxygen
The subthreshold behavior and positive bias stability of compound thin film transistor (TFT), and then improve the reliability of thin film transistor (TFT).
For the 3rd active layer, because the oxide semiconductor material that the 3rd active layer is adulterated by n-type is formed, because
This, the 3rd active layer just has higher carrier concentration, so that the field-effect mobility and PBTS that improve thin film transistor (TFT) are special
Property, and then improve the reliability of thin film transistor (TFT).
The third aspect of the present invention provides array base palte, including the film crystal as described in the first aspect of the present invention
Pipe.
The thin film transistor (TFT) that the beneficial effect of array base palte provided by the present invention is provided with the first aspect of the present invention
Beneficial effect it is identical, here is omitted.
The fourth aspect of the present invention provides display device, including array base palte as according to the third aspect of the invention.
The thin film transistor (TFT) that the beneficial effect of display device provided by the present invention is provided with the first aspect of the present invention
Beneficial effect it is identical, here is omitted.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the accompanying drawing used required in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
The structural representation one for the thin film transistor (TFT) that Fig. 1 is provided by the embodiment of the present invention one；
The structural representation two for the thin film transistor (TFT) that Fig. 2 is provided by the embodiment of the present invention one；
The flow chart one of the preparation method for the thin film transistor (TFT) that Fig. 3 is provided by the embodiment of the present invention two；
The flowchart 2 of the preparation method for the thin film transistor (TFT) that Fig. 4 is provided by the embodiment of the present invention two；
The flow chart 3 of the preparation method for the thin film transistor (TFT) that Fig. 5 is provided by the embodiment of the present invention two.
Description of reference numerals：
1- underlay substrates；The active layers of 2- first；
The active layers of 3- second；The active layers of 4- the 3rd；
5- grids；6- gate insulators；
7- interlayer insulating films；8- source electrodes；
9- drains；10- light shield layers；
11- cushions.
Embodiment
In order to facilitate the understanding of the purposes, features and advantages of the present invention, below in conjunction with present invention implementation
Accompanying drawing in example, the technical scheme in the embodiment of the present invention is clearly and completely described.Obviously, described embodiment
Only a part of embodiment of the invention, rather than whole embodiments.Based on the embodiment in the present invention, the common skill in this area
All other embodiment that art personnel are obtained on the premise of creative work is not made, belongs to the model that the present invention is protected
Enclose.
Embodiment one
As shown in figure 1, present embodiments providing a kind of thin film transistor (TFT), the thin film transistor (TFT) includes being located at underlay substrate 1
The first active layer 2.Wherein, the first active layer 2 is formed by the metal oxide semiconductor material doped with metallic element, is mixed
The chemical activity of miscellaneous metallic element is higher than the chemical activity of the metallic element in metal-oxide semiconductor (MOS).
In the thin film transistor (TFT) that the present embodiment is provided, including by the metal-oxide semiconductor (MOS) doped with metallic element
Material formation the first active layer 2, also, the metallic element adulterated chemical activity be higher than metal-oxide semiconductor (MOS) in
Metallic element chemical activity.Based on metal-oxide semiconductor (MOS) principle, the doping metals in metal-oxide semiconductor (MOS)
After element, by the chemical activity of the metallic element adulterated is higher than the chemistry of the metallic element in metal-oxide semiconductor (MOS)
Activity, so, will cause oxygen element in metal-oxide semiconductor (MOS) to the stronger metallic element of chemical activity
Move about, the electron density distribution of oxygen element is offset to the metallic element direction adulterated, so that metal oxide
The electron cloud overlapping degree reduction of oxygen element and metallic element, with reference to that can decline, makes conduction band bottom be offset to high-energy tail in semiconductor.
And because valence band location keeps constant, conduction band bottom is offset to high-energy tail, and which increases the energy between conduction band bottom and top of valence band
Amount is poor, that is, increases the energy gap of metal-oxide semiconductor (MOS).After the energy gap increase of metal-oxide semiconductor (MOS),
Under illumination condition, metal oxide semiconductor material does not absorb the photon of visible region energy substantially, so that as few as possible
Electron-hole pair is inspired, and then improves the reliability of thin film transistor (TFT), such as NBTIS characteristics improve the aobvious of display device
Show performance.
It is preferred that, the metal oxide semiconductor material that the first active layer 2 is used is indium gallium zinc oxide semiconductor material
Material or Zinc oxide based semiconductor material, the metallic element adulterated are magnesium.
It is exemplary, when the first active layer 2 by the zinc oxide for mixing magnesium (being represented below with Mg) (represents) base half with ZnO below
During the formation of conductor material, the change of the energy gap to mixing the zno-based semi-conducting material after Mg below is described in detail：
Because Mg chemical activity is higher than Zn chemical activity, therefore, adulterate Mg in zno-based semi-conducting material
Afterwards, compared to the electron density distributions of O ions before Mg is mixed to for the degrees of offset of Zn ions, after Mg is mixed, O ions
Electron density distribution is bigger to Mg ions direction degrees of offset, and this is allowed for, and O ions are relative with the interionic electron densities of Zn to be subtracted
It is small so that O ions and Zn ion-electron clouds overlapping degree are reduced, with reference to can decline, and then enable Zn 4s states bands to high-energy tail
Skew.And because Zn 4s states decide the position at conduction band bottom, therefore, Zn 4s state energy bands are offset to high-energy tail, also imply that
Conduction band bottom is offset to high-energy tail, now, and because the valence band location determined by O 2p states keeps constant, this allows for zno-based half
The energy gap increase of conductor material.
It is well known that for existing oxide thin film transistor, in specific external environment, such as high temperature ring
Under border, the oxygen in lattice can be caused to depart from, cause oxygen to lack, Lacking oxygen occur.And the presence of Lacking oxygen, not only result in threshold value
There is serious drift in voltage, can also further result in volume defect.The presence of volume defect, can influence oxide thin film transistor again
Subthreshold behavior and positive bias stability.
To overcome above mentioned problem, above-mentioned thin film transistor (TFT) may also include the table for being located at the first active layer 2 dorsad underlay substrate 1
Second active layer 3 in face.Wherein, the second active layer 3 is formed by the metal oxide semiconductor material doped with nonmetalloid,
The difference of the ionic radius of the nonmetalloid adulterated and the ionic radius of oxygen is in preset threshold range.
By the ionic radius of nonmetalloid and the difference of the ionic radius of oxygen adulterated is in preset threshold range,
Therefore, the nonmetalloid adulterated with approximate substitution oxygen, can reduce the quantity of the Lacking oxygen in oxide thin film transistor, enter
And make it that the threshold voltage of oxide thin film transistor drifts about to positive direction, obtains the threshold voltage of appropriate value.In addition, oxygen is empty
The reduction of bit quantity, also can further reduce volume defect density, so as to improve the subthreshold behavior and just of oxide thin film transistor
Bias stability, and then improve the reliability of thin film transistor (TFT).
It should be noted that when the first active layer 2 is using the formation of indium gallium zinc oxide semi-conducting material, forming second has
The metal oxide semiconductor material of active layer 3 is also indium gallium zinc oxide semi-conducting material；When the first active layer 2 uses zinc oxide
During base semiconductor material formation, the metal oxide semiconductor material that the second active layer 3 of formation is used also partly is led for Zinc oxide-base
Body material.
Above-mentioned preset threshold range refers to the ionic radius of adulterated nonmetalloid set in advance and the ion of oxygen
The number range that the difference of radius is allowed, the concrete numerical value of preset threshold range can be set according to the actual requirements.Can be with
Understand, the ionic radius of the nonmetalloid adulterated and the ionic radius of oxygen are more approached, and nonmetalloid substitutes oxygen
Effect it is better, because the ionic radius of nitrogen and the ionic radius of oxygen are closer to, to the alternative relatively strong of oxygen, therefore, the
The nonmetalloid preferably nitrogen adulterated in two active layers 3.
In addition, for existing oxide thin film transistor, due to active layer and gate insulator bed boundary exist compared with
Many boundary defect states, this may result in positive bias temperature stability (the Positive Bias of oxide thin film transistor
Temperature Stability, hereinafter referred to as PBTS) characteristic deteriorates.
To overcome above mentioned problem, above-mentioned thin film transistor (TFT), which may also include, is located at the second active layer 3 dorsad the first active layer 2
3rd active layer 4 on surface, wherein, the oxide semiconductor material that the 3rd active layer 4 is adulterated by n-type is formed.
Because the oxide semiconductor material that the 3rd active layer 4 is adulterated by n-type is formed, therefore the 3rd active layer 4 just has
Higher carrier concentration, so as to improve the field-effect mobility and PBTS characteristics of thin film transistor (TFT), and then it is brilliant to improve film
The reliability of body pipe.In addition, for the oxide thin film transistor of top gate structure, n-type doping is carried out to the 3rd active layer 4
Source and drain end parasitic series resistance can also be reduced.
It should be noted that when the first active layer 2, the second active layer 3 use indium gallium zinc oxide semi-conducting material shape
Cheng Shi, the metal oxide semiconductor material for forming the 3rd active layer 4 is also indium gallium zinc oxide semi-conducting material；Have when first
When active layer 2, the second active layer 3 are using the formation of Zinc oxide based semiconductor material, the metal oxide half of the 3rd active layer 4 is formed
Conductor material is also Zinc oxide based semiconductor material.
When the first active layer 2, the second active layer 3 and the 3rd active layer 4 use indium gallium zinc oxide semi-conducting material shape
Cheng Shi, the indium gallium zinc oxide semi-conducting material used can be amorphous indium gallium zinc oxide semi-conducting material, or
Polycrystalline indium gallium zinc oxide semi-conducting material, is not specifically limited to embodiment to this.
Wherein, the thickness of the first active layer 2, the second active layer 3 and the 3rd active layer 4, respectively by forming its respective gold
Belong to oxide semiconductor material characteristic and its each played in tft characteristicses effect decision.It is preferred that,
The thickness of first active layer 2 is 20nm~25nm, and the thickness of the second active layer 3 is 10nm~15nm, the thickness of the 3rd active layer 4
For 3nm~7nm.
Have when the thin film transistor (TFT) that the present embodiment is provided is formed simultaneously with the first active layer 2, the second active layer 3 and the 3rd
During active layer 4, the shape of the first active layer 2, the second active layer 3 and the 3rd active layer 4 is preferably identical, so, in thin film transistor (TFT)
Manufacture craft in, can only with a mask plate can simultaneously the first active layer 2, the second active layer 3 and the 3rd active layer 4 are entered
Row photoetching treatment, simplifies fabrication processing, and reduce cost of manufacture.
It is understood that in the thin film transistor (TFT) that the present embodiment is provided, except including the first active layer 2, second
Outside the active layer 4 of active layer 3 and the 3rd, also include the structures such as grid, gate insulator, source electrode and drain electrode, below with top-gated knot
Exemplified by structure, the concrete structure of the thin film transistor (TFT) provided the present embodiment is further described：
Referring again to Fig. 1, grid 5 is formed with the side of the 3rd active layer 4 dorsad the second active layer 3, also,
Between three active layers 4 and grid 5, the gate insulator 6 for insulation is also formed with.In addition, can manage it on underlay substrate 1 has
Insulating barrier 7 between from level to level, it is exhausted that the interlayer insulating film 7 covers the first active layer 2, the second active layer 3 and the 3rd active layer 4, grid
Edge layer 6 and grid 5, are formed after interlayer insulating film 7, on the surface of the dorsad underlay substrate 1 of interlayer insulating film 7, form source electrode 8 and leakage
Pole 9, source electrode 8 and drain electrode 9 are each passed through the via on interlayer insulating film 7, are electrically connected with the 3rd active layer 4.
In addition, as shown in Fig. 2 before thin-film transistor structure is formed, first can form one layer on underlay substrate 1 is used for
The light shield layer 10 of shading, and form one layer of covering light shield layer 10 and substrate base on the surface of the dorsad underlay substrate 1 of light shield layer 10
The cushion 11 of plate 1.
Specifically, gate insulator 6, interlayer insulating film 7 and cushion 11 can use SiOx、SiNx、SiONDeng dielectric material
It is made, can be also made, can also used of new organic insulations such as polysiloxane series, acrylic system, polyimides
AlOx、HfOx、TaOxIt is made Deng high-k (High-k) material.Grid 5, source electrode 8, drain electrode 9 and light shield layer 10 can be using such as
The metal materials such as silver, copper, aluminium, molybdenum are made, and can be also made of such as MoNb/Cu/MoNb composite materials, can also be using such as
The alloy of the various metal materials such as AlNd, MoNb is made.Certainly, above-mentioned each structure can also use other in addition to above-mentioned material
Material is made, and the present embodiment is to this and is not specifically limited.
Embodiment two
As shown in figure 3, present embodiments providing a kind of preparation method of thin film transistor (TFT), the making side of the thin film transistor (TFT)
Method is applied in the thin film transistor (TFT) as described in embodiment one.
The preparation method for the thin film transistor (TFT) that the present embodiment is provided is specifically included：
Step S1：One underlay substrate is provided.
Step S2：In underlay substrate the first active layer of formation, wherein, the first active layer is by the metal doped with metallic element
Oxide semiconductor material is formed, and the chemical activity of the metallic element adulterated is higher than the metal in metal-oxide semiconductor (MOS)
The chemical activity of element.
Step S3：The first active layer dorsad underlay substrate surface formed the second active layer, wherein, the second active layer by
The metal oxide semiconductor material of doping nonmetalloid is formed, the ionic radius of the nonmetalloid adulterated and oxygen from
The difference of sub- radius is in preset threshold range.
Step S4：The 3rd active layer on the second active layer dorsad surface of the first active layer, wherein, the 3rd active layer by
The oxide semiconductor material of n-type doping is formed.
Thin film transistor (TFT) made by the preparation method of the thin film transistor (TFT) provided using the present embodiment, including by adulterating
There are the first active layer, the metal oxide by doping nonmetalloid of the metal oxide semiconductor material formation of metallic element
Second active layer of semi-conducting material formation and the 3rd active layer formed by the oxide semiconductor material that n-type is adulterated.
For the first active layer, in metal-oxide semiconductor (MOS) after doped metallic elements, by the gold adulterated
The chemical activity for belonging to element is higher than the chemical activity of the metallic element in metal-oxide semiconductor (MOS), so that metal oxygen
Oxygen element in compound semiconductor is moved about to the stronger metallic element of chemical activity so that the electron density of oxygen element point
Cloth is offset to the metallic element direction adulterated, the electron cloud weight of oxygen element and metallic element in such metal-oxide semiconductor (MOS)
Folded degree reduction, with reference to can decline so that conduction band bottom is offset to high-energy tail, and then increases the energy between conduction band bottom and top of valence band
Amount is poor, that is, increases the energy gap of metal-oxide semiconductor (MOS).After the energy gap increase of metal-oxide semiconductor (MOS),
Under illumination condition, metal oxide semiconductor material does not absorb the photon of visible region energy substantially, so that as few as possible
Electron-hole pair is inspired, and then improves the reliability of thin film transistor (TFT), such as NBTIS characteristics.
For the second active layer, due to the ionic radius of nonmetalloid that is adulterated in the second active layer and oxygen
The difference of ionic radius is in preset threshold range, therefore, and the nonmetalloid adulterated can reduce oxidation with approximate substitution oxygen
The quantity of Lacking oxygen in thing thin film transistor (TFT) so that the threshold voltage of oxide thin film transistor drifts about to positive direction, obtains
The threshold voltage of appropriate value.In addition, the reduction of Lacking oxygen quantity, can also further reduce volume defect density, so as to improve oxygen
The subthreshold behavior and positive bias stability of compound thin film transistor (TFT), and then improve the reliability of thin film transistor (TFT).
For the 3rd active layer, because the oxide semiconductor material that the 3rd active layer is adulterated by n-type is formed, because
This, the 3rd active layer just has higher carrier concentration, so as to improve the field-effect mobility and PBTS of thin film transistor (TFT)
Characteristic, and then improve the reliability of thin film transistor (TFT).In addition, for the oxide thin film transistor of top gate structure, n-type is mixed
The 3rd miscellaneous active layer can also reduce source and drain end parasitic series resistance.
It is preferred that, the first active layer, the second active layer and the 3rd active layer are by indium gallium zinc oxide semi-conducting material shape
Into, or formed by Zinc oxide based semiconductor material.
It is preferred that, the metallic element adulterated in the first active layer is magnesium, the non-gold adulterated in the second active layer
Category element is nitrogen.
It should be noted that the thickness of the first active layer 2, the second active layer 3 and the 3rd active layer 4, respectively by forming it
The characteristic of respective metal oxide semiconductor material and its effect each played in tft characteristicses are determined
It is fixed.Optionally, the thickness of the first active layer 2 is 20nm~25nm, and the thickness of the second active layer 3 is 10nm~15nm, and the 3rd has
The thickness of active layer 4 is 3nm~7nm.
It is preferred that, after the 3rd active layer is formed, can using mask plate, to the first active layer, the second active layer and
3rd active layer carries out photoetching simultaneously so that the shape of the first active layer, the second active layer and the 3rd active layer is identical, and such one
Come, fabrication processing can be simplified, and reduce cost of manufacture.
When the first active layer, the second active layer and the 3rd active layer are formed using indium gallium zinc oxide semi-conducting material
When, by taking the thin film transistor (TFT) of top gate structure as an example, with reference to Fig. 4 and Fig. 5, the preparation method to thin film transistor (TFT) is carried out specifically
It is bright：
Step H1：One underlay substrate 1 cleaned up is provided.
Step H2：The one layer of 20nm~25nm indium gallium zinc oxide semi-conducting material for mixing magnesium is deposited on underlay substrate 1,
To form the first active layer 2.
Step H3：On the surface of the first active layer 2 dorsad underlay substrate 1, the indium of one layer of 10nm~15nm nitrating is deposited
Gallium zinc oxide semi-conducting material, to form the second active layer 3.
Step H4：On the surface of the second active layer 3 dorsad the first active layer 2, one layer of 3nm~7nm of deposition n-type doping
Indium gallium zinc oxide semi-conducting material, to form the 3rd active layer 4.
Step H5：Using a mask plate, light is carried out simultaneously to the first active layer 2, the second active layer 3 and the 3rd active layer 4
Carve and etching technics, so that the first active layer 2, the second active layer 3 are identical with the shape of the 3rd active layer 4.
Step H6：On the surface of the 3rd active layer 4 dorsad the second active layer 3, pass through photoetching and self-registered technology, form grid
Pole insulating barrier 6.
Step H7：On the surface of dorsad the 3rd active layer 4 of gate insulator 6, pass through photoetching and self-registered technology, form grid
Pole 5.
Step H8：On the surface of the dorsad gate insulator 6 of grid 5, covering grid 5, gate insulator 6, the are formed
The interlayer insulating film 7 of one active layer 2, the second active layer 3 and the 3rd active layer 4, and open up via on interlayer insulating film 7.
Step H9：On the surface of the dorsad grid 5 of interlayer insulating film 7, pass through patterning process formation source electrode 8 and drain electrode 9.Its
In, the source electrode 8 formed and drain electrode 9 are electrically connected through the via on interlayer insulating film 7 with the 3rd active layer 4.
In addition, being formed on underlay substrate before thin-film transistor structure, also one can be formed with the surface of underlay substrate
Layer be used for shading light shield layer, and light shield layer dorsad underlay substrate surface formed one layer covering light shield layer cushion.
Embodiment three
A kind of array base palte is present embodiments provided, the array base palte includes the thin film transistor (TFT) as described in embodiment one.
By the array base palte that the present embodiment is provided includes the thin film transistor (TFT) described in embodiment one, therefore, the battle array
Included thin film transistor (TFT) has stronger reliability, for existing array base palte, the present embodiment in row substrate
The array base palte provided has higher stability.
Example IV
A kind of display device is present embodiments provided, the display device includes the array base palte as described in embodiment three.
By the display device that the present embodiment is provided includes the array base palte described in embodiment three, therefore, display dress
Included thin film transistor (TFT) has stronger reliability in the array base palte put, for existing display device, this
The display device that embodiment is provided has better display performance.
The embodiment of the present invention is the foregoing is only, but protection scope of the present invention is not limited thereto, it is any
Those familiar with the art the invention discloses technical scope in, the change or replacement that can be readily occurred in, all should
It is included within the scope of the present invention.Therefore, protection scope of the present invention should using the scope of the claims as
It is accurate.
Claims (10)
1. a kind of thin film transistor (TFT), it is characterised in that including the first active layer located at underlay substrate, first active layer by
Formed doped with the metal oxide semiconductor material of metallic element, the chemical activity of the metallic element adulterated is higher than described
The chemical activity of metallic element in metal-oxide semiconductor (MOS).
2. thin film transistor (TFT) according to claim 1, it is characterised in that the metallic element adulterated is magnesium.
3. thin film transistor (TFT) according to claim 1, it is characterised in that the thin film transistor (TFT) also includes being located at described the
Second active layer on the one active layer dorsad surface of the underlay substrate, second active layer is by doped with nonmetalloid
Metal oxide semiconductor material is formed, wherein, the difference of the ionic radius of the nonmetalloid adulterated and the ionic radius of oxygen
Value is in preset threshold range.
4. thin film transistor (TFT) according to claim 3, it is characterised in that the nonmetalloid adulterated is nitrogen.
5. thin film transistor (TFT) according to claim 3, it is characterised in that the thin film transistor (TFT) also includes being located at described the
3rd active layer on the two active layers dorsad surface of first active layer, the oxide that the 3rd active layer is adulterated by n-type
Semi-conducting material is formed.
6. the thin film transistor (TFT) according to any one of Claims 1 to 5, it is characterised in that the metal-oxide semiconductor (MOS)
Material is indium gallium zinc oxide semi-conducting material or Zinc oxide based semiconductor material.
7. thin film transistor (TFT) according to claim 5, it is characterised in that first active layer, second active layer
It is identical with the shape of the 3rd active layer；
Wherein, the thickness of first active layer is 20nm~25nm, and the thickness of second active layer is 10nm~15nm, institute
The thickness for stating the 3rd active layer is 3nm~7nm.
8. a kind of preparation method of thin film transistor (TFT), it is characterised in that the preparation method of the thin film transistor (TFT) is applied to as weighed
Profit requires in the thin film transistor (TFT) described in 5~7 any one that the preparation method of the thin film transistor (TFT) includes：
One underlay substrate is provided；
In the underlay substrate the first active layer of formation, wherein, first active layer is by the metal oxygen doped with metallic element
Compound semi-conducting material is formed, and the chemical activity of the metallic element adulterated is higher than the gold in the metal-oxide semiconductor (MOS)
Belong to the chemical activity of element；
First active layer dorsad the underlay substrate surface formed the second active layer, wherein, second active layer
Formed by the metal oxide semiconductor material of doping nonmetalloid, the ionic radius of the nonmetalloid adulterated and oxygen
The difference of ionic radius is in preset threshold range；
The 3rd active layer on the second active layer dorsad surface of first active layer, wherein, the 3rd active layer
The oxide semiconductor material adulterated by n-type is formed.
9. a kind of array base palte, it is characterised in that including the thin film transistor (TFT) as described in any one of claim 1~7.
10. a kind of display device, it is characterised in that including array base palte as claimed in claim 9.
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| WO2023024117A1 (en) * | 2021-08-27 | 2023-03-02 | 京东方科技集团股份有限公司 | Thin film transistor, display panel and display device |
| WO2023087347A1 (en) * | 2021-11-17 | 2023-05-25 | 惠州华星光电显示有限公司 | Display panel and manufacturing method therefor |
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| WO2023184231A1 (en) * | 2022-03-30 | 2023-10-05 | 京东方科技集团股份有限公司 | Metal oxide thin film transistor, semiconductor device, and display apparatus |
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