CN107302303B - Control circuit for reducing output voltage ripple, driving power supply and television - Google Patents

Control circuit for reducing output voltage ripple, driving power supply and television Download PDF

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Publication number
CN107302303B
CN107302303B CN201710734936.0A CN201710734936A CN107302303B CN 107302303 B CN107302303 B CN 107302303B CN 201710734936 A CN201710734936 A CN 201710734936A CN 107302303 B CN107302303 B CN 107302303B
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llc
switching
voltage
chip
output voltage
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CN107302303A (en
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李亚伟
巢铁牛
陈赞添
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Shenzhen Chuangwei RGB Electronics Co Ltd
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Shenzhen Chuangwei RGB Electronics Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/14Arrangements for reducing ripples from dc input or output
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention discloses a control circuit for reducing output voltage ripples, a driving power supply and a television, wherein the control circuit comprises a first switch module and a second switch module; when the switching signal is at a high level, the first switching module is started and outputs a first voltage signal to the LLC chip to control the LLC chip to exit the standby mode, and meanwhile, the second switching module is started and outputs a first feedback voltage to the LLC chip to control the LLC circuit to output a direct-current voltage; when the switching signal is at a low level, the first switch module is turned off and outputs a second voltage signal to the LLC chip, the LLC chip is controlled to enter a standby mode, meanwhile, the second switch module is turned off and outputs a second feedback voltage to the LLC chip, the working frequency of the LLC chip is controlled to rise, the response speed of the feedback loop is increased, and then the output voltage ripple of the LLC circuit is reduced. The response speed of the feedback loop can be improved in a standby state while the startup standby mode is adjusted, and then the output voltage ripple of the LLC circuit is effectively reduced.

Description

Control circuit for reducing output voltage ripple, driving power supply and television
Technical Field
The invention relates to the technical field of power supplies of electric appliances, in particular to a control circuit, a driving power supply and a television for reducing output voltage ripples.
Background
With the innovation of product technology, the power supply scheme without the standby circuit is gradually mature, when in standby, the power supply outputs about 10V voltage to supply power to a mainboard CPU, so that the mainboard can normally work and simultaneously can meet the national standard that the standby power consumption of the whole machine is lower than 0.5W. At present, the television with HDR function can bring strong regret feeling to users in the aspects of color gamut, contrast and depth of field, and consumers are praised. However, the overall power of the function is generally larger, so that the power architecture adopts an LLC half-bridge resonant circuit as a main circuit.
The conventional LLC half-bridge resonant circuit scheme generally adopts control chips such as TEA1716 of NXP company, SSC3S910 of Mitsui company, 6A31 of Fuji company and the like, but the common defects of the chips are that in a standby state, a power supply is in a light load mode, the LLC chip enters an intermittent oscillation mode, as shown in FIG. 1, a driving waveform outputs driving energy at certain time intervals, the LLC circuit does not output energy when the chip does not oscillate, and as shown in FIG. 2, the LLC chip continuously outputs the driving energy and drives the MOS tube of the LLC circuit to operate when the chip does not normally operate in a standby state, so that the output voltage in the standby mode is not constant direct current voltage and is similar to a sawtooth wave type and oscillates repeatedly in a 7V ~ 12V interval, as shown in FIG. 3, when the driving waveform of the chip is high level, a secondary filter capacitor is charged (time period b), the driving waveform is low level, the secondary filter capacitor is discharged (time period a), therefore, in the standby mode, the output voltage of the power supply is large, the secondary filter capacitor has an influence on power supply voltage, and other early-used devices can fail, and other elements can cause early-failure.
Thus, the prior art has yet to be improved and enhanced.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a control circuit, a driving power supply and a television set for reducing output voltage ripples, wherein the control circuit is embedded in a feedback loop, so as to improve the response speed of the feedback loop in a standby state while adjusting a power-on standby mode, thereby effectively reducing the output voltage ripples of an LLC circuit.
In order to achieve the purpose, the invention adopts the following technical scheme:
a control circuit for reducing output voltage ripples is connected with a feedback pin and a standby signal input pin of an LLC chip and comprises a first switch module and a second switch module; when the switching signal is at a high level, the first switch module is turned on and outputs a first voltage signal to a standby signal input pin of the LLC chip to control the LLC chip to exit the standby mode, and meanwhile, the second switch module is turned on and outputs a first feedback voltage to a feedback pin of the LLC chip to control the working frequency of the LLC chip to be reduced, and the LLC circuit outputs direct-current voltage; when the switching signal is at a low level, the first switch module is turned off and outputs a second voltage signal to a standby signal input pin of the LLC chip to control the LLC chip to enter a standby mode, and meanwhile, the second switch module is turned off and outputs a second feedback voltage to a feedback pin of the LLC chip to control the working frequency of the LLC chip to rise, so that the response speed of a feedback loop is increased, and the output voltage ripple of the LLC circuit is reduced.
In the control circuit for reducing the output voltage ripple, the first switch module comprises a first voltage division unit, a first filtering unit and a first switch unit; when a switching signal is at a high level, the switching voltage is at the high level, the first switching unit is started and outputs a first voltage signal to a standby signal input pin of the LLC chip, and the LLC chip is controlled to exit a standby mode; when the switch signal is at a low level, the switch voltage is at the same low level, the first switch unit is turned off and outputs a second voltage signal to the standby signal input pin of the LLC chip, and the LLC chip is controlled to enter a standby mode.
In the control circuit for reducing the output voltage ripple, the second switch module comprises a second voltage division unit, a second filtering unit and a second switch unit; when a switching signal is at a high level, the switching voltage is at the same high level, the second switching unit is started and outputs a first feedback voltage to a feedback pin of the LLC chip, the working frequency of the LLC chip is controlled to be reduced, and the LLC circuit outputs direct-current voltage; when the switching signal is at a low level, the switching voltage is at the same low level, the second switching unit is switched off and outputs a second feedback voltage to the feedback pin of the LLC chip, the working frequency of the LLC chip is controlled to be increased, the response speed of the feedback loop is increased, and the output voltage ripple of the LLC circuit is further reduced.
In the control circuit for reducing the output voltage ripple, the first voltage division unit comprises a first resistor and a second resistor, the first filtering unit comprises a first capacitor, the first switching unit comprises a first switching tube, one end of the first resistor is connected with a switching signal input end, and the other end of the first resistor is connected with one end of the second resistor, one end of the first capacitor and the 1 st end of the first switching tube; the other end of the second resistor, the other end of the first capacitor and the 3 rd end of the first switching tube are grounded; and the 2 nd end of the first switch tube is connected with a standby signal input pin of the LLC chip.
In the control circuit for reducing the output voltage ripple, the second voltage division unit comprises a third resistor and a fourth resistor, the second filtering unit comprises a second capacitor, the second switching unit comprises a second switching tube, one end of the third resistor is connected with the switching signal input end, and the other end of the third resistor is connected with one end of the fourth resistor, one end of the second capacitor and the 1 st end of the second switching tube; the other end of the fourth resistor, the other end of the second capacitor and the 3 rd end of the second switching tube are all grounded; and the 2 nd end of the second switch tube is connected with a feedback pin of the LLC chip.
In the control circuit for reducing the output voltage ripple, the first switch tube is a first MOS tube or a first triode.
In the control circuit for reducing the output voltage ripple, the second switching tube is a second MOS tube or a second triode.
In the control circuit for reducing the output voltage ripple, the first MOS transistor is an N-channel MOS transistor, and the first triode is an NPN-type triode.
The utility model provides a reduce drive power supply of output voltage ripple, includes the shell, be provided with the PCB board in the shell, be provided with on the PCB board as above reduce the control circuit of output voltage ripple.
A television set comprising a drive power supply with reduced output voltage ripple as described above.
Compared with the prior art, in the control circuit for reducing the output voltage ripple, the driving power supply and the television, the control circuit for reducing the output voltage ripple is connected with the feedback pin and the standby signal input pin of the LLC chip and comprises a first switch module and a second switch module; when the switching signal is at a high level, the first switch module is turned on and outputs a first voltage signal to a standby signal input pin of the LLC chip to control the LLC chip to exit the standby mode, and meanwhile, the second switch module is turned on and outputs a first feedback voltage to a feedback pin of the LLC chip to control the working frequency of the LLC chip to be reduced, and the LLC circuit outputs direct-current voltage; when the switching signal is at a low level, the first switch module is turned off and outputs a second voltage signal to a standby signal input pin of the LLC chip to control the LLC chip to enter a standby mode, and meanwhile, the second switch module is turned off and outputs a second feedback voltage to a feedback pin of the LLC chip to control the working frequency of the LLC chip to rise, so that the response speed of a feedback loop is increased, and the output voltage ripple of the LLC circuit is reduced. By embedding the control circuit in the feedback loop, the response speed of the feedback loop can be improved in a standby state while the startup standby mode is adjusted, and the output voltage ripple of the LLC circuit is further effectively reduced.
Drawings
FIG. 1 is a driving waveform diagram of an LLC chip in a standby state;
FIG. 2 is a driving waveform diagram of the LLC chip in normal operation;
FIG. 3 is a graph of output voltage waveforms of the LLC circuit in the standby state of the LLC chip;
fig. 4 is a block diagram of a control circuit for reducing output voltage ripples according to the present invention;
fig. 5 is a circuit diagram of a first embodiment of a control circuit for reducing output voltage ripples according to the present invention;
fig. 6 is a circuit diagram of a control circuit for reducing output voltage ripples according to a second embodiment of the present invention;
FIG. 7 is a graph of the output voltage waveform of an LLC circuit without a control circuit for reducing output voltage ripple in an embodiment of the invention;
fig. 8 is a graph of the output voltage waveform of an LLC circuit when a control circuit for reducing output voltage ripple has been used in an embodiment of the present invention.
Detailed Description
The invention provides a control circuit for reducing output voltage ripples, a driving power supply and a television, wherein the control circuit is embedded in a feedback loop, so that the response speed of the feedback loop can be improved in a standby state while a power-on standby mode is adjusted, and the output voltage ripples of an LLC circuit are further effectively reduced.
In order to make the objects, technical solutions and effects of the present invention clearer and clearer, the present invention is further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 4, the control circuit 10 for reducing output voltage ripples provided by the present invention is connected to a feedback pin FB and a standby signal input pin STB of an LLC chip 20, the LLC chip 20 is further connected to a back-end LLC circuit 30, and the LLC chip 20 controls an output voltage of the LLC circuit 30, in the following embodiments, the LLC chips 20 are all described by taking a control chip with a model number of 6a31 from fuji corporation as an example, it should be understood that, in other embodiments, other LLC chips 20 with the same function may also be adopted, for example, TEA1716 from NXP corporation, SSC3S910 from sanctual corporation, and the present invention is not limited to this, and the LLC circuit 30 is a currently existing application circuit, for example, an LLC half-bridge resonant circuit, an LLC full-bridge resonant circuit, and the like, and the circuit structure and the connection relationship thereof are not described in detail.
The control circuit for reducing the output voltage ripple provided by the invention mainly achieves the purpose of reducing the output voltage ripple by improving the feedback loop of the LLC chip 20, because the FB feedback pin of the LLC chip 20 usually connects one way of resistor string capacitor to ground, i.e. the eleventh resistor R11 and the eleventh capacitor C11, and one way of capacitor to ground, i.e. the tenth capacitor C10, and the two ways are in parallel relation, wherein the tenth capacitor C10 plays a role in soft start, and adjusts the time from non-operation to operation of the circuit when the circuit is started, and the eleventh capacitor C11 is connected in series with the eleventh resistor R11 to form an RC filter loop, and adjusts the response speed and the output voltage ripple of the whole loop. When the LLC chip 20 works normally, both the two circuits work, and when in standby, the control circuit for reducing the output voltage ripple is embedded in one or both of the two circuits, so that the response speed is increased, and the purpose of reducing the output voltage ripple is achieved. In this embodiment, the control circuit is connected to the RC filtering branch for explanation, but in other embodiments, another branch may be connected or two branches may be embedded into the control circuit at the same time, which may be specifically selected according to actual requirements, and the present invention is not limited thereto.
Referring to fig. 4, the control circuit for reducing the output voltage ripple includes a first switch module 11 and a second switch module 12, where the first switch module 11 is connected to an STB standby signal input pin of the LLC chip 20, the second switch module 12 is connected to an FB feedback pin of the LLC chip 20 through an RC filtering branch, both the first switch module 11 and the second switch module 12 are connected to a switch signal ON/OFF input end, when a switch signal is at a high level, the first switch module 11 is turned ON and outputs a first voltage signal to the standby signal input pin of the LLC chip 20 to control the LLC chip 20 to exit from the standby mode, and meanwhile, the second switch module 12 is turned ON and outputs a first feedback voltage to the feedback pin of the LLC chip 20 to control the working frequency of the LLC chip 20 to be reduced, and the LLC circuit 30 outputs a dc voltage; when the switching signal is at a low level, the first switch module 11 turns off and outputs the second voltage signal to the standby signal input pin of the LLC chip 20, so as to control the LLC chip 20 to enter the standby mode, and at the same time, the second switch module 12 turns off and outputs the second feedback voltage to the feedback pin of the LLC chip 20, so as to control the working frequency of the LLC chip 20 to increase, improve the response speed of the feedback loop, and further reduce the output voltage ripple of the LLC circuit 30.
The invention realizes the switching between the power-on mode and the standby mode by embedding the control circuit in the feedback loop, the first switch module 11 is switched on or off according to the switch signal, the second switch module 12 is switched on in the power-on mode to enable two branches with the FB feedback pin to normally work and output a first feedback voltage to the LLC chip 20, the second switch module is switched off in the standby mode to enable the RC filter branch to suspend and output a second feedback voltage to the LLC chip 20, specifically, the first feedback voltage is greater than the second feedback voltage, namely, when in the power-on mode, the working voltage of the FB pin of the LLC chip 20 is increased, the working frequency is reduced, the subsequent LLC circuit 30 outputs stable direct current voltage, and when in the standby mode, the working voltage of the FB pin of the LLC chip 20 is reduced, the working frequency is increased, the response speed of the feedback loop is increased, and the output voltage ripple of the LLC circuit 30 is effectively reduced, and the damage to the rear-end component caused by overlarge ripple voltage amplitude is avoided.
Further, referring to fig. 5 and fig. 6 together, the first switch module 11 includes a first voltage dividing unit 111, a first filtering unit 112 and a first switch unit 113, the first voltage dividing unit 111, the first filtering unit 112 and the first switch unit 113 are sequentially connected, the first switch unit 113 is further connected to an STB pin of the LLC chip U1, the first voltage dividing unit 111 divides a currently input switch voltage and outputs the first divided voltage to the first filtering unit 112, the first divided voltage is filtered by the first filtering unit 112 and then outputs the first divided voltage to the first switch unit 113, specifically, when the switch signal is at a high level, the switch voltage is at the high level, at this time, the first switch unit 113 is turned on and outputs a first voltage signal to the STB pin of the LLC chip U1 to control the LLC chip U1 to exit the standby mode, in this embodiment, the first voltage signal is 0V, that is when the first switch unit 113 is turned on, when the STB pin detects 0V voltage, the LLC chip U1 is controlled to exit the standby mode and enter a normal working mode; and when the switching signal is at a low level, the switching voltage is at a low level, at this time, the first switching unit 113 is turned off and outputs a second voltage signal to the STB pin of the LLC chip U1, and the LLC chip U1 is controlled to enter the standby mode, in this embodiment, the second voltage signal is not 0V, that is, when the first switching unit 113 is turned off, the STB pin does not detect the voltage of 0V, at this time, the LLC chip U1 is controlled not to exit the standby mode, and is maintained in the standby mode, so that the working state of the first switching unit 113 is controlled by the first voltage division voltage after voltage division, and further, the switching of the working mode of the LLC chip U1 is realized.
Further, the second switch module 12 includes a second voltage dividing unit 121, a second filtering unit 122 and a second switch unit 123, the second voltage dividing unit 121, the second filtering unit 122 and the second switch unit 123 are sequentially connected, the second switch unit 123 is further connected to the FB pin of the LLC chip U1 sequentially through an eleventh resistor R11 and an eleventh capacitor C11, the second voltage dividing unit 121 divides the currently input switching voltage, outputs a second divided voltage to the second filtering unit 122, and outputs the second divided voltage to the second switch unit 123 after being filtered by the second filtering unit 122, specifically, when the switching signal is at a high level, the switching voltage is at the same high level, at this time, the second switch unit 123 turns on and outputs a first feedback voltage to the FB pin of the LLC chip U1, controls the operating frequency of the LLC chip U1 to decrease, and the LLC circuit 30 outputs a dc voltage; when the switching signal is at a low level, the switching voltage is at a low level, and at this time, the second switching unit 123 is turned off and the second switching unit 123 at the output terminal is turned off and outputs the second feedback voltage to the FB pin of the LLC chip U1, so as to control the operating frequency of the LLC chip U1 to increase, improve the response speed of the feedback loop, and further reduce the output voltage ripple of the LLC circuit 30. Specifically when being in the boot mode, the RC filtering branch road is closed, the operating voltage of LLC chip U1FB foot improves, make its operating frequency reduce, control LLC circuit 30 output stable DC voltage, and when being in standby mode, the RC filtering branch road is unsettled, the operating voltage of LLC chip U1FB foot reduces, make its operating frequency rise, improve feedback loop's response speed, and then effectively reduce LLC circuit 30's output voltage ripple, avoid the influence of output voltage ripple to consumer, improve standby voltage's stability.
Specifically, the first voltage dividing unit 111 includes a first resistor R1 and a second resistor R2, the first filtering unit 112 includes a first capacitor C1, the first switching unit 113 includes a first switching tube, one end of the first resistor R1 is connected to the switching signal input end, and the other end of the first resistor R1 is connected to one end of the second resistor R2, one end of the first capacitor C1, and the 1 st end of the first switching tube; the other end of the second resistor R2, the other end of the first capacitor C1 and the 3 rd end of the first switch tube are all grounded; the 2 nd end of the first switch tube is connected with a standby signal input pin of the LLC chip U1, and the voltage detected by the STB pin is controlled by turning on and off the first switch tube, so that the switching between the starting state and the standby state is realized.
The second voltage division unit 121 includes a third resistor R3 and a fourth resistor R4, the second filter unit 122 includes a second capacitor C2, and the second switch unit 123 includes a second switch tube; one end of the third resistor R3 is connected with a switching signal input end, and the other end of the third resistor R3 is connected with one end of the fourth resistor R4, one end of the second capacitor C2 and the 1 st end of the second switching tube; the other end of the fourth resistor R4, the other end of the second capacitor C2 and the 3 rd end of the second switch tube are all grounded; the 2 nd end of the second switch tube is connected with a feedback pin of an LLC chip U1, the connection and disconnection state of the RC filtering branch circuit is controlled through the on and off of the second switch tube, the working voltage of the FB pin and the working frequency of the chip are controlled, the response speed of a feedback loop is accelerated in a standby state, and the purpose of reducing output voltage ripples is achieved.
Preferably, in a specific implementation, the present invention provides two embodiments, and in the first embodiment, as shown in fig. 5, the first switching transistor and the second switching transistor both use MOS transistors, where the first switching transistor is a first MOS transistor M1, and the second switching transistor is a second MOS transistor M2; specifically, the gate of the first MOS transistor M1 is the 1 st end of the first switching transistor, the drain of the first MOS transistor M1 is the 2 nd end of the first switching transistor, and the source of the first MOS transistor M1 is the 3 rd end of the first switching transistor; the gate of the second MOS transistor M2 is the 1 st end of the second switch transistor, the drain of the second MOS transistor M2 is the 2 nd end of the second switch transistor, and the source of the second MOS transistor M2 is the 3 rd end of the second switch transistor. In this embodiment, the first MOS transistor M1 and the second MOS transistor M2 are both N-channel MOS transistors.
In a second embodiment, as shown in fig. 6, the first switching tube and the second switching tube both use a triode, where the first switching tube is a first triode and the second switching tube is a second triode; specifically, the base of the first triode Q1 is the 1 st end of the first switching tube, the collector of the first triode Q1 is the 2 nd end of the second switching tube, and the emitter of the second triode Q2 is the 3 rd end of the second switching tube; the base of the second triode Q2 is the 1 st end of the second switching tube, the collector of the second triode Q2 is the 2 nd end of the second switching tube, and the emitter of the second triode Q2 is the 3 rd end of the second switching tube. In this embodiment, the first transistor Q1 and the second transistor Q2 are both NPN transistors, and preferably, in order to further improve the reliability of the first transistor Q1 and the second transistor Q2 as switching tubes, a fifth resistor R5 is connected in parallel between the base and the emitter of the first transistor Q1, and a sixth resistor R6 is connected in parallel between the base and the emitter of the second transistor Q1.
It should be noted that the remaining components not labeled in the drawing, such as the resistor, the capacitor and the zener diode, are conventional components of the peripheral working circuit of the LLC chip U1, which are prior art, and the connection relationship thereof is not described herein again.
Based on the control circuit for reducing the output voltage ripple, the invention also provides a driving power supply for reducing the output voltage ripple, which comprises a housing, wherein a PCB is arranged in the housing, and the control circuit for reducing the output voltage ripple is arranged on the PCB.
The present invention also provides a television set including the driving power supply with reduced output voltage ripple as described above, which is not described in detail herein since the driving power supply with reduced output voltage ripple has been described in detail above.
In order to better understand the control process of the control circuit for reducing the output voltage ripple provided by the present invention, the following describes the operation process of the control circuit for reducing the output voltage ripple by taking an application embodiment in conjunction with fig. 5, fig. 7, and fig. 8:
as shown in fig. 5, the FB pin of the LLC chip is externally connected to a tenth capacitor C10 to ground, and an eleventh resistor R11 connected in series with the eleventh capacitor C11 is connected to ground through the second MOS transistor, wherein the tenth capacitor C10 is activated to perform a soft start function, so as to adjust the time from non-operation to operation of the circuit during the power-on. The eleventh capacitor C11 is connected in series with an eleventh resistor R11 to form an RC filter circuit, response speed and output voltage ripple of the whole circuit are adjusted, when a switching signal ON/OFF is at a high level, the switching voltage is at a high level, the voltage is divided into two paths, one path is divided by the first resistor and the second resistor, filtering is carried out by the first capacitor, conducting voltage is provided for a grid electrode of the first MOS tube, after the first MOS tube is conducted, a STB pin of the LLC chip detects 0V voltage, and the LLC chip is made to exit a Boost standby mode. Meanwhile, the other path of voltage is divided by a third resistor and a fourth resistor, and is filtered by a second capacitor to provide a conducting voltage for the grid electrode of the second MOS tube, after the second MOS tube is conducted, the working voltage of the FB pin is increased, the working frequency of the LLC chip is reduced, and the LLC circuit works normally and outputs constant direct-current voltage. When the switching signal ON/OFF is at a low level, the switching voltage is at a low level. The first MOS tube is closed, the pin of the LLC chip STB can not detect 0V voltage, the pin can not exit a Boost standby mode, the pin is maintained in a standby state, the second MOS tube is also closed, the eleventh capacitor C11 is connected with the eleventh resistor R11 in series, the filter circuit is suspended, the voltage of the FB pin can be reduced, the working frequency is increased, the response speed of the feedback loop is increased, and the output voltage ripple of the LLC circuit is further reduced. The control mode of the triode is the same as that of the MOS tube, and the details are not repeated here.
The control circuit can be adopted to obviously improve the output voltage ripple, as shown in fig. 7 and 8, before the control circuit is not adopted, the output voltage oscillation amplitude V1 of the LLC circuit is 2V, and the output voltage oscillation amplitude V1 of the LLC circuit after the control circuit is adopted is 0.48V, so that the improvement effect is remarkable, and the safety and the stability of the circuit are effectively improved.
In summary, in the control circuit for reducing output voltage ripples, the driving power supply and the television provided by the present invention, the control circuit for reducing output voltage ripples is connected to the feedback pin and the standby signal input pin of the LLC chip, and includes a first switch module and a second switch module; when the switching signal is at a high level, the first switch module is turned on and outputs a first voltage signal to a standby signal input pin of the LLC chip to control the LLC chip to exit the standby mode, and meanwhile, the second switch module is turned on and outputs a first feedback voltage to a feedback pin of the LLC chip to control the working frequency of the LLC chip to be reduced, and the LLC circuit outputs direct-current voltage; when the switching signal is at a low level, the first switch module is turned off and outputs a second voltage signal to a standby signal input pin of the LLC chip to control the LLC chip to enter a standby mode, and meanwhile, the second switch module is turned off and outputs a second feedback voltage to a feedback pin of the LLC chip to control the working frequency of the LLC chip to rise, so that the response speed of a feedback loop is increased, and the output voltage ripple of the LLC circuit is reduced. By embedding the control circuit in the feedback loop, the response speed of the feedback loop can be improved in a standby state while the startup standby mode is adjusted, and the output voltage ripple of the LLC circuit is further effectively reduced.
It should be understood that equivalents and modifications of the technical solution and inventive concept thereof may occur to those skilled in the art, and all such modifications and alterations should fall within the scope of the appended claims.

Claims (9)

1. A control circuit for reducing output voltage ripples is characterized in that the control circuit is connected with a feedback pin and a standby signal input pin of an LLC chip and comprises a first switch module and a second switch module; when the switching signal is at a high level, the first switch module is turned on and outputs a first voltage signal to a standby signal input pin of the LLC chip to control the LLC chip to exit the standby mode, and meanwhile, the second switch module is turned on and outputs a first feedback voltage to a feedback pin of the LLC chip to control the working frequency of the LLC chip to be reduced, and the LLC circuit outputs direct-current voltage; when the switching signal is at a low level, the first switching module is switched off and outputs a second voltage signal to a standby signal input pin of the LLC chip to control the LLC chip to enter a standby mode, and meanwhile, the second switching module is switched off and outputs a second feedback voltage to a feedback pin of the LLC chip to control the working frequency of the LLC chip to rise, so that the response speed of a feedback loop is increased, and the output voltage ripple of the LLC circuit is reduced;
the first switch module is switched on or off according to the switch signal to realize the switching between the starting mode and the standby mode;
the second switch module is connected with a feedback pin of the LLC chip through an RC filtering branch circuit;
the second switch module comprises a second voltage division unit, a second filtering unit and a second switch unit; when a switching signal is at a high level, the switching voltage is at the same high level, the second switching unit is started and outputs a first feedback voltage to a feedback pin of the LLC chip, the working frequency of the LLC chip is controlled to be reduced, and the LLC circuit outputs direct-current voltage; when the switching signal is at a low level, the switching voltage is at the low level, the second switching unit is turned off and outputs a second feedback voltage to the feedback pin of the LLC chip, the working frequency of the LLC chip is controlled to be increased, the response speed of a feedback loop is increased, and the output voltage ripple of the LLC circuit is further reduced;
in a starting-up mode, the RC filtering branch is closed; and when in a standby mode, the RC filtering branch is suspended.
2. The control circuit for reducing the output voltage ripple of claim 1, wherein the first switching module comprises a first voltage division unit, a first filtering unit and a first switching unit; when a switching signal is at a high level, the switching voltage is at the high level, the first switching unit is started and outputs a first voltage signal to a standby signal input pin of the LLC chip, and the LLC chip is controlled to exit a standby mode; when the switch signal is at a low level, the switch voltage is at the same low level, the first switch unit is turned off and outputs a second voltage signal to the standby signal input pin of the LLC chip, and the LLC chip is controlled to enter a standby mode.
3. The control circuit for reducing the output voltage ripple according to claim 2, wherein the first voltage division unit includes a first resistor and a second resistor, the first filtering unit includes a first capacitor, the first switching unit includes a first switching tube, one end of the first resistor is connected to the switching signal input terminal, and the other end of the first resistor is connected to one end of the second resistor, one end of the first capacitor, and the 1 st end of the first switching tube; the other end of the second resistor, the other end of the first capacitor and the 3 rd end of the first switching tube are grounded; and the 2 nd end of the first switch tube is connected with a standby signal input pin of the LLC chip.
4. The control circuit for reducing the output voltage ripple according to claim 1, wherein the second voltage division unit includes a third resistor and a fourth resistor, the second filtering unit includes a second capacitor, the second switching unit includes a second switching tube, one end of the third resistor is connected to the switching signal input end, and the other end of the third resistor is connected to one end of the fourth resistor, one end of the second capacitor, and the 1 st end of the second switching tube; the other end of the fourth resistor, the other end of the second capacitor and the 3 rd end of the second switching tube are all grounded; and the 2 nd end of the second switch tube is connected with a feedback pin of the LLC chip.
5. The control circuit for reducing the output voltage ripple according to claim 3, wherein the first switching tube is a first MOS tube or a first triode.
6. The control circuit for reducing the output voltage ripple according to claim 4, wherein the second switching tube is a second MOS tube or a second triode.
7. The control circuit for reducing the output voltage ripple according to claim 5, wherein the first MOS transistor is an N-channel MOS transistor, and the first triode is an NPN-type triode.
8. A driving power supply for reducing output voltage ripples, comprising a housing, wherein a PCB is arranged in the housing, and the PCB is provided with a control circuit for reducing output voltage ripples according to any one of claims 1 to 7.
9. A television set comprising the driving power supply with reduced output voltage ripple according to claim 8.
CN201710734936.0A 2017-08-24 2017-08-24 Control circuit for reducing output voltage ripple, driving power supply and television Active CN107302303B (en)

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Publication number Priority date Publication date Assignee Title
CN107017774A (en) * 2016-01-28 2017-08-04 富士电机株式会社 Switching power unit
CN206389269U (en) * 2016-10-26 2017-08-08 广州金升阳科技有限公司 drive control circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107017774A (en) * 2016-01-28 2017-08-04 富士电机株式会社 Switching power unit
CN206389269U (en) * 2016-10-26 2017-08-08 广州金升阳科技有限公司 drive control circuit

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