CN107293554A - The preparation method and its structure of top-emitting OLED panel - Google Patents
The preparation method and its structure of top-emitting OLED panel Download PDFInfo
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- CN107293554A CN107293554A CN201710466284.7A CN201710466284A CN107293554A CN 107293554 A CN107293554 A CN 107293554A CN 201710466284 A CN201710466284 A CN 201710466284A CN 107293554 A CN107293554 A CN 107293554A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 37
- 239000004020 conductor Substances 0.000 claims abstract description 74
- 239000004065 semiconductor Substances 0.000 claims abstract description 64
- 238000000034 method Methods 0.000 claims abstract description 44
- 239000012212 insulator Substances 0.000 claims abstract description 42
- 229910052751 metal Inorganic materials 0.000 claims abstract description 36
- 239000002184 metal Substances 0.000 claims abstract description 36
- 230000008569 process Effects 0.000 claims abstract description 30
- 238000003851 corona treatment Methods 0.000 claims abstract description 9
- 238000007641 inkjet printing Methods 0.000 claims abstract description 9
- 238000012545 processing Methods 0.000 claims abstract description 9
- 239000010410 layer Substances 0.000 claims description 256
- 239000010408 film Substances 0.000 claims description 46
- 239000011229 interlayer Substances 0.000 claims description 37
- 239000000463 material Substances 0.000 claims description 32
- 239000000758 substrate Substances 0.000 claims description 27
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 26
- 238000002161 passivation Methods 0.000 claims description 26
- 239000010409 thin film Substances 0.000 claims description 19
- 239000010949 copper Substances 0.000 claims description 13
- 239000010936 titanium Substances 0.000 claims description 13
- 239000000956 alloy Substances 0.000 claims description 12
- 229910045601 alloy Inorganic materials 0.000 claims description 12
- 229910052782 aluminium Inorganic materials 0.000 claims description 12
- 229910052802 copper Inorganic materials 0.000 claims description 12
- 229910052750 molybdenum Inorganic materials 0.000 claims description 12
- 229910052719 titanium Inorganic materials 0.000 claims description 12
- 238000009413 insulation Methods 0.000 claims description 10
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 9
- 239000000377 silicon dioxide Substances 0.000 claims description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 9
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 8
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 8
- 229910052733 gallium Inorganic materials 0.000 claims description 8
- 229910052738 indium Inorganic materials 0.000 claims description 8
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 7
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 7
- 239000004411 aluminium Substances 0.000 claims description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 7
- 239000011733 molybdenum Substances 0.000 claims description 7
- 230000004888 barrier function Effects 0.000 claims description 6
- 238000010276 construction Methods 0.000 claims description 5
- 230000008021 deposition Effects 0.000 claims description 5
- HRHKULZDDYWVBE-UHFFFAOYSA-N indium;oxozinc;tin Chemical compound [In].[Sn].[Zn]=O HRHKULZDDYWVBE-UHFFFAOYSA-N 0.000 claims description 4
- 239000011787 zinc oxide Substances 0.000 claims description 4
- 230000008859 change Effects 0.000 claims description 3
- KYKLWYKWCAYAJY-UHFFFAOYSA-N oxotin;zinc Chemical compound [Zn].[Sn]=O KYKLWYKWCAYAJY-UHFFFAOYSA-N 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 19
- 238000010586 diagram Methods 0.000 description 12
- 230000009467 reduction Effects 0.000 description 9
- 229910004205 SiNX Inorganic materials 0.000 description 8
- 229910052814 silicon oxide Inorganic materials 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 6
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- -1 IGZO) Chemical compound 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 239000003086 colorant Substances 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 230000027756 respiratory electron transport chain Effects 0.000 description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- GRCJTSHIYCFXFK-UHFFFAOYSA-N [O--].[O--].[O--].[O--].[Ag+].[In+3].[Sn+4] Chemical compound [O--].[O--].[O--].[O--].[Ag+].[In+3].[Sn+4] GRCJTSHIYCFXFK-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004040 coloring Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000002207 thermal evaporation Methods 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/126—Shielding, e.g. light-blocking means over the TFTs
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The present invention provides a kind of preparation method and its structure of top-emitting OLED panel.Light shield layer and reflector layer is made by carrying out patterned process to the first metal layer in the preparation method of the top-emitting OLED panel, is capable of the manufacture craft of simplified anode, reduces the risk for bad problem occur;Carry out the corona treatment in whole face after grid and gate insulator to oxide semiconductor layer by being produced on oxide semiconductor layer, so that the partial ohmic that oxide semiconductor layer is not blocked by grid and gate insulator is reduced, form conductor layer, and the part blocked by grid and gate insulator is still semiconductor, form semiconductor channel area, OLED anode is used as using the conductor layer, the gold-tinted and etch process that anode is fabricated separately can be saved, the preparation of traditional flatness layer and pixel defining layer can be saved in addition, so as to reduce gold-tinted processing procedure road number, save light shield quantity, reduce cost of manufacture;Using inkjet printing OLED luminescent layers, cost of manufacture can be further reduced.
Description
Technical field
The present invention relates to OLED display technology fields, more particularly to a kind of top-emitting OLED panel preparation method and its
Structure.
Background technology
In display technology field, liquid crystal display panel (Liquid Crystal Display, LCD) and organic light-emitting diodes
The panel display apparatus such as pipe display panel (Organic Light Emitting Diode, OLED) progressively penetrate by substitution negative electrode
Spool (Cathode Ray Tube, CRT) display.
Wherein, oled panel have that self-luminous, driving voltage are low, luminous efficiency is high, the response time is short, definition and contrast
Many advantages, such as high, the nearly 180 ° of visual angles of degree, wide temperature in use scope, achievable Flexible Displays and large area total colouring, by industry
Boundary is known as being the display device for most having development potentiality.
Existing oled panel is generally included:Substrate, it is placed in the composite conductive thin film being only used on substrate as anode, is placed in
Hole injection layer (HIL) on ito anode, the hole transmission layer (HTL) being placed on hole injection layer, it is placed on hole transmission layer
Luminescent layer (EML), the electron transfer layer (ETL) being placed on luminescent layer, the electron injecting layer (EIL) that is placed on electron transfer layer
And the negative electrode being placed on electron injecting layer, in order to improve efficiency, luminescent layer generally uses master/object doped system.Described
The composite conductive thin film being used as anode generally uses the sandwich of indium oxide tin silver/tin indium oxide (ITO/Ag/ITO), with
Reflective using Ag progress, the etch process of this kind of anode is complex, and it is larger the risk of bad problem occur.
At present, the common technology route that oled panel makes is the RGB by vacuum thermal evaporation process deposits OLED
The OLED luminescent layers of (Red, Green, Blue, RGB) three primary colours, advantage is that technique is simply ripe, easy to operate but high preparing
High-precision mask and accurate contraposition are needed during resolution ratio display screen, causes that production capacity is relatively low, cost is higher;Moreover, existing OLED
The quantity of each structure sheaf of panel is more, such as light shield layer, flatness layer, pixel defining layer, adds by individually more multiple together
Miscellaneous gold-tinted processing procedure specially to make anode, and the preparation method of existing oled panel needs more light shield number, more numerous and diverse
Process, prepare cost it is higher.
The content of the invention
It is an object of the invention to provide a kind of preparation method of top-emitting OLED panel, gold-tinted on the one hand can be reduced
Processing procedure road number, saves light shield quantity, reduces cost of manufacture, is on the other hand capable of the manufacture craft of simplified anode, reduces and occurs not
The risk of good problem.
Another object of the present invention is to provide a kind of top-emitting OLED panel construction, its structure is simpler, is fabricated to
This is low, and the risk for bad problem occur is smaller.
To achieve the above object, present invention firstly provides a kind of preparation method of top-emitting OLED panel, including it is following
Step:
Step S1, offer underlay substrate are simultaneously cleaned, and the first metal layer is deposited on the underlay substrate and is patterned
Processing, light shield layer is formed in the region of correspondence thin film transistor (TFT) to be produced, and is formed instead in correspondence OLED to be produced region
Photosphere;
Step S2, the buffer layer on the underlay substrate, light shield layer and reflector layer;
Step S3, on the cushion deposition oxide semiconductive thin film and patterned process is carried out, form oxide
Semiconductor layer;
Step S4, on the oxide semiconductor layer and cushion it is sequentially depositing insulation film and second metal layer;
Step S5, patterned process first is carried out to the second metal layer, grid is formed, then using the grid as autoregistration
Figure etches insulation film, forms the gate insulator being located at below the grid;The grid is blocked with gate insulator
Partial oxide semiconductor layer, exposes the both sides of oxide semiconductor layer;
Step S6, the corona treatment that whole face is carried out to the oxide semiconductor layer so that the oxide is partly led
The partial ohmic that body layer is not blocked by the grid and gate insulator is reduced, and forms conductor layer, and by the grid and grid
The part that insulating barrier is blocked still is semiconductor, forms semiconductor channel area;
Step S7, deposit interlayer insulating film on the grid, conductor layer and cushion and carry out patterned process, shape
Into through the interlayer insulating film to expose the source contact openings and drain contact hole on conductor layer portion surface respectively;The source
Pole contact hole is located at the both sides of the grid and gate insulator with drain contact hole respectively;
Step S8, deposit the 3rd metal level on the interlayer insulating film and carry out patterned process, form source electrode and leakage
Pole, the source electrode contacts the conductor layer via the source contact openings, and the drain electrode contacts institute via the drain contact hole
State conductor layer;
The source electrode, drain electrode, grid, gate insulator, the conductor layer portion with the source contact, with it is described drain electrode connect
Tactile conductor layer portion and semiconductor channel area constitute thin film transistor (TFT);
Step S9, on the source electrode, drain electrode and interlayer insulating film deposit passivation layer and patterned process is carried out, formed
Through the passivation layer and interlayer insulating film, the pixel definition hole on the conductor layer portion surface is exposed;
Step S10, using the conductor layer as anode, inkjet printing goes out OLED luminescent layers in the pixel definition hole;
Step S11, the deposition transparent metal negative electrode on the OLED luminescent layers and passivation layer;
It is described to constitute OLED as the conductor layer of anode, OLED luminescent layers, with transparent metal negative electrode.
The material of the first metal layer is one or more of alloys in molybdenum, aluminium, copper, titanium in the step S1, and thickness is
The material of cushion is silica, silicon nitride or the stacked combination of the two in the step S2, and thickness is
The material of oxide semiconductor thin-film is indium gallium zinc oxide, indium zinc tin oxide, indium gallium zinc in the step S3
One kind in tin-oxide, thickness is
The material of insulation film is silica, silicon nitride or the stacked combination of the two in the step S4, and thickness is
The material of second metal layer is one or more of alloys in molybdenum, aluminium, copper, titanium in the step S4, and thickness is
The material of interlayer insulating film is silica, silicon nitride or the stacked combination of the two in the step S7, and thickness is
The material of the 3rd metal level is one or more of alloys in molybdenum, aluminium, copper, titanium in the step S8, and thickness is
The material of passivation layer is silica, silicon nitride or the stacked combination of the two in the step S9, and thickness is
The present invention also provides a kind of top-emitting OLED panel construction, including:
Underlay substrate;
It is located at the light shield layer on the underlay substrate;
It is located on the underlay substrate and reflector layer of the light shield layer with layer;
Cover the cushion of the light shield layer, reflector layer and underlay substrate;
The semiconductor channel area that is located on the cushion above the light shield layer and the semiconductor ditch is connected respectively
The conductor layer of Dao Qu both sides;
Cover the gate insulator of the semiconductor channel area;
Cover the grid of the gate insulator;
The interlayer insulating film on the grid, conductor layer and cushion is located at, the interlayer insulating film, which has, runs through the layer
Between insulating barrier to expose the source contact openings and drain contact hole on conductor layer portion surface respectively, the source contact openings with
Drain contact hole is located at the both sides of the grid and gate insulator respectively;
The source electrode being located on the interlayer insulating film and drain electrode, the source electrode contact described via the source contact openings
Conductor layer, the drain electrode contacts the conductor layer via the drain contact hole;
It is located at the passivation layer on the source electrode, drain electrode and interlayer insulating film;The passivation layer has with interlayer insulating film to be passed through
Wear the passivation layer and interlayer insulating film and expose the pixel definition hole on the conductor layer portion surface;
It is located at the OLED luminescent layers in the pixel definition hole and by anode of the conductor layer;
And it is located at the OLED luminescent layers and the transparent metal negative electrode on passivation layer;
The source electrode, drain electrode, grid, gate insulator, the conductor layer portion with the source contact, with it is described drain electrode connect
Tactile conductor layer portion and semiconductor channel area constitute thin film transistor (TFT);
It is described to constitute OLED as the conductor layer of anode, OLED luminescent layers, with transparent metal negative electrode.
Beneficial effects of the present invention:The preparation method for the top-emitting OLED panel that the present invention is provided, by the first gold medal
Belong to layer and carry out the obtained light shield layer of patterned process and reflector layer, reflector layer plays what the light that OLED luminescent layers are sent was reflected
Effect, anode need not use traditional ITO/Ag/ITO sandwich, so as to the manufacture craft of simplified anode, reduce out
The risk of existing bad problem;By being produced on oxide semiconductor layer after grid and gate insulator to the oxide half
Conductor layer carries out the corona treatment in whole face so that the oxide semiconductor layer is not hidden by the grid and gate insulator
The partial ohmic reduction of gear, forms conductor layer, and the part blocked by the grid and gate insulator is still semiconductor, is formed
Semiconductor channel area, using the conductor layer as OLED anode, can save the gold-tinted and etch process that anode is fabricated separately,
The preparation of traditional flatness layer and pixel defining layer can be saved in addition, so as to reduce gold-tinted processing procedure road number, save light shield number
Amount, reduces cost of manufacture;Using inkjet printing OLED luminescent layers, cost of manufacture can be further reduced.The top that the present invention is provided
Emitting OLED panel construction, is made, its structure is simpler, low manufacture cost, the wind for bad problem occur using the above method
Danger is smaller.
Brief description of the drawings
In order to be able to be further understood that the feature and technology contents of the present invention, refer to below in connection with the detailed of the present invention
Illustrate and accompanying drawing, however accompanying drawing only provide with reference to and explanation use, not for being any limitation as to the present invention.
In accompanying drawing,
Fig. 1 is the flow chart of the preparation method of the top-emitting OLED panel of the present invention;
Fig. 2 is the step S1 of the preparation method of the top-emitting OLED panel of present invention schematic diagram;
Fig. 3 is the step S2 of the preparation method of the top-emitting OLED panel of present invention schematic diagram;
Fig. 4 is the step S3 of the preparation method of the top-emitting OLED panel of present invention schematic diagram;
Fig. 5 is the step S4 of the preparation method of the top-emitting OLED panel of present invention schematic diagram;
Fig. 6 is the step S5 of the preparation method of the top-emitting OLED panel of present invention schematic diagram;
Fig. 7 is the step S6 of the preparation method of the top-emitting OLED panel of present invention schematic diagram;
Fig. 8 is the step S7 of the preparation method of the top-emitting OLED panel of present invention schematic diagram;
Fig. 9 is the step S8 of the preparation method of the top-emitting OLED panel of present invention schematic diagram;
Figure 10 is the step S9 of the preparation method of the top-emitting OLED panel of present invention schematic diagram;
Figure 11 is the step S10 of the preparation method of the top-emitting OLED panel of present invention schematic diagram;
Figure 12 is the step S11 of the preparation method of the top-emitting OLED panel of present invention schematic diagram and the top of the present invention
The schematic diagram of emitting OLED panel construction.
Embodiment
Further to illustrate the technological means and its effect of the invention taken, below in conjunction with being preferable to carry out for the present invention
Example and its accompanying drawing are described in detail.
Referring to Fig. 1, present invention firstly provides a kind of preparation method of top-emitting OLED panel, comprising the following steps:
Step S1, there is provided underlay substrate 1 and clean as shown in Figure 2, the first metal layer is deposited on the underlay substrate 1
And patterned process is carried out by gold-tinted, etch process, light shield layer 21 is formed in the region of correspondence thin film transistor (TFT) to be produced,
Reflector layer 22 is formed in correspondence OLED to be produced region.
Specifically, the preferred glass substrate of the underlay substrate 1;The material of the first metal layer be molybdenum (Mo), aluminium (Al),
One or more of alloys in copper (Cu), titanium (Ti), thickness is
The light shield layer 21 is used for shading, prevents the region light leak for the thin film transistor (TFT) T that subsequent step produces.Institute
State reflector layer 22 and be used for the light that the OLED luminescent layers 10 produced to subsequent step send and reflect, thus OLED anode without
Traditional ITO/Ag/ITO sandwich need to be used, so as to the manufacture craft of simplified anode, bad problem occurs in reduction
Risk.
Step S2, as shown in figure 3, on the underlay substrate 1, light shield layer 21 and reflector layer 22 buffer layer 3.
Specifically, the material of the cushion 3 be silica (SiOx), silicon nitride (SiNx) or the stacked combination of the two,
Thickness is
Step S3, as shown in figure 4, on the cushion 3 deposition oxide semiconductive thin film and pass through gold-tinted, etching system
Cheng Jinhang patterned process, forms oxide semiconductor layer 4 '.
Specifically, the material of the oxide semiconductor thin-film can be indium gallium zinc oxide (Indium Gallium Zinc
Oxide, IGZO), indium zinc tin oxide (Indium Zinc Tin Oxide, IZTO), indium gallium zinc tin oxide (Indium
Gallium Zinc Tin Oxide, IGZTO) in one kind, thickness is
Step S4, as shown in figure 5, be sequentially depositing on the oxide semiconductor layer 4 ' and cushion 3 insulation film 5 ',
With second metal layer 6 '.
Specifically, the material of the insulation film 5 ' is SiOx, SiNx or the stacked combination of the two, and thickness is
The material of the second metal layer 6 ' is one or more of alloys in Mo, Al, Cu, Ti, and thickness is
Step S5, as shown in fig. 6, first pass through gold-tinted, etch process to the second metal layer 6 ' carry out patterned process,
Grid 6 is formed, then insulation film 5 ' is etched so that the grid 6 is autoregistration figure, the grid for being located at the lower section of grid 6 are formed
Pole insulating barrier 5.
Further, the grid 6 and the shield portions oxide semiconductor layer 4 ' of gate insulator 5, expose oxide
The both sides of semiconductor layer 4 '.
Step S6, as shown in fig. 7, carrying out the corona treatment in whole face to the oxide semiconductor layer 4 ' so that institute
The partial ohmic reduction that oxide semiconductor layer 4 ' is not blocked by the grid 6 and gate insulator 5 is stated, conductor layer 41 is formed,
And the part blocked by the grid 6 and gate insulator 5 is still semiconductor, semiconductor channel area 42 is formed.
Specifically, step S6 carries out corona treatment using helium (He) or argon gas (Ar).
Step S7, interlayer insulating film 7 and lead to as shown in figure 8, being deposited on the grid 6, conductor layer 41 and cushion 3
Cross gold-tinted, etch process and carry out patterned process, formed through the interlayer insulating film 7 to expose the part table of conductor layer 41 respectively
The source contact openings 71 in face and drain contact hole 72.
Further, the source contact openings 71 are located at the grid 6 and gate insulator 5 respectively with drain contact hole 72
Both sides.
Specifically, the material of the interlayer insulating film 7 is SiOx, SiNx or the stacked combination of the two, and thickness is
Step S8, as shown in figure 9, depositing the 3rd metal level on the interlayer insulating film 7 and passing through gold-tinted, etch process
Patterned process is carried out, source electrode 81 and drain electrode 82 is formed, the source electrode 81 contacts the conductor via the source contact openings 71
Layer 41, the drain electrode 82 contacts the conductor layer 41 via the drain contact hole 72.
The source electrode 81, drain electrode 82, grid 6, gate insulator 5, the part of conductor layer 41 contacted with the source electrode 81, and
The part of conductor layer 41 of the contact of drain electrode 82 and semiconductor channel area 42 constitute thin film transistor (TFT) T.
Specifically, the material of the 3rd metal level is one or more of alloys in Mo, Al, Cu, Ti, and thickness is
Step S9, as shown in Figure 10, deposit passivation layer 9 and leads on the source electrode 81, drain electrode 82 and interlayer insulating film 7
Cross gold-tinted, etch process and carry out patterned process, formed and led described in being exposed through the passivation layer 9 and interlayer insulating film 7
The pixel definition hole 97 of body 41 part surface of layer.
Specifically, the material of the passivation layer 9 is SiOx, SiNx or the stacked combination of the two, and thickness is
Step S10, as shown in figure 11, using the conductor layer 41 as anode in the pixel definition hole 97 inkjet printing
(Ink-Jet Printing, IJP) goes out OLED luminescent layers 10.
Specifically, the OLED luminescent layers 10 include RGB (Red, Green, Blue, RGB) three primary colours, correspond to respectively
In red pixel, green pixel and blue pixel.
Step S11, as shown in figure 12, on the OLED luminescent layers 10 and passivation layer 9 in the way of hot evaporation or sputter
Deposit transparent metal negative electrode 11.
It is described to constitute OLED D as the conductor layer 41 of anode, OLED luminescent layers 10, with transparent metal negative electrode 11.
So far, the making of bottom emitting type white light OLED panel is completed.
The preparation method of the top-emitting OLED panel of the present invention, is made by carrying out patterned process to the first metal layer
Light shield layer 21 and reflector layer 22, reflector layer 22 play a part of reflecting the light that OLED luminescent layers 10 are sent, and anode need not
Using traditional ITO/Ag/ITO sandwich, so as to the manufacture craft of simplified anode, there is bad problem in reduction
Risk;By being produced on oxide semiconductor layer 4 ' after grid 6 and gate insulator 5 to the oxide semiconductor layer 4 '
Carry out the corona treatment in whole face so that the oxide semiconductor layer 4 ' is not blocked by the grid 6 and gate insulator 5
Partial ohmic reduction, formed conductor layer 41, and the part blocked by the grid 6 and gate insulator 5 still be semiconductor, shape
Into semiconductor channel area 42, using the conductor layer 41 as OLED anode, the gold-tinted that anode is fabricated separately and erosion can be saved
Journey is scribed, the preparation of traditional flatness layer and pixel defining layer can be saved in addition, with the picture in passivation layer 9 and interlayer insulating film 7
Element defines hole 73 to define pixel region, can simplify process, reduces by 3 road gold-tinted processing procedure road numbers, saves 3 light shields, reduction system
Make cost;Using inkjet printing OLED luminescent layers 10, cost of manufacture can be further reduced.
Figure 12 is referred to, based on same inventive concept, the present invention also provides a kind of top emission type as made from the above method
Oled panel, including:
Underlay substrate 1;
It is located at the light shield layer 21 on the underlay substrate 1;
It is located on the underlay substrate 1 and reflector layer 22 of the light shield layer 21 with layer;
Cover the cushion 3 of the light shield layer 21, reflector layer 22 and underlay substrate 1;
The semiconductor channel area 42 that is located in the top of the light shield layer 21 on the cushion 3 and connect described half respectively
The conductor layer 41 of the both sides of conductor channel area 42;
Cover the gate insulator 5 of the semiconductor channel area 42;
Cover the grid 6 of the gate insulator 5;
The interlayer insulating film 7 on the grid 6, conductor layer 41 and cushion 3 is located at, the interlayer insulating film 7, which has, to be passed through
The interlayer insulating film 7 is worn to expose the source contact openings 71 and drain contact hole 72 of the part surface of conductor layer 41 respectively, it is described
Source contact openings 71 are located at the both sides of the grid 6 and gate insulator 5 with drain contact hole 72 respectively;
The source electrode 81 being located on the interlayer insulating film 7 and drain electrode 82, the source electrode 81 is via the source contact openings 71
The conductor layer 41 is contacted, the drain electrode 82 contacts the conductor layer 41 via the drain contact hole 72;
It is located at the passivation layer 9 on the source electrode 81, drain electrode 82 and interlayer insulating film 7;The passivation layer 9 and layer insulation
Layer 7 has the pixel definition hole 97 that the part surface of conductor layer 41 is exposed through the passivation layer 9 and interlayer insulating film 7;
It is located in the pixel definition hole 97 and with OLED luminescent layer 10 of the conductor layer 41 for anode;
And it is located at the OLED luminescent layers 10 and the transparent metal negative electrode 11 on passivation layer 9.
Wherein, the source electrode 81, drain electrode 82, grid 6, gate insulator 5, the conductor layer 41 contacted with the source electrode 81
The parts of conductor layer 41 and semiconductor channel area 42 divide, contacted with the drain electrode 82 constitute thin film transistor (TFT) T;
It is described to constitute OLED D as the conductor layer 41 of anode, OLED luminescent layers 10, with transparent metal negative electrode 11.
As described in the step S1 in above-mentioned method, obtain being located at same layer by carrying out the first metal layer patterned process
Light shield layer 21, with reflector layer 22.The light shield layer 21 is used for shading, prevents thin film transistor (TFT) T region light leak.It is described
Reflector layer 22 is used to reflect the light that OLED luminescent layers 10 are sent, so OLED anode need not use traditional ITO/
Ag/ITO sandwich, so as to the manufacture craft of simplified anode, reduces the risk for bad problem occur.
As described in the step S6 in above-mentioned method, the semiconductor channel area 42 and the semiconductor channel is connected respectively
The conductor layer 4 of the both sides of area 42 is obtained by carrying out the corona treatment in whole face to oxide semiconductor layer 4 ', the oxide
The partial ohmic that semiconductor layer 4 ' is not blocked by the grid 6 and gate insulator 5 is reduced, and forms conductor layer 41, and described
The part that grid 6 and gate insulator 5 are blocked still is semiconductor, forms semiconductor channel area 42.The top emission type of the present invention
Oled panel structure with semiconductor channel area 42 to be located at the other conductor layer 41 of same layer as OLED anode, without specially setting
Single anode is put, in addition, traditional flatness layer, the setting with pixel defining layer are also eliminated, with passivation layer 9 and layer insulation
Pixel region is defined in pixel definition hole 73 in layer 7, not only simplify structure, additionally it is possible to reduce cost of manufacture.
As described in the step S10 in above-mentioned method, the OLED luminescent layers 10 are made by inkjet printing, and cost of manufacture is entered
One step is reduced.
Specifically, the preferred glass substrate of the underlay substrate 1;
The material of the light shield layer 21 and reflector layer 22 is one or more of alloys in Mo, Al, Cu, Ti, and thickness is
The material of the cushion 3 is SiOx, SiNx or the stacked combination of the two, and thickness is
The original material of the conductor layer 41 and semiconductor channel area 42 is one kind in IGZO, IZTO, IGZTO, thickness
For
The material of the gate insulator 5 is SiOx, SiNx or the stacked combination of the two, and thickness is
The material of the grid 6 is one or more of alloys in Mo, Al, Cu, Ti, and thickness is
The material of the interlayer insulating film 7 is SiOx, SiNx or the stacked combination of the two, and thickness is
The source electrode 81 and the material of drain electrode 82 are one or more of alloys in Mo, Al, Cu, Ti, and thickness is
The material of the passivation layer 9 is SiOx, SiNx or the stacked combination of the two, and thickness is
The OLED luminescent layers 10 include red-green-blue, correspond respectively to red pixel, green pixel and blue picture
Element.
In summary, the preparation method of top-emitting OLED panel of the invention, by carrying out pattern to the first metal layer
Change processing and light shield layer and reflector layer be made, reflector layer plays a part of reflecting the light that OLED luminescent layers are sent, anode without
Traditional ITO/Ag/ITO sandwich need to be used, so as to the manufacture craft of simplified anode, bad problem occurs in reduction
Risk;The oxide semiconductor layer is carried out after grid and gate insulator by being produced on oxide semiconductor layer
The corona treatment in whole face so that the part electricity that the oxide semiconductor layer is not blocked by the grid and gate insulator
Resistance reduction, forms conductor layer, and the part blocked by the grid and gate insulator is still semiconductor, forms semiconductor channel
Area, using the conductor layer as OLED anode, can save the gold-tinted and etch process that anode is fabricated separately, can save in addition
The preparation of traditional flatness layer and pixel defining layer, so as to reduce gold-tinted processing procedure road number, saves light shield quantity, reduction makes
Cost;Using inkjet printing OLED luminescent layers, cost of manufacture can be further reduced.The top-emitting OLED panel knot of the present invention
Structure, is made, its structure is simpler, low manufacture cost, and the risk for bad problem occur is smaller using the above method.
It is described above, for the person of ordinary skill of the art, can be with technique according to the invention scheme and technology
Other various corresponding changes and deformation are made in design, and all these changes and deformation should all belong to the claim of the present invention
Protection domain.
Claims (10)
1. a kind of preparation method of top-emitting OLED panel, it is characterised in that comprise the following steps:
Step S1, offer underlay substrate (1) are simultaneously cleaned, and the first metal layer is deposited on the underlay substrate (1) and pattern is carried out
Change is handled, and light shield layer (21) is formed in the region of correspondence thin film transistor (TFT) to be produced, in correspondence OLED to be produced region
Form reflector layer (22);
Step S2, the buffer layer (3) on the underlay substrate (1), light shield layer (21) and reflector layer (22);
Step S3, on the cushion (3) deposition oxide semiconductive thin film and patterned process is carried out, form oxide half
Conductor layer (4 ');
Step S4, be sequentially depositing on the oxide semiconductor layer (4 ') and cushion (3) insulation film (5 '), with the second gold medal
Belong to layer (6 ');
Step S5, patterned process first is carried out to the second metal layer (6 '), form grid (6), then be with the grid (6)
Autoregistration figure etches insulation film (5 '), forms the gate insulator (5) being located at below the grid (6);The grid
(6) with gate insulator (5) shield portions oxide semiconductor layer (4 '), the both sides of oxide semiconductor layer (4 ') are exposed;
Step S6, the corona treatment that whole face is carried out to the oxide semiconductor layer (4 ') so that the oxide is partly led
The partial ohmic that body layer (4 ') is not blocked by the grid (6) and gate insulator (5) is reduced, formation conductor layer (41), and by
The part that the grid (6) and gate insulator (5) are blocked still is semiconductor, forms semiconductor channel area (42);
Step S7, deposit interlayer insulating film on the grid (6), conductor layer (41) and cushion (3) and (7) and carry out pattern
Change handle, formed through the interlayer insulating film (7) with expose respectively conductor layer (41) part surface source contact openings (71),
With drain contact hole (72);The source contact openings (71) are located at the grid (6) and grid respectively with drain contact hole (72)
The both sides of insulating barrier (5);
Step S8, deposit the 3rd metal level on the interlayer insulating film (7) and carry out patterned process, formed source electrode (81),
And drain electrode (82), the source electrode (81) contacts the conductor layer (41) via the source contact openings (71), described to drain (82)
The conductor layer (41) is contacted via the drain contact hole (72);
The source electrode (81), drain electrode (82), grid (6), gate insulator (5), the conductor layer contacted with the source electrode (81)
(41) part, conductor layer (41) part and semiconductor channel area (42) that are contacted with the drain electrode (82) constitute thin film transistor (TFT)
(T);
Step S9, deposit passivation layer (9) and patterned on the source electrode (81), drain electrode (82) and interlayer insulating film (7)
Processing, forms the pixel that the conductor layer (41) part surface is exposed through the passivation layer (9) and interlayer insulating film (7)
Define hole (97);
Step S10, using the conductor layer (41) as anode the interior inkjet printing of the pixel definition hole (97) go out OLED light
Layer (10);
Step S11, the deposition transparent metal negative electrode (11) on the OLED luminescent layers (10) and passivation layer (9);
Conductor layer (41), OLED luminescent layers (10) and the transparent metal negative electrode (11) as anode constitutes OLED (D).
2. the preparation method of top-emitting OLED panel as claimed in claim 1, it is characterised in that first in the step S1
The material of metal level is one or more of alloys in molybdenum, aluminium, copper, titanium, and thickness is
3. the preparation method of top-emitting OLED panel as claimed in claim 1, it is characterised in that buffered in the step S2
The material of layer (3) is silica, silicon nitride or the stacked combination of the two, and thickness is
4. the preparation method of top-emitting OLED panel as claimed in claim 1, it is characterised in that aoxidized in the step S3
The material of thing semiconductive thin film is one kind in indium gallium zinc oxide, indium zinc tin oxide, indium gallium zinc tin oxide, and thickness is
5. the preparation method of top-emitting OLED panel as claimed in claim 1, it is characterised in that insulated in the step S4
The material of film (5 ') is silica, silicon nitride or the stacked combination of the two, and thickness is
6. the preparation method of top-emitting OLED panel as claimed in claim 1, it is characterised in that second in the step S4
The material of metal level is one or more of alloys in molybdenum, aluminium, copper, titanium, and thickness is
7. the preparation method of top-emitting OLED panel as claimed in claim 1, it is characterised in that between the step S7 middle levels
The material of insulating barrier (7) is silica, silicon nitride or the stacked combination of the two, and thickness is
8. the preparation method of top-emitting OLED panel as claimed in claim 1, it is characterised in that the 3rd in the step S8
The material of metal level is one or more of alloys in molybdenum, aluminium, copper, titanium, and thickness is
9. the preparation method of top-emitting OLED panel as claimed in claim 1, it is characterised in that be passivated in the step S9
The material of layer (9) is silica, silicon nitride or the stacked combination of the two, and thickness is
10. a kind of top-emitting OLED panel construction, it is characterised in that including:
Underlay substrate (1);
It is located at the light shield layer (21) on the underlay substrate (1);
It is located on the underlay substrate (1) and reflector layer (22) of the light shield layer (21) with layer;
Cover the cushion (3) of the light shield layer (21), reflector layer (22) and underlay substrate (1);
The semiconductor channel area (42) that is located above the light shield layer (21) on the cushion (3) and connect described respectively
The conductor layer (41) of semiconductor channel area (42) both sides;
Cover the gate insulator (5) of the semiconductor channel area (42);
Cover the grid (6) of the gate insulator (5);
It is located at the interlayer insulating film (7) on the grid (6), conductor layer (41) and cushion (3), the interlayer insulating film (7)
With through the interlayer insulating film (7) with expose respectively conductor layer (41) part surface source contact openings (71), with drain electrode
Contact hole (72), the source contact openings (71) are located at the grid (6) and gate insulator respectively with drain contact hole (72)
(5) both sides;
The source electrode (81) being located on the interlayer insulating film (7) and drain electrode (82), the source electrode (81) is via the source contact
Hole (71) contacts the conductor layer (41), and the drain electrode (82) contacts the conductor layer via the drain contact hole (72)
(41);
It is located at the passivation layer (9) on the source electrode (81), drain electrode (82) and interlayer insulating film (7);The passivation layer (9) and layer
Between insulating barrier (7) have and expose the conductor layer (41) part surface through the passivation layer (9) and interlayer insulating film (7)
Pixel definition hole (97);
It is located in the pixel definition hole (97) and with OLED luminescent layer (10) of the conductor layer (41) for anode;
And it is located at the OLED luminescent layers (10) and the transparent metal negative electrode (11) on passivation layer (9);
The source electrode (81), drain electrode (82), grid (6), gate insulator (5), the conductor layer contacted with the source electrode (81)
(41) part, conductor layer (41) part and semiconductor channel area (42) that are contacted with the drain electrode (82) constitute thin film transistor (TFT)
(T);
Conductor layer (41), OLED luminescent layers (10) and the transparent metal negative electrode (11) as anode constitutes OLED (D).
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