CN107275368B - Pixel and organic light emitting display device including the same - Google Patents

Pixel and organic light emitting display device including the same Download PDF

Info

Publication number
CN107275368B
CN107275368B CN201710206530.5A CN201710206530A CN107275368B CN 107275368 B CN107275368 B CN 107275368B CN 201710206530 A CN201710206530 A CN 201710206530A CN 107275368 B CN107275368 B CN 107275368B
Authority
CN
China
Prior art keywords
insulating layer
layer
conductive layer
opening
organic insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201710206530.5A
Other languages
Chinese (zh)
Other versions
CN107275368A (en
Inventor
金岐勳
金得钟
李根洙
李东炫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Display Co Ltd
Original Assignee
Samsung Display Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Display Co Ltd filed Critical Samsung Display Co Ltd
Publication of CN107275368A publication Critical patent/CN107275368A/en
Application granted granted Critical
Publication of CN107275368B publication Critical patent/CN107275368B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/17—Passive-matrix OLED displays
    • H10K59/179—Interconnections, e.g. wiring lines or terminals

Abstract

Disclosed are an organic light emitting display device and a pixel, the organic light emitting display device including a plurality of pixels. At least one of the pixels includes: a first conductive layer over the substrate; a first organic insulating layer including a first opening exposing a portion of the first conductive layer; a first inorganic insulating layer over the first organic insulating layer and including a second opening exposing a portion of the first conductive layer exposed through the first opening; and a second conductive layer on the first inorganic insulating layer and contacting a portion of the first conductive layer exposed through the first opening and the second opening.

Description

Pixel and organic light emitting display device including the same
Cross Reference to Related Applications
Korean patent application 10-2016-0041253 filed on 4/2016 and entitled "Organic Light-Emitting Display Apparatus" is incorporated herein by reference in its entirety.
Technical Field
One or more embodiments relate to an organic light emitting display device.
Background
The organic light emitting display device includes a plurality of pixels. Each pixel has at least one Thin Film Transistor (TFT) and at least one capacitor connected to a plurality of wirings. The TFT, the capacitor, and the wiring are arranged on the substrate according to a minute pattern which tends to be complicated. A need for compact, higher resolution displays is a driving factor for efficient placement of TFTs, capacitors and wiring and for reducing the complexity of their connection structures and driving techniques.
Disclosure of Invention
According to one or more embodiments, an organic light emitting display device includes a plurality of pixels, at least one of the pixels including: a first conductive layer over the substrate; a first organic insulating layer including a first opening exposing a portion of the first conductive layer; a first inorganic insulating layer over the first organic insulating layer and including a second opening exposing a portion of the first conductive layer exposed through the first opening; and a second conductive layer on the first inorganic insulating layer and contacting a portion of the first conductive layer exposed through the first opening and the second opening.
The apparatus may include a Thin Film Transistor (TFT) including an active layer and a gate electrode insulated from the active layer, wherein the active layer includes a channel region connecting a source region and a drain region, and wherein the first conductive layer is electrically connected to the source region or the drain region. The thickness of the first organic insulating layer may be greater than the thickness of the first inorganic insulating layer.
The device may include a second organic insulating layer over the second conductive layer. The first inorganic insulating layer may include a plurality of additional openings exposing a portion of the first organic insulating layer. The first organic insulating layer may directly contact the second organic insulating layer through at least one of the additional openings.
The device may include a second inorganic insulating layer between the second conductive layer and the second organic insulating layer. The second inorganic insulating layer may cover an edge of the second conductive layer and include a portion contacting the first inorganic insulating layer. The second organic insulating layer may include a third opening exposing a portion of the second conductive layer.
The apparatus may comprise: a pixel electrode contacting the second conductive layer through the third opening; an intermediate layer located above the pixel electrode and including an emission layer; and an opposite electrode over the intermediate layer. The device may include a lower power line on the same layer as the first conductive layer and an upper power line on the same layer as the second conductive layer. The lower power line and the upper power line may be electrically connected to each other through contact holes in the first organic insulating layer and the first inorganic insulating layer. The apparatus may include a storage capacitor including a first plate over the substrate and a second plate facing the first plate, wherein the second plate is located on a different layer than the lower and upper power lines and is electrically connected to the lower and upper power lines.
The apparatus may comprise: a first organic insulating layer including polyimide; and a first inorganic insulating layer including silicon oxide (SiO 2 ) Or silicon nitride (SiN) x ). The second conductive layer may include a first layer including titanium, a second layer including aluminum, and a third layer including titanium. The first opening has a width greater than a width of the second opening, and the first inorganic insulating layer includes a portion that contacts the first conductive layer in the first opening.
According to one or more other embodiments, a pixel includes first and second conductive layers, a first insulating layer, and a second insulating layer; wherein the first insulating layer and the second insulating layer are located between the first conductive layer and the second insulating layer is located between the first insulating layer and the second conductive layer, and wherein the first insulating layer comprises an organic material and the second insulating layer comprises an inorganic material, the first conductive layer contacting the second conductive layer through holes in the first insulating layer and the second insulating layer. The holes in the first insulating layer may be aligned with the holes in the second insulating layer. The first insulating layer and the second insulating layer may have different thicknesses. The second insulating layer may be thinner than the first insulating layer. The pixel may include a pixel electrode contacting the second conductive layer.
Drawings
Features will become apparent to those skilled in the art from the detailed description of an exemplary embodiment with reference to the accompanying drawings, in which:
Fig. 1 illustrates an embodiment of a subpixel of an organic light emitting display device;
FIG. 2 shows a layout embodiment of TFTs and capacitors of a subpixel;
FIGS. 3-7 illustrate various layers of the layout embodiment of FIG. 2;
FIG. 8 illustrates an embodiment of a subpixel taken along section line VIII-VIII' in FIG. 2;
FIG. 9 illustrates an embodiment of a subpixel taken along section line IX-IX' in FIG. 2;
FIG. 10 illustrates an embodiment of a subpixel taken along section line X-X' in FIG. 2; and
fig. 11 to 14 show cross-sectional views of other embodiments of the organic light emitting display device.
Detailed Description
Exemplary embodiments will now be described below with reference to the accompanying drawings; however, they may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these implementations are provided so that this disclosure will be thorough and complete, and will fully convey the example embodiments to those skilled in the art. The embodiments (or portions thereof) may be combined to form further embodiments.
In the drawings, the size of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when a layer or element is referred to as being "on" another layer or another substrate, it can be directly on the other layer or another substrate, or intervening layers may also be present. Furthermore, it will be understood that when a layer is referred to as being "under" another layer, it can be directly under, or one or more intervening layers may also be present. In addition, it will also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or one or more intervening layers may also be present. Like reference numerals refer to like elements throughout the specification.
When an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or be indirectly connected or coupled to the other element with one or more intervening elements interposed therebetween. In addition, when an element is referred to as being "comprising" a component, unless there is a different disclosure, it is intended that the element may further comprise, rather than exclude, another component.
One or more embodiments described herein correspond to an Active Matrix (AM) organic light emitting display device having a 7Tr-1Cap sub-pixel structure, i.e., 7 Thin Film Transistors (TFTs) and 1 capacitor. In another embodiment, the organic light emitting display device may include different sub-pixel structures, for example, more or less than 7 TFTs and one or more capacitors. In addition, in one or more embodiments, the wiring structure may be different for different embodiments. In addition, in one or more embodiments, a subpixel may be considered to be the smallest unit that emits light for the purpose of displaying an image.
Fig. 1 illustrates an embodiment of a subpixel of an organic light emitting display device. Referring to fig. 1, the sub-pixel includes a plurality of signal lines, a plurality of TFTs connected to the signal lines, a storage capacitor Cst, and an organic light emitting device OLED. The signal line may be shared among a plurality of sub-pixels.
The TFT includes: a driving TFT T1, a switching TFT T2, a compensation TFT T3, an initializing TFT T4, a driving control TFT T5, an emission control TFT T6, and a bypass TFT T7.
The signal line includes: a scan line 121 for transmitting a scan signal Sn; a previous scan line 122 for transmitting a previous scan signal Sn-1 to the initializing TFT T4 and the bypass TFT T7; an emission control line 123 for transmitting an emission control signal En to the driving control TFT T5 and the emission control TFT T6; a data line 176 crossing the scan line 121 to transmit a data signal Dm; a power line substantially parallel to the data line 176, transmitting the driving voltage ELVDD; and an initialization voltage line 124 transmitting an initialization voltage Vint to initialize the driving TFT T1. The power lines may include a lower power line 177 and an upper power line 178 located on different layers and electrically connected to each other.
The driving TFT T1 includes: a gate electrode G1 connected to the first storage capacitor plate Cst1 of the storage capacitor Cst; a source electrode S1 connected to the power supply lines 177 and 178 through the drive control TFT T5; and a drain electrode D1 electrically connected to the pixel electrode of the organic light emitting device OLED through the emission control TFT T6. The driving TFT T1 receives the data signal Dm according to a switching operation through the switching TFT T2 and emits the current I OLED Is supplied to the organic light emitting device OLED.
The switching TFT T2 includes: a gate electrode G2 connected to the scan line 121; a source electrode S2 connected to the data line 176; the drain electrode D2 is connected to the source electrode S1 of the driving TFT T1 and to the power supply lines 177 and 178 through the driving control TFT T5. The switching TFT T2 is turned on according to the scan signal Sn received through the scan line 121, and performs a switching operation to transfer the data signal Dm from the data line 176 to the source electrode S1 of the driving TFT T1.
The compensation TFT T3 includes: a gate electrode G3 connected to the scan line 121; a source electrode S3 connected to the drain electrode D1 of the driving TFT T1 and connected to the pixel electrode 191 of the organic light emitting device OLED through the emission control TFT T6 (for example, refer to fig. 8); and a drain electrode D3 connected to the first storage capacitor plate Cst1 of the storage capacitor Cst, the drain electrode D4 of the initialization TFT T4, and the gate electrode G1 of the driving TFT T1. The compensation TFT T3 is turned on according to the scan signal Sn from the scan line 121 to electrically connect the gate electrode G1 and the drain electrode D1 of the driving TFT T1, thereby placing the driving TFT T1 in a diode-connected state.
Initializing TFT T4 includes: a gate electrode G4 connected to the previous scan line 122; a source electrode S4 connected to the drain electrode D7 of the bypass TFT T7 and the initialization voltage line 124; and a drain electrode D4 connected to the first storage capacitor plate Cst1 of the storage capacitor Cst, the drain electrode D3 of the compensation TFT T3, and the gate electrode G1 of the driving TFT T1. The initializing TFT T4 is turned on according to the previous scan signal Sn-1 from the previous scan line 122 to transmit the initializing voltage Vint to the gate electrode G1 of the driving TFT T1 for the purpose of initializing the voltage of the gate electrode G1 of the driving TFT T1.
The drive control TFT T5 includes: a gate electrode G5 connected to the emission control line 123; a source electrode S5 connected to the power supply lines 177 and 178; and a drain electrode D5 connected to the source electrode S1 of the driving TFT T1 and the drain electrode D2 of the switching TFT T2.
The emission control TFT T6 includes: a gate electrode G6 connected to the emission control line 123; a source electrode S6 connected to the drain electrode D1 of the driving TFT T1 and the source electrode S3 of the compensation TFT T3; and a drain electrode D6 electrically connected to the source electrode S7 of the bypass TFT T7 and the pixel electrode 191 of the organic light emitting device OLED (for example, refer to fig. 8). The driving control TFT T5 and the emission control TFT T6 are simultaneously turned on according to the emission control signal En from the emission control line 123 to allow the emission current I OLED The connection flow to the organic light emitting device OLED based on the driving voltage ELVDD flows to the organic light emitting device OLED.
Bypass TFT T7 includes: a gate electrode G7 connected to the previous scan line 122; a source electrode S7 connected to the drain electrode D6 of the emission control TFT T6 and the pixel electrode 191 of the organic light emitting device OLED (for example, refer to fig. 8); and a drain electrode D7 connected to the initialization voltage line 124. The bypass TFT T7 transfers the previous scan signal Sn-1 from the previous scan line 122 to the gate electrode G7. The previous scan signal Sn-1 indicates a voltage having a predetermined level for turning off the bypass TFT T7. When the bypass TFT T7 is turned off, the driving current I d As part of the bypass current I bp Flows via the bypass TFT T7.
When the subpixel operates based on the gray value of the black image, if the minimum amount of current is used as the driving current I d Flowing from the driving TFT T1 into the organic light emitting device OLED, the sub-pixel will not display a black image gray value. The minimum current of the driving TFT T1 may be equal to, for example, the gate-source voltage V of the driving TFT T1 GS The current flowing at less than the threshold voltage Vth corresponds to cause the driving TFT T1 to be turned off.
To prevent when the minimum current is the driving current I d Light is emitted from the organic light emitting device OLED when flowing, and the bypass TFT T7 can discharge the driving current I flowing out of the driving TFT T1 d As part of the bypass current I bp To a current path remote from the organic light emitting device OLED. For example, a current smaller than a minimum driving current (e.g., a current equal to or smaller than 10 pA) flowing when the driving TFT T1 is turned off may be transferred to the organic light emitting device OLED. Thus, improvement in display of black image data can be achieved.
In the case where the minimum driving current flows when the sub-pixel is to display a black image value, the emission or non-emission or emission level of light from the organic light emitting device OLED may be significantly affected. This is because of the bypass current I bp Separated from the minimum drive current. However, in the case where a large driving current flows when the sub-pixel is to display an image different from a black image or even a white image, the emission level of the organic light emitting device OLED is hardly affected by the bypass current I bp Is a function of (a) and (b). Accordingly, the emission current I of the organic light emitting device OLED OLED (which is at drive current I d Corresponds to blackColor image value is obtained by driving current I through bypass TFT T7 d Separated bypass current I bp And reduced) may have a level for clearly representing a black image. Therefore, by realizing a clear black resolution image using the bypass TFT T7, the contrast can be improved.
The initialization TFT T4 and the bypass TFT T7 in fig. 1 are connected to the previous scan line 122. In another embodiment, the initialization TFT T4 may be connected to the previous scan line 122 and driven according to the previous scan signal Sn-1, and the bypass TFT T7 may be connected to a separate wiring and driven according to a signal transmitted through the wiring.
The storage capacitor Cst includes a second storage capacitor plate Cst2 connected to the power lines 177 and 178, and an opposite electrode 193 (e.g., refer to fig. 8) of the organic light emitting device OLED is connected to the common electrode ELVSS. Accordingly, the organic light emitting device OLED of the sub-pixel may be based on the emission current I from the driving TFT T1 OLED Emits light to emit light of an image.
Each of the compensation TFT T3 and the initialization TFT T4 in fig. 1 has a dual gate electrode structure. In another embodiment, one or both of the compensation TFT T3 and the initialization TFT T4 may have a single gate electrode structure. In one embodiment, at least one of the TFTs T1, T2, T5, T6, and T7 other than the compensation TFT T3 and the initialization TFT T4 may have a dual gate electrode structure.
In operation, during the initialization phase, the previous scan signal Sn-1 having a low level is supplied through the previous scan line 122. Subsequently, the initialization TFT T4 is turned on based on the low level of the previous scan signal Sn-1, and the initialization voltage Vint from the initialization voltage line 124 is transferred to the gate electrode G1 of the driving TFT T1 through the initialization TFT T4. Accordingly, the driving TFT T1 is initialized due to the initialization voltage Vint.
During the data programming phase, a scan signal Sn having a low level is supplied through the scan line 121. Subsequently, the switching TFT T2 and the compensating TFT T3 are turned on based on the low level of the scan signal Sn. Accordingly, the driving TFT T1 is placed in a diode-connected state and biased in a positive direction by the turned-on compensation TFT T3.
Subsequently, a compensation voltage dm+vth (e.g., vth is a negative value) obtained by subtracting the threshold voltage Vth of the driving TFT T1 from the data signal Dm supplied via the data line 176 is applied to the gate electrode G1 of the driving TFT T1. Subsequently, the driving voltage ELVDD and the compensation voltage dm+vth are applied to both terminals of the storage capacitor Cst, so that charges corresponding to a voltage difference between the respective terminals are stored in the storage capacitor Cst.
During the transmit phase, the transmit control signal En from the transmit control line 123 changes from a high level to a low level. Subsequently, during the emission phase, the driving control TFT T5 and the emission control TFT T6 are turned on based on the low level of the emission control signal En.
Subsequently, a driving current I is generated based on a difference between the voltage of the gate electrode G1 of the driving TFT T1 and the driving voltage ELVDD d . And drive current I d And bypass current I bp Emission current I corresponding to the difference between OLED Is supplied to the organic light emitting device OLED through the emission control TFT T6.
During the emission phase, the gate-source voltage V of the driving TFT T1 is based on the current-voltage relationship of the driving TFT T1 GS And is maintained at (dm+vth) -ELVDD due to the storage capacitor Cst. Emission current I OLED AND (Dm-ELVDD) 2 Proportional, e.g. by voltage V from the gate source GS The square of the value obtained by subtracting the threshold voltage Vth. Thus, the emission current I OELD Is determined without considering the threshold voltage Vth of the driving TFT T1.
The TFTs T1, T2, T3, T4, T5, T6, and T7 may be p-channel field effect transistors. In another embodiment, at least some of the TFTs T1, T2, T3, T4, T5, T6, and T7 may be n-channel field effect transistors.
Fig. 2 shows a layout embodiment of the sub-pixel in fig. 1 indicating the TFT and capacitor locations thereof. Fig. 3 to 7 are plan views showing respective layers of a layout embodiment of sub-pixels. In particular, fig. 3 to 7 show embodiments of the same-layer wiring or semiconductor layer arrangement.
An insulating layer or the like may be located between the layer structures in fig. 3 to 7. For example, the first insulating layer 141 may be located between the layer of fig. 3 and the layer of fig. 4, the second insulating layer 142 may be located between the layer of fig. 4 and the layer of fig. 5, the interlayer insulating layer 160 may be located between the layer of fig. 5 and the layer of fig. 6, and the first organic insulating layer 171 and the first inorganic insulating layer 172 located on the first organic insulating layer 171 may be located between the layer of fig. 6 and the layer of fig. 7. An example is shown in fig. 8. The insulating layer may include contact holes to electrically connect various features of the layer structures in fig. 3 to 7 in a vertical direction.
Referring to fig. 2 to 7, the sub-pixels include a scan line 121, a previous scan line 122, an emission control line 123, and an initialization voltage line 124 arranged along a row direction to apply a scan signal Sn, a previous scan signal Sn-1, an emission control signal En, and an initialization voltage Vint, respectively, to the sub-pixels. The sub-pixel may include a data line 176 crossing the scan line 121, the previous scan line 122, the emission control line 123, and the initialization voltage line 124 to apply the data signal Dm and the driving voltage ELVDD to the sub-pixel, respectively, and power lines 177 and 178. The sub-pixels may include: the driving TFT T1, the switching TFT T2, the compensating TFT T3, the initializing TFT T4, the driving control TFT T5, the emission control TFT T6, the bypass TFT T7, the storage capacitor Cst, and the organic light emitting device OLED (for example, refer to fig. 8).
The driving TFT T1, the switching TFT T2, the compensating TFT T3, the initializing TFT T4, the driving control TFT T5, the emission control TFT T6, and the bypass TFT T7 may be formed along the active layer as in fig. 3. The active layer may have a curved or bent shape, and may include a driving active layer ACTa corresponding to the driving TFT T1, a switching active layer ACTb corresponding to the switching TFT T2, a compensation active layer ACTc corresponding to the compensation TFT T3, an initialization active layer ACTd corresponding to the initialization TFT T4, an operation control active layer ACTe corresponding to the driving control TFT T5, an emission control active layer ACTf corresponding to the emission control TFT T6, and a bypass active layer ACTg corresponding to the bypass TFT T7.
The active layer may include, for example, polysilicon, and may include, for example, a channel region, a source region, and a drain region. The channel region may be undoped with impurities and thus have semiconductor characteristics. The source and drain regions are on respective sides of the channel region and are doped with impurities and thus have conductivity. The impurities may vary depending on whether the TFT is an N-type or P-type transistor.
The doped source region or doped drain region may be interpreted as a source electrode or drain electrode of the TFT. For example, the driving source electrode may correspond to the driving source region 133a doped with impurities in the periphery of the driving channel region 131a of the driving active layer ACTa. The driving drain electrode may correspond to the driving drain region 135a doped with impurities in the periphery of the driving channel region 131 a. In addition, a portion of the active layer between TFTs can be interpreted as a wiring doped with impurities, and thus it is used to electrically connect the TFTs.
The storage capacitor Cst may include a first storage capacitor plate 125a and a second storage capacitor plate 127 with a second insulating layer 142 therebetween. The first storage capacitor plate 125a may also serve as the driving gate electrode 125a, for example, the driving gate electrode 125a and the first storage capacitor plate 125a may be integrally formed to have a unitary or integral construction.
Referring to fig. 4, the first storage capacitor plate 125a may have an island shape spaced apart from an adjacent subpixel. The first storage capacitor plate 125a may include the same material layer as the scan line 121, the previous scan line 122, and the emission control line 123.
The switching gate electrode 125b and the compensation gate electrodes 125c1 and 125c2 may be portions of the scan line 121 or protrusions from the scan line 121 crossing the active layer and the initialization gate electrodes 125d1 and 125d 2. The bypass gate electrode 125g may be a portion of the previous scan line 122 crossing the active layer or a protrusion from the previous scan line 122. The operation control gate electrode 125e and the emission control gate electrode 125f may be portions of the emission control line 123 crossing the active layer or protruding portions from the previous scan line 122.
The second storage capacitor plate 127 may extend over the adjacent subpixels. Referring to fig. 5, the second storage capacitor plate 127 may include the same material layer as the initialization voltage line 124 and/or the shielding layer 126. A storage opening 127h may be formed in the second storage capacitor plate 127. Accordingly, the first storage capacitor plate 125a and the compensation drain region 135c of the compensation TFT T3 may be electrically connected to each other through the storage opening 127h using the connection member 174. The second storage capacitor plate 127 may be connected to the lower power line 177 through a contact hole 168 in the interlayer insulating layer 160.
The driving TFT T1 includes a driving active layer ACTa and a driving gate electrode 125a. The driving active layer ACTa includes a driving source region 133a, a driving drain region 135a, and a driving channel region 131a connecting the driving source region 133a and the driving drain region 135 a. The driving gate electrode 125a may also be used as the first storage capacitor plate 125a. The driving channel region 131a of the driving active layer ACTa may planarly overlap with the driving gate electrode 125a. The driving source region 133a and the driving drain region 135a extend in both directions with respect to the driving channel region 131a. The driving source region 133a of the driving TFT T1 is connected to the switching drain region 135b and the operation control drain region 135e. The driving drain region 135a is connected to the compensation source region 133c and the emission control source region 133f.
The switching TFT T2 includes a switching active layer ACTb and a switching gate electrode 125b. The switching active layer ACTb includes a switching channel region 131b, a switching source region 133b, and a switching drain region 135b. The switching source region 133b may be electrically connected to the data line 176 through the contact hole 164 in the first insulating layer 141, the second insulating layer 142, and the interlayer insulating layer 160. The switching TFT T2 serves as a switching device for selecting an emission target subpixel. The switching gate electrode 125b is connected to the scan line 121, the switching source region 133b is connected to the data line 176, and the switching drain region 135b is connected to the driving TFT T1 and the driving control TFT T5.
The compensation TFT T3 includes a compensation active layer ACTc and compensation gate electrodes 125c1 and 125c2. The compensation active layer ACTc includes compensation channel regions 131c1, 131c2, and 131c3, compensation source region 133c, and compensation drain region 135c. The compensation gate electrodes 125c1 and 125c2 are double gate electrodes including the first compensation gate electrode 125c1 and the second compensation gate electrode 125c2, and can be used to prevent or reduce occurrence of leakage current.
The compensation drain region 135c of the compensation TFT T3 may be connected to the first storage capacitor plate 125a through a connection member 174. The compensation channel regions 131c1, 131c2, and 131c3 may include a portion 131c1 corresponding to the first compensation electrode 125c1, a portion 131c3 corresponding to the second compensation electrode 125c2, and a portion 131c2 between the portions 131c1 and 131c 3.
The shielding layer 126 may include the same material as the initialization voltage line 124 and the second storage capacitor plate 127A layer, and may be disposed on the portion 131c2, and may be connected to the lower power line 177 through a contact hole 169 in the interlayer insulating layer 160. The portion 131c2 between the two portions 131c1, 131c3 may be doped with impurities to have conductivity. Accordingly, if the shielding layer 126 is not disposed, the portion 131c2 and the adjacent data line 176 may form a parasitic capacitor. Since the data lines 176 apply data signals to the sub-pixels with different intensities according to the resolution to be achieved, the capacitance of the parasitic capacitor may be changed accordingly. Since the compensation TFT T3 is electrically connected to the driving TFT T1, when the capacitance of the parasitic capacitor in the compensation TFT T3 is changed, the driving current I d And emission current I OLED And thereby the resolution of the light emitted from the sub-pixels.
However, if the shielding layer 126 is connected to the power line 177 and a constant voltage is applied to the portion 131c2 disposed between the portions 131c1 and 131c3, the portion 131c2 and the shielding layer 126 may form a parasitic capacitor having a substantially constant capacitance. The parasitic capacitor may have a capacitance significantly larger than that of the parasitic capacitor formed by the portion 131c2 and the data line 176. Due to the variation of the data signal applied to the data line 176, the capacitance variation amount of the parasitic capacitor may be very small compared to the capacitance of the parasitic capacitor formed by the portion 131c2 and the shielding layer 126, and thus may be considered to be negligible. Therefore, a change in resolution of light emitted from the sub-pixel due to the capacitance change amount of the parasitic capacitor can be prevented.
As shown in fig. 6, the connection member 174 may include the same material layer as the data line 176 and the lower power line 177. The first end of the connection member 174 is connected to the compensation drain region 135c and the initialization drain region 135d through the contact hole 166 in the first insulating layer 141, the second insulating layer 142, and the interlayer insulating layer 160. The second end of the connection member 174 may be connected to the first storage capacitor plate 125a through the contact hole 167 in the second insulating layer 142 and the interlayer insulating layer 160. The second end of the connection member 174 is connected to the first storage capacitor plate 125a through a storage opening 127h in the second storage capacitor plate 127. The initializing TFT T4 includes an initializing active layer ACTd and initializing gate electrodes 125d1 and 125d2. The initialization active layer ACTd includes initialization channel regions 131d1, 131d2, and 131d3, an initialization source region 133d, and an initialization drain region 135d.
The initializing gate electrodes 125d1 and 125d2 have a double gate electrode structure including a first initializing gate electrode 125d1 and a second initializing gate electrode 125d2, and can be used to prevent or reduce occurrence of leakage current. The initialization channel regions 131d1, 131d2, and 131d3 include a region 131d1 corresponding to the first initialization gate electrode 125d1, a region 131d2 corresponding to the second initialization gate electrode 125d2, and a region 131d3 therebetween.
The initialization source region 133d is connected to the initialization voltage line 124 through an initialization connection line 173. A first end of the initialization connection line 173 may be connected to the initialization voltage line 124 through the contact hole 161 in the second insulating layer 142 and the interlayer insulating layer 160. A second end of the initialization connection line 173 may be connected to the initialization source region 133d through the contact hole 162 in the first insulating layer 141, the second insulating layer 142, and the interlayer insulating layer 160.
The drive control TFT T5 includes an operation control active layer ACTe and an operation control gate electrode 125e. The operation control active layer ACTe includes an operation control channel region 131e, an operation control source region 133e, and an operation control drain region 135e. The operation control source region 133e may be electrically connected to the lower power line 177 through the contact hole 165 in the first insulating layer 141, the second insulating layer 142, and the interlayer insulating layer 160.
The emission control TFT T6 includes an emission control active layer ACTf and an emission control gate electrode 125f, and the emission control active layer ACTf includes an emission control channel region 131f, an emission control source region 133f, and an emission control drain region 135f. The first conductive layer 175 may be located over the emission control TFT T6 and may be connected to the emission control drain region 135f of the emission control active layer ACTf through the contact hole 163 in the first insulating layer 141, the second insulating layer 142, and the interlayer insulating layer 160.
As shown in fig. 6, the first conductive layer 175 may include the same material layer as the data line 176 and the lower power line 177. The first conductive layer 175 is electrically connected to the second conductive layer 179. Accordingly, the first conductive layer 175 is electrically connected to the pixel electrode 191 of the organic light emitting device OLED (e.g., referring to fig. 8).
The shunt TFT T7 includes a shunt active layer ACTg and a shunt gate electrode 125g. The bypass active layer ACTg includes a bypass source region 133g, a bypass drain region 135g, and a bypass channel region 131g. The bypass drain region 135g is connected to the initialization source region 133d of the initialization TFT T4, and thus is connected to the initialization voltage line 124 through the initialization connection line 173. The bypass source region 133g is electrically connected to the pixel electrode 191 of the organic light emitting device OLED (for example, refer to fig. 8).
The second conductive layer 179 may be located over the first conductive layer 175, and may be electrically connected to the first conductive layer 175 through contact holes 183 in the first organic insulating layer 171 and the first inorganic insulating layer 172. The pixel electrode 191 of the organic light emitting device OLED may be located above the second conductive layer 179, and may be connected to the second conductive layer 179 through a contact hole 185 in the second organic insulating layer 181 between the second conductive layer 179 and the pixel electrode 191. For example, the first conductive layer 175 and the second conductive layer 179 may be intermediate connection layers that connect the emission control drain region 135f of the emission control active layer ACTf with the pixel electrode 191. These features may correspond to, for example, fig. 8.
Referring to fig. 7, the second conductive layer 179 may include the same material layer as the upper power line 178. The upper power line 178 may be connected to the lower power line 177 through contact holes 187 in the first organic insulating layer 171 and the first inorganic insulating layer 172. The power supply lines 177 and 178 are a lower power supply line 177 and an upper power supply line 178 electrically connected to each other. With this configuration, the area of the power lines 177 and 178 in the sub-pixels can be reduced or minimized, thereby reducing the resistance of the power lines 177 and 178. By reducing the voltage drop of the power supply lines 177 and 178, the image quality can be improved.
Fig. 8 is a cross-sectional view of the sub-pixel taken along line VIII-VIII' in fig. 2. Fig. 9 is a cross-sectional view of the sub-pixel taken along line IX-IX' in fig. 2. Fig. 10 is a cross-sectional view of the sub-pixel taken along line X-X' in fig. 2.
Referring to fig. 8 to 10, the organic light emitting display device includes a plurality of pixels, at least some of which include: a first conductive layer 175 over the substrate 110; a first organic insulating layer 171 including a first opening 171ha exposing a portion of the first conductive layer 175; a first inorganic insulating layer 172 over the first organic insulating layer 171 and including a second opening 172ha exposing a portion of the first conductive layer 175 exposed through the first opening 171ha; and a second conductive layer 179 on the first inorganic insulating layer 172. The second conductive layer 179 contacts portions of the first conductive layer 175 exposed through the first and second openings 171ha and 172 ha.
The substrate 110 may include at least one of a variety of materials such as a glass material, a metal material, a plastic material, and the like. According to the present embodiment, the substrate 110 may be a flexible substrate including, for example, a polymeric resin such as Polyethersulfone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate, polyimide (PI), polycarbonate (PC), or Cellulose Acetate Propionate (CAP).
The substrate 110 may include a display area for displaying an image and a non-display area located at the periphery of the display area. The pixels (or sub-pixels) are arranged in the display area. Fig. 2 illustrates one pixel (or sub-pixel) located in a display area of the substrate 110. The TFTs T1, T2, T3, T4, T5, T6, and T7 (for example, refer to fig. 2) and the organic light emitting devices OLED connected to at least one of the TFTs T1, T2, T3, T4, T5, T6, and T7 are located on the substrate 110. The cross-sectional structure of the pixel in fig. 2 will now be described.
Referring to fig. 8 to 10, a driving TFT T1, a driving control TFT T5, and an emission control TFT T6 are located above the substrate 110. The driving TFT T1 may include a driving active layer ACTa and a driving gate electrode 125a. The driving control TFT T5 may include an operation control active layer ACTe and an operation control gate electrode 125e, and the emission control TFT T6 may include an emission control active layer ACTf and an emission control gate electrode 125f. The respective active layers ACTa, ACTe, and ACTf may include amorphous silicon, polycrystalline silicon, or an organic semiconductor material, and may include respective source regions 133a, 133e, and 133f, respective drain regions 135a, 135e, and 135f, and respective channel regions 131a, 131e, and 131f connecting the source and drain regions.
The respective gate electrodes 125a, 125e, and 125f are located above the respective active layers ACTa, ACTe, and ACTf. The respective source regions 133a, 133e, and 133f are electrically connected with the respective drain regions 135a, 135e, and 135f based on signals applied to the respective gate electrodes 125a, 125e, and 125 f.
Each of the gate electrodes 125a, 125e, and 125f may have a single-layer or multi-stack layer structure including at least one of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu), for example, in consideration of adhesion of adjacent layers, planarization of a surface of a stacked target layer, formability, and the like.
In order to insulate the respective active layers ACTa, ACTe, and ACTf from the respective gate electrodes 125a, 125e, and 125f, the first insulating layer 141 includes an inorganic material (e.g., silicon oxide, silicon nitride, and/or silicon oxynitride) between the active layers ACTa, ACTe, and ACTf and the gate electrodes 125a, 125e, and 125 f. In addition, the second insulating layer 142 includes an inorganic material (e.g., silicon oxide, silicon nitride, and/or silicon oxynitride) over the gate electrodes 125a, 125e, and 125 f. An interlayer insulating layer 160 may be located over the second insulating layer 142. The interlayer insulating layer 160 may include an inorganic material, such as silicon oxide, silicon nitride, and/or silicon oxynitride.
The buffer layer 111 includes an inorganic material (e.g., silicon oxide, silicon nitride, and/or silicon oxynitride) between the substrate 110 and the TFTs T1, T5, and T6. The buffer layer 111 may improve the flatness of the surface of the substrate 110 or may prevent, minimize, or reduce penetration of impurities from the substrate 110 into the active layers ACTa, ACTe, and ACTf.
Referring to fig. 9, the second storage capacitor plate 127 faces the driving gate electrode 125a and may be located between the second insulating layer 142 and the interlayer insulating layer 160. The second storage capacitor plate 127 and the driving gate electrode 125a may correspond to the storage capacitor Cst. For example, the driving gate electrode 125a may be used not only as the driving gate electrode 125a of the driving TFT T1 but also as the first storage capacitor plate 125a of the storage capacitor Cst.
The first conductive layer 175 and the lower power line 177 may be located above the interlayer insulating layer 160, and may have a single-layer structure or a multi-stack layer structure including, for example, at least one of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu) in view of conductivity, etc.
For example, each of the first conductive layer 175 and the lower power line 177 may have a stacked structure of titanium (Ti)/aluminum (Al)/titanium (Ti). The first conductive layer 175 may be electrically connected to the emission control drain region 135f of the emission control active layer ACTf through the contact hole 163 in the first insulating layer 141, the second insulating layer 142, and the interlayer insulating layer 160, and adjacent to the emission control TFT T6. The lower power line 177 may be electrically connected to the operation control source region 133e of the operation control active layer ACTe through the contact hole 165 in the first insulating layer 141, the second insulating layer 142, and the interlayer insulating layer 160, and adjacent to the driving control TFT T5. The first organic insulating layer 171 may be positioned over the interlayer insulating layer 160 to cover the first conductive layer 175 and the lower power line 177. The first inorganic insulating layer 172 may be located above the first organic insulating layer 171.
The first organic insulating layer 171 may include an organic material, such as acrylic, benzocyclobutene (BCB), polyimide, or Hexamethyldisiloxane (HMDSO). The first inorganic insulating layer 172 may include an inorganic material, such as silicon oxide, silicon nitride, and/or silicon oxynitride. According to the present embodiment, the first organic insulating layer 171 may include, for example, polyimide. The first inorganic insulating layer 172 may include, for example, silicon nitride, and may planarize a surface including the data line 176, the first conductive layer 175, the lower power line 177, and the initialization connection line 173 and the connection member 174 thereon.
The second conductive layer 179 and the upper power line 178 may be located on the first inorganic insulating layer 172, and may have a single-layer structure or a multi-stack layer structure including, for example, at least one of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu) in view of conductivity or the like.
The second conductive layer 179 may have a stacked structure of titanium (Ti)/aluminum (Al)/titanium (Ti), for example. The first organic insulating layer 171 may include a first opening 171ha exposing a portion of the first conductive layer 175. The first inorganic insulating layer 172 may include a second opening 172ha exposing a portion of the first conductive layer 175 exposed through the first opening 171ha. The second conductive layer 179 may be electrically connected with the first conductive layer 175 through the first opening 171ha and the second opening 172ha. The first opening 171ha and the second opening 172ha may correspond to a contact hole 183 connecting the first conductive layer 175 and the second conductive layer 179. The first inorganic insulating layer 172 may include a second opening 172hb, the second opening 172hb exposing a portion of the lower power line 177 exposed through the first opening 171hb in the first organic insulating layer 171. The upper power line 178 may be electrically connected with the lower power line 177 through the first and second openings 171hb and 172 hb. The first and second openings 171hb and 172hb may correspond to contact holes 187 in the first organic insulating layer 171 and the first inorganic insulating layer 172, wherein the contact holes 187 connect the lower and upper power lines 177 and 178. For example, the power lines 177 and 178 (i.e., the lower power line 177 and the upper power line 178) are located on different layers and may occupy a reduced or minimal area. In addition, the resistance of the power lines 177 and 178 may be reduced or minimized.
The upper power line 178 may include a protruding portion 178a, the protruding portion 178a protruding to a portion of the second storage capacitor plate 127 that planarly overlaps the protruding portion 178 a. The upper power line 178 may be electrically connected to the lower power line 177 through contact holes 187 in the first organic insulating layer 171 and the first inorganic insulating layer 172. The lower power line 177 may be electrically connected to the second storage capacitor plate 127 through a contact hole 168 in the interlayer insulating layer 160. Accordingly, the upper power line 178 may be electrically connected to the second storage capacitor plate 127. For example, the protruding portion 178a of the upper power line 178 and the second storage capacitor plate 127 may function as one capacitor plate. This configuration may interoperate with the driving gate electrode 125a serving as the first storage capacitor plate 125a, thereby providing a stable capacitance of the storage capacitor Cst. The storage capacitor Cst may planarly overlap the driving TFT T1 occupying a large area in the pixel. By doing so, the storage capacitor Cst may occupy a reduced or minimum area in the pixel, and may have a high capacitance.
In order to form a high-resolution organic light emitting display device, the area of one pixel in the organic light emitting display device is reduced, thereby making the gap between the conductive layers in the pixel very small. For example, the gap between the second conductive layer 179 and the upper power line 178 on the same layer may be very small. Therefore, if the second conductive layer 179 and the upper power line 178 are not etched according to the design, the second conductive layer 179 and the upper power line 178 may be shorted, and thus the resulting pixel is defective.
A layer including an organic material is located under the second conductive layer 179 and the upper power line 178. The metal material in the second conductive layer 179 and the upper power line 178 is not completely etched. If the etching time is increased to completely etch the second conductive layer 179 and the upper power line 178, undesired layers may also be etched.
However, according to the present embodiment, the first inorganic insulating layer 172 is located under the second conductive layer 179 and the upper power line 178, and is located between the first organic insulating layer 171 and the second conductive layer 179/the upper power line 178. Accordingly, the problem of the second conductive layer 179 and the upper power line 178 not being etched as intended due to the organic material can be prevented or reduced. Accordingly, the possibility of forming defective pixels due to a short circuit between the second conductive layer 179 and the upper power line 178 can be prevented or reduced.
According to the present embodiment, the width L1 of the first opening 171ha in the first organic insulating layer 171 may be greater than the width L2 of the second opening 172ha in the first inorganic insulating layer 172. A portion of the first inorganic insulating layer 172 may extend to the first opening 171ha to directly contact the first conductive layer 175.
The second organic insulating layer 181 may be positioned over the first inorganic insulating layer 172 to cover the second conductive layer 179 and the upper power line 178. The second organic insulating layer 181 may include an organic material such as acrylic, benzocyclobutene (BCB), polyimide, or Hexamethyldisiloxane (HMDSO). The second organic insulating layer 181 may include, for example, polyimide. The second organic insulating layer 181 may include a third opening 181h exposing a portion of the second conductive layer 179. The pixel electrode 191 of the organic light emitting device OLED may be electrically connected to the second conductive layer 179 through the third opening 181h. The third opening 181h may correspond to a contact hole 185, wherein the pixel electrode 191 is connected to the second conductive layer 179 through the contact hole 185.
An organic light emitting device OLED including a pixel electrode 191, an intermediate layer 192 above the pixel electrode 191 and including an emission layer, and an opposite electrode 193 above the intermediate layer 192 may be above the second organic insulating layer 181. The pixel electrode 191 may be electrically connected to the emission control drain region 135f of the emission control active layer ACTf through the second conductive layer 179 and the first conductive layer 175.
The pixel electrode 191 may be a semitransparent electrode or a reflective electrode. When the pixel electrode 191 is a semitransparent electrode, the pixel electrode 191 may include a transparent conductive layer. The transparent conductive layer may include, for example, indium Tin Oxide (ITO), indium Zinc Oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ) At least one of Indium Gallium Oxide (IGO) and zinc aluminum oxide (AZO). The pixel electrode 191 may include a transflective layer for improving luminous efficiency in addition to the transparent conductive layer. The transflective layer may be a thin layer (e.g., several nanometers to several tens of nanometers thick) and may include at least one of Ag, mg, al, pt, pd, au, ni, nd, ir, cr, li, ca and Yb.
When the pixel electrode 191 is a reflective electrode, the pixel electrode 191 may include a reflective layer including Ag, mg, al, pt, pd, au, ni, nd, ir, cr or a compound thereof and a transparent conductive layer on and/or under the reflective layer. The transparent conductive layer may include ITO, IZO, znO, in 2 O 3 At least one of IGO and AZO. In another embodiment, the pixel electrode 191 may include at least one of a variety of materials, and may have a single-layer structure or a multi-layer structure. The pixel defining layer may include an opening exposing at least a portion of the pixel electrode 191, and may be disposed over the pixel electrode 191.
The intermediate layer 192 located above the pixel electrode 191 may include, for example, a small molecule material or a polymer material. When the intermediate layer 192 includes a small molecular material, the intermediate layer 192 may have a structure of a single or multiple stacks of a Hole Injection Layer (HIL), a Hole Transport Layer (HTL), an emission layer (EML), an Electron Transport Layer (ETL), an Electron Injection Layer (EIL), and the like. The intermediate layer 192 may include a variety of organic materials including, for example, copper phthalocyanine (CuPc), N '-Di (naphthalen-1-yl) -N, N' -diphenyl-benzidine (NPB), tris (8-hydroxyquinoline) aluminum (Alq 3), or the like. The above-mentioned layers may be formed by, for example, a vacuum deposition method.
When the intermediate layer 192 comprises a polymeric material, the intermediate layer 192 may have a structure that generally includes an HTL and an EML. The HTL may include, for example, poly- (2, 4) -ethylene-dihydroxythiophene (PEDOT). The EML may include, for example, a poly-p-phenylene vinylene (PPV) based polymer material, or a polyfluorene based polymer material, or the like. The intermediate layer 192 may be formed, for example, by a screen printing method, an inkjet printing method, a Laser Induced Thermal Imaging (LITI) method, or the like.
In another embodiment, the intermediate layer 192 may have a different structure. The intermediate layer 192 may include a layer extending over the pixel electrodes 191 respectively included in the plurality of pixels, or may include a layer patterned to correspond to each of the pixel electrodes 191.
The opposite electrode 193 may be formed as a unit extending over the pixel, and thus may correspond to the pixel electrode 191. The opposite electrode 193 may be a semitransparent electrode or a reflecting electrode. When the opposite electrode 193 is a semitransparent electrode, the opposite electrode 193 may include at least one of Ag, al, mg, li, ca, cu, liF/Ca, liF/Al, mgAg, and CaAg, and may be formed as a thin layer of several nanometers to several tens of nanometers. When the opposite electrode 193 is formed as a reflective electrode, the opposite electrode 193 may include at least one of Ag, al, mg, li, ca, cu, liF/Ca, liF/Al, mgAg and CaAg. In another embodiment, the structure and material of the opposite electrode 193 may be different.
Fig. 11 to 14 are cross-sectional views of embodiments of an organic light emitting display device. Referring to fig. 11, the organic light emitting display device includes a plurality of pixels, at least one of which includes: a first conductive layer 275 over the substrate 210; a first organic insulating layer 271 including a first opening 271ha exposing a portion of the first conductive layer 275; a first inorganic insulating layer 272 located over the first organic insulating layer 271 and including a second opening 272ha exposing a portion of the first conductive layer 275 exposed through the first opening 271ha; and a second conductive layer 279 on the first inorganic insulating layer 272 and contacting a portion of the first conductive layer 275 exposed through the first opening 271ha and the second opening 272 ha.
The buffer layer 211 may be located above the substrate 210. A TFT Tr including the active layer ACT and the gate electrode 225 may be located above the buffer layer 211. The active layer ACT may include a channel region 231 for connecting the source region 233 and the drain region 235. The source region 233 and the drain region 235 include semiconductor material doped with impurities, and thus have conductivity. The first insulating layer 241 may be located between the active layer ACT and the gate electrode 225. An interlayer insulating layer 260 may be positioned over the first insulating layer 241 to cover the gate electrode 225. The TFT Tr may be, for example, one of a driving TFT, an emission control TFT, and the like.
The first conductive layer 275 may be located over the interlayer insulating layer 260, and may contact the drain region 235 of the active layer ACT through the first insulating layer 241 and the contact hole 263 in the interlayer insulating layer 260. The first organic insulating layer 271 and the first inorganic insulating layer 272 are over the first conductive layer 275. The first organic insulating layer 271 includes an organic material, and thus planarizes a surface on which the second conductive layer 279 is to be disposed.
The first inorganic insulating layer 272 performs a passivation function, and prevents at least a portion of the first organic insulating layer 271 and the second conductive layer 279 from contacting each other.
The second conductive layer 279 may be formed by disposing a conductive material on the first inorganic insulating layer 272 and then etching the conductive material. The first inorganic insulating layer 272 may isolate the first organic insulating layer 271 from portions of the conductive material to be removed. If the conductive material directly contacts the first organic insulating layer 271, a problem may occur in the case where the conductive material is not completely removed when the conductive material is etched. To prevent this problem, a first inorganic insulating layer 272 may be located between the conductive material and the first organic insulating layer 271.
The second conductive layer 279 may be positioned on the first inorganic insulating layer 272. For example, the second conductive layer 279 may have a stacked structure, wherein the stacked structure includes: a first layer 279a including titanium (Ti); a second layer 279b on the first layer 279a and including aluminum (Al); and a third layer 279c including titanium (Ti) and located on the second layer 279 b. The first conductive layer 275 and the second conductive layer 279 may have the same structure. In another embodiment, each of the first conductive layer 275 and the second conductive layer 279 may include at least one of a plurality of metal materials or a combination of a plurality of metal materials in consideration of conductivity and the like.
The second conductive layer 279 may be electrically connected to the first conductive layer 275 through the first opening 271ha in the first organic insulating layer 271 and the second opening 272ha in the first inorganic insulating layer 272. Since the width L2 of the second opening 272ha is greater than the width L1 of the first opening 271ha, the first opening 271ha may be completely exposed due to the second opening 272 ha. The first organic insulating layer 271 may include an organic material, may planarize a surface on which the second conductive layer 279 or the like is disposed, and may have a thickness t1.
The thickness t1 of the first organic insulating layer 271 may be greater than the thickness t2 of the first inorganic insulating layer 272. For example, the thickness t1 of the first organic insulating layer 271 may be between about 1.6 μm and about 1.8 μm. The thickness t2 of the first inorganic insulating layer 272 may be between about 0.5 μm and about 0.6 μm. Accordingly, the thickness t1 of the first organic insulating layer 271 may be at least twice greater than the thickness t2 of the first inorganic insulating layer 272.
The second organic insulating layer 281 may be positioned over the first inorganic insulating layer 272 to cover the second conductive layer 279. The pixel electrode 291 may be located over the second organic insulating layer 281 to contact the second conductive layer 279 through the contact hole 285 in the second organic insulating layer 281.
Referring to fig. 12, the organic light emitting display device according to the present embodiment includes a plurality of pixels. At least one of the pixels includes: a first conductive layer 375 over the substrate; a first organic insulating layer 371 including a first opening 371ha exposing a portion of the first conductive layer 375; a first inorganic insulating layer 372 over the first organic insulating layer 371 and including a second opening 372ha exposing a portion of the first conductive layer 375 exposed through the first opening 371ha; and a second conductive layer 379 over the first inorganic insulating layer 372 and contacting a portion of the first conductive layer 375 exposed through the first and second openings 371ha and 372 ha.
The first conductive layer 375 may be electrically connected to another conductive layer in the TFT located under the interlayer insulating layer 360. The second conductive layer 379 may be electrically connected to another conductive layer located over the second organic insulating layer 381.
The first inorganic insulating layer 372 may be positioned over the first organic insulating layer 371, and may include an additional opening 372hc in addition to the second opening 372 ha. A portion of the first organic insulation layer 371 may be exposed through the additional opening 372hc. This can prevent the gas generated in the first organic insulating layer 371 from being trapped by the first inorganic insulating layer 372, and thus can improve the life of the organic light emitting display device. The additional opening 372hc may serve as a discharge path for gas generated in the first organic insulating layer 371.
The first organic insulating layer 371 and the second organic insulating layer 381 may contact each other through the additional opening 372 hc. The additional opening 372hc may also be formed in a portion of the first inorganic insulating layer 372 that is covered by the second conductive layer 379.
Referring to fig. 13, the organic light emitting display device according to the present embodiment includes a plurality of pixels. At least one of the pixels includes: a first conductive layer 475 over the interlayer insulating layer 460 on the substrate; a first organic insulating layer 471 including a first opening 471ha exposing a portion of the first conductive layer 475; a first inorganic insulating layer 472 over the first organic insulating layer 471 and including a second opening 472ha exposing a portion of the first conductive layer 475 exposed through the first opening 471ha; and a second conductive layer 479 on the first inorganic insulating layer 472 and contacting a portion of the first conductive layer 475 exposed through the first opening 471ha and the second opening 472 ha.
The first inorganic insulating layer 472 may be located over the first organic insulating layer 471. A second inorganic insulating layer 482 may be positioned over the first inorganic insulating layer 472 to cover the second conductive layer 479. Accordingly, the second inorganic insulating layer 482 may be located between the second conductive layer 479 and the second organic insulating layer 481, and may include an inorganic material such as silicon oxide, silicon nitride, and/or silicon oxynitride.
The second inorganic insulating layer 482 may protect the second conductive layer 479, and may cover a top surface and edges 479a of the second conductive layer 479. The second inorganic insulating layer 482 may extend from a top surface of the second conductive layer 479, may cover an edge 479a of the second conductive layer 479, and may then continuously extend to a top surface of the first inorganic insulating layer 472 to directly contact the first inorganic insulating layer 472. Accordingly, the second conductive layer 479 may be completely surrounded by the first inorganic insulating layer 472 and the second inorganic insulating layer 482.
Referring to fig. 14, the organic light emitting display device according to the present embodiment includes a plurality of pixels. At least one of the pixels includes: a first conductive layer 575 over the interlayer insulating layer 560 on the substrate; a first organic insulating layer 571 including a first opening 571ha exposing a portion of the first conductive layer 575; a first inorganic insulating layer 572 over the first organic insulating layer 571 and including a second opening 572ha exposing a portion of the first conductive layer 575 exposed through the first opening 571ha; and a second conductive layer 579 on the first inorganic insulating layer 572 and contacting a portion of the first conductive layer 575 exposed through the first opening 571ha and the second opening 572 ha.
The first inorganic insulating layer 572 may be located over the first organic insulating layer 571. A second inorganic insulating layer 582 may be positioned over the first inorganic insulating layer 572 to cover the second conductive layer 579. The second inorganic insulating layer 582 may protect the second conductive layer 579 and may cover a top surface and edges 579a of the second conductive layer 579. The second inorganic insulating layer 582 may include a portion that directly contacts the second conductive layer 579.
The first inorganic insulating layer 572 may include a plurality of additional openings 572hc in addition to the second openings 572 ha. Portions of the first organic insulating layer 571 may be exposed through the additional openings 572hc. The second inorganic insulating layer 582 may include a fourth opening 582h corresponding to the additional opening 572hc of the first inorganic insulating layer 572. A portion of the first organic insulating layer 571 exposed through the additional opening 572hc of the first inorganic insulating layer 572 may be exposed through the fourth opening 582h. This is to reduce or prevent gas generated in the first organic insulating layer 571 from being trapped by the first inorganic insulating layer 572 and the second inorganic insulating layer 582, and this may also improve the lifetime of the organic light emitting display device. The additional opening 572hc and the fourth opening 582h may serve as exhaust paths for gases generated in the first organic insulating layer 571.
The first organic insulating layer 571 and the second organic insulating layer 581 may be in contact with each other through the additional opening 572hc and the fourth opening 582 h.
In the organic light emitting display device according to one or more embodiments described above, the first organic insulating layer (171, 271, 371, 471, or 571) is positioned under the second conductive layer (179, 279, 379, 479, or 579) to planarize a surface on which the second conductive layer is disposed. The first inorganic insulating layer is located between the first organic insulating layer and the second conductive layer, which is designed to be electrically disconnected from the adjacent conductive layer, makes it possible to prevent the problem that the second conductive layer is not completely etched and thus is connected to the adjacent conductive layer.
According to one or more embodiments, the organic light emitting display device prevents a problem that: the conductive layers designed to be electrically insulated from each other are not etched and electrically connected according to the design, thereby forming defective pixels.
Exemplary embodiments have been disclosed herein, and although specific terms are employed, they are used and are to be interpreted in a generic and descriptive sense only and not for purpose of limitation. In some cases, features, characteristics, and/or elements described in connection with a particular embodiment may be used alone or in combination with features, characteristics, and/or elements described in connection with other embodiments unless indicated otherwise, as will be apparent to those of skill in the art at the time of filing the present application. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the embodiments as set forth in the claims.

Claims (18)

1. An organic light emitting display device comprising:
a plurality of pixels, at least one of the pixels comprising:
a first conductive layer over the substrate;
a first organic insulating layer over the first conductive layer and including a first opening exposing a portion of the first conductive layer;
a first inorganic insulating layer over the first organic insulating layer and including a second opening exposing the portion of the first conductive layer exposed through the first opening;
a second conductive layer on the first inorganic insulating layer and contacting the portion of the first conductive layer exposed through the first opening and the second opening, the second conductive layer being in direct contact with a top surface of the first organic insulating layer;
a second organic insulating layer over the second conductive layer, the second organic insulating layer including a third opening exposing the second conductive layer; and
a pixel electrode contacting the second conductive layer through the third opening,
wherein the second organic insulating layer is disposed between the second conductive layer and the pixel electrode.
2. The apparatus of claim 1, further comprising:
A thin film transistor comprising an active layer and a gate electrode insulated from the active layer, wherein the active layer comprises a channel region connecting a source region and a drain region, and wherein the first conductive layer is electrically connected to the source region or the drain region.
3. The apparatus of claim 1, wherein a thickness of the first organic insulating layer is greater than a thickness of the first inorganic insulating layer.
4. The apparatus of claim 1, wherein the first inorganic insulating layer comprises a plurality of additional openings exposing a portion of the first organic insulating layer.
5. The device of claim 4, wherein the first organic insulating layer directly contacts the second organic insulating layer through at least one of the additional openings.
6. The apparatus of claim 1, further comprising:
and a second inorganic insulating layer between the second conductive layer and the second organic insulating layer.
7. The apparatus of claim 6, wherein the second inorganic insulating layer covers an edge of the second conductive layer and includes a portion in contact with the first inorganic insulating layer.
8. The apparatus of claim 1, further comprising:
An intermediate layer located above the pixel electrode and including an emission layer; and
and an opposite electrode positioned above the intermediate layer.
9. The apparatus of claim 1, further comprising:
a lower power line on the same layer as the first conductive layer, an
And an upper power line on the same layer as the second conductive layer.
10. The apparatus of claim 9, wherein the lower power line and the upper power line are electrically connected to each other through contact holes in the first organic insulating layer and the first inorganic insulating layer.
11. The apparatus of claim 9, further comprising:
a storage capacitor including a first plate located above the substrate and a second plate facing the first plate, wherein the second plate is located on a different layer from the lower power line and the upper power line and is electrically connected to the lower power line and the upper power line.
12. The apparatus of claim 1, wherein:
the first organic insulating layer comprises polyimide, and
the first inorganic insulating layer includes silicon oxide or silicon nitride.
13. The device of claim 1, wherein the second conductive layer comprises a first layer comprising titanium, a second layer comprising aluminum, and a third layer comprising titanium.
14. The apparatus of claim 1, wherein:
the width of the first opening is larger than the width of the second opening, and
the first inorganic insulating layer includes a portion that contacts the first conductive layer in the first opening.
15. An organic light emitting display device comprising:
a plurality of pixels, at least one of the pixels comprising:
a first conductive layer over the substrate;
a first organic insulating layer over the first conductive layer and including a first opening exposing a portion of the first conductive layer;
a first inorganic insulating layer over the first organic insulating layer and including a second opening exposing the portion of the first conductive layer exposed through the first opening;
a second conductive layer over the first inorganic insulating layer and contacting the portion of the first conductive layer exposed through the first opening and the second opening;
a second organic insulating layer over the second conductive layer, the second organic insulating layer including a third opening exposing the second conductive layer; and
a pixel electrode contacting the second conductive layer through the third opening,
Wherein the second organic insulating layer is disposed between the second conductive layer and the pixel electrode, an
Wherein the first inorganic insulating layer includes a plurality of additional openings exposing the first organic insulating layer, the first organic insulating layer directly contacting the second organic insulating layer through at least one of the plurality of additional openings.
16. The organic light emitting display device of claim 15, wherein the first opening in the first organic insulating layer is aligned with the second opening in the first inorganic insulating layer.
17. The organic light emitting display device of claim 16, wherein the first organic insulating layer and the first inorganic insulating layer have different thicknesses.
18. The organic light-emitting display device of claim 17, wherein the first inorganic insulating layer is thinner than the first organic insulating layer.
CN201710206530.5A 2016-04-04 2017-03-31 Pixel and organic light emitting display device including the same Active CN107275368B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2016-0041253 2016-04-04
KR1020160041253A KR102642198B1 (en) 2016-04-04 2016-04-04 Organic light-emitting display apparatus

Publications (2)

Publication Number Publication Date
CN107275368A CN107275368A (en) 2017-10-20
CN107275368B true CN107275368B (en) 2023-05-09

Family

ID=58488857

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710206530.5A Active CN107275368B (en) 2016-04-04 2017-03-31 Pixel and organic light emitting display device including the same

Country Status (5)

Country Link
US (1) US11335749B2 (en)
EP (1) EP3232475B1 (en)
KR (1) KR102642198B1 (en)
CN (1) CN107275368B (en)
TW (1) TWI754634B (en)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102568781B1 (en) * 2016-05-31 2023-08-22 삼성디스플레이 주식회사 Organic light-emitting display apparatus
KR102594020B1 (en) 2016-12-07 2023-10-27 삼성디스플레이 주식회사 Display device
KR102519399B1 (en) 2018-01-02 2023-04-10 삼성디스플레이 주식회사 Display apparatus
KR102623339B1 (en) * 2018-07-17 2024-01-11 삼성디스플레이 주식회사 Pixel and organic light emitting display device having the same
KR102571661B1 (en) * 2018-11-09 2023-08-28 엘지디스플레이 주식회사 Display panel and display panel
TWI742339B (en) * 2019-01-28 2021-10-11 友達光電股份有限公司 Display panel
KR20200142638A (en) * 2019-06-12 2020-12-23 삼성디스플레이 주식회사 Display device
KR20210022807A (en) * 2019-08-20 2021-03-04 삼성디스플레이 주식회사 Pixel and display device including the same
KR20210029330A (en) * 2019-09-05 2021-03-16 삼성디스플레이 주식회사 Pixel of an organic light emitting diode display device, and organic light emitting diode display device
KR20210070462A (en) * 2019-12-04 2021-06-15 삼성디스플레이 주식회사 Display device
KR20210088026A (en) * 2020-01-03 2021-07-14 삼성디스플레이 주식회사 Display device
KR20210149946A (en) * 2020-06-02 2021-12-10 삼성디스플레이 주식회사 Display device
CN115485847A (en) 2020-08-31 2022-12-16 京东方科技集团股份有限公司 Display panel and display device
CN112086468B (en) * 2020-09-03 2023-08-22 武汉华星光电半导体显示技术有限公司 display panel
JP2022047357A (en) * 2020-09-11 2022-03-24 キオクシア株式会社 Semiconductor device and manufacturing method for the same
CN112331612A (en) * 2020-11-09 2021-02-05 歌尔微电子有限公司 Method for manufacturing semiconductor chip
CN113594180B (en) * 2021-07-22 2023-09-15 Tcl华星光电技术有限公司 Array substrate, preparation method thereof and display panel
CN114898690A (en) * 2022-01-24 2022-08-12 北京京东方技术开发有限公司 Display panel and display device
KR20240018019A (en) * 2022-08-01 2024-02-13 삼성디스플레이 주식회사 Display device and method of driving the same

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1536465A1 (en) * 2003-11-27 2005-06-01 Samsung SDI Co., Ltd. TFT and flat panel display having via holes and anode with tapered edges
JP2006018225A (en) * 2004-06-30 2006-01-19 Samsung Sdi Co Ltd Organic electroluminescence display device
CN1828924A (en) * 2004-11-18 2006-09-06 三星Sdi株式会社 Flat panel display and its method of fabrication
JP2007179914A (en) * 2005-12-28 2007-07-12 Kyocera Corp El device and method of manufacturing same
CN101127358A (en) * 2006-08-18 2008-02-20 三星电子株式会社 Thin-film transistor substrate, method of manufacturing the same and display apparatus having the same
CN103107181A (en) * 2011-11-14 2013-05-15 三星显示有限公司 Organic light-emitting display device and method of manufacturing the same
CN104716143A (en) * 2013-12-17 2015-06-17 三星显示有限公司 Thin film transistor array substrate, organic light-emitting display apparatus, and method of manufacturing the thin film transistor array substrate
CN104867961A (en) * 2015-04-24 2015-08-26 京东方科技集团股份有限公司 Array substrate and manufacturing method thereof, and display apparatus

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002095834A1 (en) 2001-05-18 2002-11-28 Sanyo Electric Co., Ltd. Thin film transistor and active matrix type display unit production methods therefor
US6852997B2 (en) 2001-10-30 2005-02-08 Semiconductor Energy Laboratory Co., Ltd. Light emitting device
US7038239B2 (en) 2002-04-09 2006-05-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor element and display device using the same
TWI263339B (en) * 2002-05-15 2006-10-01 Semiconductor Energy Lab Light emitting device and method for manufacturing the same
JP4593179B2 (en) 2003-06-17 2010-12-08 株式会社半導体エネルギー研究所 Display device
KR100611650B1 (en) * 2004-06-25 2006-08-11 삼성에스디아이 주식회사 organic electro-luminescence device and method for fabricating the same
KR20060001377A (en) 2004-06-30 2006-01-06 삼성에스디아이 주식회사 Oled with improved adhesion of pixel electrode in via hole
KR100659765B1 (en) * 2005-09-08 2006-12-19 삼성에스디아이 주식회사 Organic electroluminescence display device and fabricating method of the same
JP4655942B2 (en) 2006-01-16 2011-03-23 セイコーエプソン株式会社 LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE MANUFACTURING METHOD, AND ELECTRONIC DEVICE
JP4353237B2 (en) 2006-11-17 2009-10-28 ソニー株式会社 Pixel circuit, display device, and method of manufacturing pixel circuit
KR100807560B1 (en) * 2006-11-30 2008-03-03 삼성에스디아이 주식회사 Organic light emitting diode display and method for fabricating of the same
JP4978298B2 (en) * 2007-04-25 2012-07-18 セイコーエプソン株式会社 Organic electroluminescence device
KR20090024383A (en) * 2007-09-04 2009-03-09 삼성전자주식회사 Thin film trnasistor display substrate, method of manufacturing the same and display apparatus having the same
KR100875103B1 (en) * 2007-11-16 2008-12-19 삼성모바일디스플레이주식회사 Organic light emitting display
EP2346020A4 (en) * 2008-10-02 2014-12-31 Sharp Kk Display device substrate, display device substrate manufacturing method, display device, liquid crystal display (lcd) device, lcd manufacturing method, and organic electroluminescence display device
TWI607670B (en) * 2009-01-08 2017-12-01 半導體能源研究所股份有限公司 Light emitting device and electronic device
KR101084256B1 (en) * 2009-12-08 2011-11-16 삼성모바일디스플레이주식회사 Organic light emitting diode display and manufacturing method thereof
KR101146991B1 (en) 2010-05-07 2012-05-23 삼성모바일디스플레이주식회사 Organic light emitting diode display apparatus and method of manufacturing the same
KR20110134685A (en) * 2010-06-09 2011-12-15 삼성모바일디스플레이주식회사 Display device and method for manufacturing the same
KR101234230B1 (en) * 2010-06-17 2013-02-18 삼성디스플레이 주식회사 Organic light emitting display device and manufacturing method of the same
US20130069067A1 (en) * 2011-09-20 2013-03-21 Keun Chun Youn Organic light emitting diode (oled) display device and method for manufacturing the same
KR101339000B1 (en) * 2011-12-14 2013-12-09 엘지디스플레이 주식회사 Organic light emitting display device and method of fabricating thereof
JP2013222178A (en) 2012-04-19 2013-10-28 Kyocera Corp Display device
JP6214077B2 (en) * 2012-07-31 2017-10-18 株式会社Ｊｏｌｅｄ DISPLAY DEVICE, DISPLAY DEVICE MANUFACTURING METHOD, ELECTRONIC DEVICE, AND DISPLAY DEVICE DRIVE METHOD
JP6302186B2 (en) 2012-08-01 2018-03-28 株式会社半導体エネルギー研究所 Display device
KR101996438B1 (en) 2012-12-13 2019-07-05 삼성디스플레이 주식회사 Substrate for display device, display device and method of manufacturing the same
KR20140139304A (en) * 2013-05-27 2014-12-05 삼성디스플레이 주식회사 Organic light emitting diode display
US20140353622A1 (en) 2013-05-30 2014-12-04 Samsung Display Co., Ltd. Organic light-emitting display apparatus and method of manufacturing the same
US9570528B2 (en) 2013-05-30 2017-02-14 Samsung Display Co., Ltd. Organic light-emitting display apparatus
JP2013231977A (en) 2013-06-04 2013-11-14 Semiconductor Energy Lab Co Ltd Display device
KR102192473B1 (en) * 2014-08-01 2020-12-18 엘지디스플레이 주식회사 Organic Light Emitting Display Device
KR102401063B1 (en) * 2015-11-10 2022-05-24 엘지디스플레이 주식회사 Backplane Substrate Having In-cell Type Touch Panel, and Liquid Crystal Display Device Using the Same and Method for Manufacturing the Same

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1536465A1 (en) * 2003-11-27 2005-06-01 Samsung SDI Co., Ltd. TFT and flat panel display having via holes and anode with tapered edges
JP2006018225A (en) * 2004-06-30 2006-01-19 Samsung Sdi Co Ltd Organic electroluminescence display device
CN1828924A (en) * 2004-11-18 2006-09-06 三星Sdi株式会社 Flat panel display and its method of fabrication
JP2007179914A (en) * 2005-12-28 2007-07-12 Kyocera Corp El device and method of manufacturing same
CN101127358A (en) * 2006-08-18 2008-02-20 三星电子株式会社 Thin-film transistor substrate, method of manufacturing the same and display apparatus having the same
CN103107181A (en) * 2011-11-14 2013-05-15 三星显示有限公司 Organic light-emitting display device and method of manufacturing the same
CN104716143A (en) * 2013-12-17 2015-06-17 三星显示有限公司 Thin film transistor array substrate, organic light-emitting display apparatus, and method of manufacturing the thin film transistor array substrate
CN104867961A (en) * 2015-04-24 2015-08-26 京东方科技集团股份有限公司 Array substrate and manufacturing method thereof, and display apparatus

Also Published As

Publication number Publication date
KR20170115148A (en) 2017-10-17
KR102642198B1 (en) 2024-03-05
CN107275368A (en) 2017-10-20
EP3232475B1 (en) 2022-02-16
US11335749B2 (en) 2022-05-17
US20170287996A1 (en) 2017-10-05
TW201801062A (en) 2018-01-01
TWI754634B (en) 2022-02-11
EP3232475A1 (en) 2017-10-18

Similar Documents

Publication Publication Date Title
CN107275368B (en) Pixel and organic light emitting display device including the same
KR102568781B1 (en) Organic light-emitting display apparatus
US10903298B2 (en) Display device
US10868096B2 (en) Display device
CN107275506B (en) Display device having protective layer and encapsulation layer for sealing display unit
US10790346B2 (en) Display device having reduced crosstalk
US7692191B2 (en) Top-emitting organic light emitting device
US20230189593A1 (en) Display apparatus
US10038048B2 (en) Display apparatus
US11961950B2 (en) Display device
EP3680710A1 (en) Display device including connective wrings within a display area thereof
KR20150005108A (en) Display device
US20220059637A1 (en) Display apparatus
US11652109B2 (en) High-resolution display apparatus with low-resistance wiring
US20240090260A1 (en) Display apparatus
KR102548296B1 (en) Pattern structure for display device and manufacturing method thereof
KR20220088596A (en) Display apparatus
KR20230000508A (en) Display device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant