CN107273601A - Method is influenceed to signal integrity based on FDTD Algorithm Analysis ground hole - Google Patents
Method is influenceed to signal integrity based on FDTD Algorithm Analysis ground hole Download PDFInfo
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- G06F30/20—Design optimisation, verification or simulation
- G06F30/23—Design optimisation, verification or simulation using finite element methods [FEM] or finite difference methods [FDM]
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Abstract
Method is influenceed to signal integrity based on FDTD Algorithm Analysis ground hole the invention discloses one kind, it comprises the following steps：Step S1, it is different reference planes that signal is changed layer punishment by the concrete condition changed according to high speed signal at layer；Step S2, equivalent π models are set up according to the analysis to signal via structure；Step S3, is analyzed ground hole using FDTD algorithms；Step S4, the S parameter and the two-port network of equivalent π models extracted using HFSS simulation softwares, and calculate the through hole parasitic parameter in the range of 3GHz；Step S5, com-parison and analysis is carried out to FDTD result of calculations and HFSS simulation results；Step S6, the S parameter in the case of hole is connect to having, without ground and time domain response continues to compare, and determines improvement result of the ground hole to signal integrity.It is of the invention accurately to judge influence of the ground hole to signal integrity, greatly reduce PCB change layer at signal between ground hole influence each other.
Description
Technical field
Method is influenceed to signal integrity based on FDTD Algorithm Analysis ground hole the present invention relates to one kind, belongs to server
PCB technical field.
Background technology
FDTD by its direct time-domain calculating, wide applicability, save memory space and calculate be adapted to parallel computation and in terms of
The characteristics of versatility of calculation program, just paid attention to by more and more extensive, and be progressively applied to practical problem.Can be by all-wave electricity
The accuracy of magnetic analysis and the rapidity of circuit analysis combine, and are extracted using FDTD full-wave electromagnetics method after frequency variable element,
Switch to analyze high speed interconnection using a variety of circuit analysis methods.FDTD is a kind of explicit difference algorithm, is spacer step on time
Enter changing rule of the computational EM waves in calculating space, time step and spatial mesh size should observe certain rule, otherwise
Can occur stability problem.This unstability is not due to accumulation of error generation, and is due to artificial stipulated time and sky
Between step-length destroy what the causality of Electromagnetic Wave Propagation was caused.Therefore, for the meter stablized with derived difference equation
Calculate, it is necessary to reasonably access time step-length and the relation of spatial mesh size.
FDTD is just applied to practical problem, with signal response and synchro switch in the direct sunykatuib analysis high speed circuit of electromagnetic field
The method of noise, is compared to conventional equivalent circuit method, and either computational accuracy or application have huge advance.
The electrical characteristics that multiple large scale computers are used parallel and multi-layer PCB are carried out in FDTD methods are simulated, and make full use of FDTD to be adapted to parallel
The advantage of calculating, the electromagnetism computational efficiency for multi-layer PCB improves a lot.
Nowadays, to the SI positive coordinated for tending to field road hybrid modeling and a variety of numerical algorithms of research.Can will be complete
The accuracy of ripple emi analysis and the rapidity of circuit analysis combine, and frequency variable element is extracted using FDTD full-wave electromagnetics method
Afterwards, switch to analyze high speed interconnection using a variety of circuit analysis methods, for example, can application model drop to complicated circuit system
Rank is analyzed；Because device pin is more, layout density is big and constraints is more in High-Speed-Board, logical feelings can just be walked by being routed in one layer
Condition is considerably less, and via just seems essential as layer means of changing of signal.Not only consider that via is connective under high-speed condition, also
Electrical characteristic, the influence of parasitic parameter when being considered as its high frequency, for wide band high speed signal, its ghost effect is more multiple
It is miscellaneous.
Now, via can cause reflection, decay of signal etc. to be asked equivalent to a discontinuity point on signal transmission path
Topic.According to technique, via is divided into through hole, blind hole, buried via hole and micropore.Through hole passes through whole wiring board, available for realizing internal mutual
Connect or be used as the mounting-positioning holes of element；Blind hole, buried via hole and micropore are conducive to improving PCB density, are mainly used in multi-chip mould
In block, but complex manufacturing technology, cost is high compared with through hole, so overwhelming majority PCB uses through hole.
From the point of view of the effect of via, except signal via mentioned above, also via and dissipating vias.The present invention will
The influence to high speed signal of research signal via, and being changed by FDTD analysis groundings via to high speed signal integrality in detail
Kind effect.
The content of the invention
For the deficiency of above-mentioned technology, the invention provides one kind based on FDTD Algorithm Analysis ground holes to signal integrity
Influence method, it can accurately judge influence of the ground hole to signal integrity, and reduction PCB greatly is changed at layer with being grounded
Signal between hole influences each other.
The present invention solves its technical problem and adopted the technical scheme that：Based on FDTD Algorithm Analysis ground holes to signal integrity
Property influence method, it is characterized in that, the accuracy and the rapidity of circuit analysis that full-wave electromagnetic is analyzed are combined, and utilize FDTD
Full-wave electromagnetic method is extracted to be switched to analyze high speed interconnection using a variety of circuit analysis methods after frequency variable element.
Further, described method includes step in detail below：
Step S1, it is different reference planes that signal is changed layer punishment by the concrete condition changed according to high speed signal at layer；
Step S2, equivalent π models are set up according to the analysis to signal via structure；
Step S3, is analyzed ground hole using FDTD algorithms；
Step S4, the S parameter and the two-port network of equivalent π models extracted using HFSS simulation softwares, and calculate
The through hole parasitic parameter in the range of 3GHz；
Step S5, com-parison and analysis is carried out to FDTD result of calculations and HFSS simulation results；
Step S6, the S parameter in the case of hole is connect to having, without ground and time domain response continues to compare, and determines ground hole to letter
The improvement result of number integrality.
Further, in step sl, signal is changed layer punishment by the concrete condition changed according to high speed signal at layer：(a)
It is still that same plane, (b) signal change Different Plane after layer with reference to same nature, (c) that signal, which changes the reference layer after layer,
Signal refers to plane of different nature after changing layer.
Further, in step s 2, the analysis process to signal via structure is：For high speed signal, via can be produced
Raw parasitic capacitance and stray inductance, parasitic capacitance mainly slow down data signal rising edge, particularly with multiple signal transition, sternly
The speed of circuit is reduced again；The harm that stray inductance is brought is often bigger, and through hole series inductance can reduce electrical power by-pass electric capacity
Validity, make whole power supply power filter effect variation；Due to through-hole structure very little, when propagation delay of the signal on through hole
Less than edge rate of change 1/10 when, lamped element can be modeled as, i.e., equivalent π models.
Further, in step s3, the detailed process analyzed using FDTD algorithms ground hole includes following step
Suddenly：
(1) spatial mesh size Δ x=Δ y=0.2mm are selected, Δ z=0.1mm, its number of plies is respectively Lx=Ly=Lz=10,
For accurate simulation microstrip line construction, microstrip line all directions use local mesh subdivision, sub- mesh space step-length I.e. electromagnetic field carries out five FDTD iteration in the sub- net region of local mesh subdivision in overall situation FDTD loop iterations every time,
Then the calculating grid sum of the structure is： Nx*Ny*Nz=156 × 172 × 142, and set up computation model：Signals layer and stratum
Thick 1.97mil, signals layer and reference planes dielectric thickness 8mil, the interplanar long 63.22mil of thickness 40mil, via Barrel,
Radius 5mil, Pad radius 12mil, Antipad radius 12mil, it is uniform around telltale hole to place 4 radiuses for 6mil,
Away from the ground hole for 35mil；
(2) to meet the numerical stability conditions, time step is calculated：
In formula,c0For the light velocity in vacuum；
(3) Gaussian pulse is selectedFor driving source, wherein impulse time delay t0For 0, pulse width σ=
128 Δ t=44.8ps, internal resistance SR=50 Ω standard voltage source is set up along Z-direction；
(4) due to relative to one, ground hole via, and this via possesses GND attributes, for the ease of with Maxwell
Equation analysis, it is possible to regard ground hole as a transmission line parallel to high-speed line, with every a quarter on ground wire
The distance of the wavelength of highest signal frequency component sets ground hole along transmission direction, and the ground plane of reference of pcb board is reliably connected one
Rise.
Further, in step s 4, the through hole parasitic parameter parasitic capacitance C obtained in the range of 3GHz is calculatedpadAnd string
Join inductance LBarrel, parasitic capacitance CpadValue with frequency change and low-frequency range capacitance is insecure, series inductance LBarrelValue
With frequency change and low-frequency range inductance value is insecure, empirical calculation is approximate with HFSS results.
Further, in step s 5, analysis is calculated by S parameter and understands via diameter, pad diameter, anti-pad diameter point
Not and S21It is inversely proportional, and and S11It is directly proportional.
Further, in step s 6, if signal refers to connatural Different Plane or of different nature after changing layer
Plane, the problems of Signal Integrity of via is just than more serious, and the noise suppressed measure for both of these case is adjunction respectively
Hole and decoupling capacitance.
Further, in step s 6, the process that the time domain response in the case of hole is compared is connect to having, without ground is：
Give after a same waveform, be respectively compared by FDTD algorithms whether there is impulse response after hole, no matter from the rise time
Or time delay, the performance for having ground hole is superior to no ground hole.
Further, the process that the S parameter in the case of hole is compared is connect to having, without ground is：By running FDTD algorithms
Obtain, in TM ripples wavefront surface rounded centered on via, in S11 parameters, within 3GB frequencies, there is the signal in ground hole
The loss of signal lower than without ground hole is lost；In S return loss parameters, it is similarly obtained and the identical conclusion in S11 parameters.
The beneficial effects of the invention are as follows：
The method that the present invention is influenceed using FDTD algorithms come analysis grounding hole on signal integrity, FDTD is with its direct time-domain
Calculating, wide applicability, the characteristics of save memory space and calculate the versatility for being adapted to parallel computation and calculation procedure, just by
Pay attention to more and more extensive, and be progressively applied to practical problem；In PCB actual track cablings, it can accurately know and connect
Influence of the ground hole to signal integrity, greatly reduce PCB change layer at signal between ground hole influence each other, from tool
Influence of the ground hole to signal integrity is obtained in body numeral.
In whole PCB design, because high speed signal will inevitably carry out changing layer in high speed signal, the present invention passes through
Addition ground hole at layer is changed in high speed signal and greatly improved the comprehensive of whole PCB system, so as to ensure that whole system
Stability, preferably carried out between signal in actual motion high speed transmission state, enhance server system can
By property.
Brief description of the drawings
With reference to Figure of description, the present invention will be described.
Fig. 1 is flow chart of the method for the present invention；
Fig. 2 is signal via structural representation；Wherein, Fig. 2 (a) is that the reference layer that signal is changed after layer is still same flat
The schematic diagram in face, Fig. 2 (b) signals change after layer the Different Plane for referring to same nature, and Fig. 2 (c) signals are changed after layer with reference to not
Connatural plane；Fig. 3 is the schematic equivalent circuit of through-hole structure；
Fig. 4 is via parasitic capacitance CpadWith stray inductance LBarrelSchematic diagram；
Fig. 5 is through-hole structure reflectance factor S11 and transmission coefficient S21 schematic diagram；
Fig. 6 is the time domain response schematic diagram of through-hole structure；
Fig. 7 (a) is the through-hole structure reflectance factor S11 and transmission coefficient S21 schematic diagrames after increase ground hole；
Fig. 7 (b) is to increase the time domain response schematic diagram of the through-hole structure after ground hole.
Embodiment
For the technical characterstic for illustrating this programme can be understood, below by embodiment, and its accompanying drawing is combined, to this hair
It is bright to be described in detail.Following disclosure provides many different embodiments or example is used for realizing the different knots of the present invention
Structure.In order to simplify disclosure of the invention, hereinafter the part and setting of specific examples are described.In addition, the present invention can be with
Repeat reference numerals and/or letter in different examples.This repetition is that for purposes of simplicity and clarity, itself is not indicated
Relation between various embodiments are discussed and/or set.It should be noted that part illustrated in the accompanying drawings is not necessarily to scale
Draw.Present invention omits the description to known assemblies and treatment technology and process to avoid being unnecessarily limiting the present invention.
One kind of the present invention is based on FDTD Algorithm Analysis ground hole influences method to signal integrity, and it divides full-wave electromagnetic
The accuracy of analysis and the rapidity of circuit analysis are combined, and switch to profit after extracting frequency variable element using FDTD full-wave electromagnetics method
High speed interconnection is analyzed with a variety of circuit analysis methods.
As shown in figure 1, the present invention includes following tool based on FDTD Algorithm Analysis ground hole on signal integrity influence method
Body step：
Step S1, it is different reference planes that signal is changed layer punishment by the concrete condition changed according to high speed signal at layer；Root
Signal is changed layer punishment by the concrete condition changed according to high speed signal at layer：(a) reference layer that signal is changed after layer is still same
Plane, (b) signal change after the Different Plane after layer with reference to same nature, (c) signal change layer and refer to plane of different nature.
Step S2, equivalent π models are set up according to the analysis to signal via structure；To the analysis process of signal via structure
For：For high speed signal, via can produce parasitic capacitance and stray inductance, and parasitic capacitance mainly subtracts data signal rising edge
Slowly, particularly with multiple signal transition, the speed of circuit is seriously reduced；The harm that stray inductance is brought is often bigger, through hole
Series inductance can reduce the validity of electrical power by-pass electric capacity, make whole power supply power filter effect variation；Due to through-hole structure very
It is small, when propagation delay of the signal on through hole is less than the 1/10 of edge rate of change, lamped element can be modeled as, i.e., it is equivalent
π models.
Step S3, is analyzed ground hole using FDTD algorithms；Judgement of stability FDTD is a kind of explicit difference algorithm,
It is that temporally stepping computational EM waves should observe certain calculating the changing rule in space, time step and spatial mesh size
Rule, otherwise can occur stability problem.This unstability is not due to accumulation of error generation, and is due to artificial regulation
What the causality that time and space step-length destroys Electromagnetic Wave Propagation was caused.Therefore, in order to be carried out with derived difference equation
Stable calculating, it is necessary to reasonably access time step-length and the relation of spatial mesh size.Ground hole is carried out using FDTD algorithms
The detailed process of analysis comprises the following steps：
(1) spatial mesh size Δ x=Δ y=0.2mm are selected, Δ z=0.1mm, its number of plies is respectively Lx=Ly=Lz=10,
For accurate simulation microstrip line construction, microstrip line all directions use local mesh subdivision, sub- mesh space step-length I.e. electromagnetic field carries out five FDTD iteration in the sub- net region of local mesh subdivision in overall situation FDTD loop iterations every time,
Then the calculating grid sum of the structure is： Nx*Ny*Nz=156 × 172 × 142, and set up computation model：Signals layer and stratum
Thick 1.97mil, signals layer and reference planes dielectric thickness 8mil, the interplanar long 63.22mil of thickness 40mil, via Barrel,
Radius 5mil, Pad radius 12mil, Antipad radius 12mil, it is uniform around telltale hole to place 4 radiuses for 6mil,
Away from the ground hole for 35mil；
(2) to meet the numerical stability conditions, time step is calculated：
In formula,c0For the light velocity in vacuum；
(3) Gaussian pulse is selectedFor driving source, wherein impulse time delay t0For 0, pulse width σ=
128 Δ t=44.8ps, internal resistance SR=50 Ω standard voltage source is set up along Z-direction；
(4) due to relative to one, ground hole via, and this via possesses GND attributes, for the ease of using Maxwell side
Journey analyze, it is possible to regard ground hole as a transmission line parallel to high-speed line, on ground wire with every a quarter most
The distance of the wavelength of high RST frequency component sets ground hole along transmission direction, and the ground plane of reference of pcb board is reliably connected together.
Step S4, the S parameter and the two-port network of equivalent π models extracted using HFSS simulation softwares, and calculate
The through hole parasitic parameter in the range of 3GHz；Calculating obtains the through hole parasitic parameter parasitic capacitance C in the range of 3GHzpadAnd string
Join inductance LBarrel, parasitic capacitance CpadValue with frequency change and low-frequency range capacitance is insecure, series inductance LBarrelValue
With frequency change and low-frequency range inductance value is insecure, empirical calculation is approximate with HFSS results.
Step S5, com-parison and analysis is carried out to FDTD result of calculations and HFSS simulation results；Calculated and analyzed from S parameter
Via diameter, pad diameter, anti-pad diameter respectively with S21It is inversely proportional, and and S11It is directly proportional.
Step S6, the S parameter in the case of hole is connect to having, without ground and time domain response continues to compare, and determines ground hole to letter
The improvement result of number integrality.If signal refers to connatural Different Plane or plane of different nature, via after changing layer
Problems of Signal Integrity just than more serious, the noise suppressed measure for both of these case is plus ground hole and uncoupling respectively
Electric capacity.The process that the time domain response in the case of hole is compared is connect to having, without ground is：After a same waveform is given, pass through
FDTD algorithms are respectively compared the impulse response whetheing there is after ground hole, no matter from rise time or time delay, there is the property in ground hole
No ground hole can be superior to.The process that the S parameter in the case of hole is compared is connect to having, without ground is：By running FDTD algorithms
Obtain, in TM ripples wavefront surface rounded centered on via, in S11 parameters, within 3GB frequencies, there is the signal in ground hole
The loss of signal lower than without ground hole is lost；In S return loss parameters, it is similarly obtained and the identical conclusion in S11 parameters.
The FDTD algorithms that the present invention is used are with its direct time-domain calculating, wide applicability, saving memory space and calculating
The characteristics of versatility of suitable parallel computation and calculation procedure, just paid attention to by more and more extensive, and be progressively applied to actual
Problem.
The accuracy and the rapidity of circuit analysis that it can analyze full-wave electromagnetic combine, and utilize FDTD all-waves
Electromagnetic method is extracted after frequency variable element, switchs to analyze high speed interconnection using a variety of circuit analysis methods.FDTD is a kind of
Explicit difference algorithm, is that temporally stepping computational EM waves are calculating the changing rule in space, time step and spatial mesh size
Certain rule should be observed, otherwise can occur stability problem.
This unstability is not due to accumulation of error generation, and is due to be destroyed with spatial mesh size the artificial stipulated time
What the causality of Electromagnetic Wave Propagation was caused.Therefore, for the calculating stablized with derived difference equation, it is necessary to close
The relation of reason ground access time step-length and spatial mesh size.
As shown in Fig. 2 for high speed signal, via can produce parasitic capacitance and stray inductance, and parasitic capacitance mainly makes number
Word signal rising edge slows down, and particularly with multiple signal transition, seriously reduces the speed of circuit；The harm that stray inductance is brought
Often bigger, through hole series inductance can reduce the validity of electrical power by-pass electric capacity, whole power supply is powered filter effect variation.
As shown in figure 3, due to through-hole structure very little, when propagation delay of the signal on through hole is less than the 1/ of edge rate of change
When 10, lamped element can be modeled as, i.e., equivalent π models.
As shown in figure 4, using the HFSS S parameters extracted and the two-port network of equivalent π models, calculating obtains 3GHz models
Enclose the interior through hole parasitic parameter, CpadValue changes between 0.45--0.48pF with frequency and low-frequency range capacitance is unreliable
, LBarrelChange between 1.25--1.40nH with frequency, empirical calculation is approximate with HFSS results.
In fact parasitic parameter changes with frequency, when frequency band is wider or the signal plane of reference is more complicated, empirical equation
It is just less reliable, therefore utilize the characteristic of FDTD technique study signal vias.
As shown in Figure 5, it is clear that FDTD result of calculations and HFSS simulation results extremely coincide, and Experiential
Spice is to construct VNA to analyze the equivalent π models that empirical equation is calculated using circuit methods, and what is obtained has relatively large deviation, master
If parasitic parameter is approximate caused.Analysis is calculated by further S parameter and understands that via diameter, pad diameter, anti-pad are straight
Footpath respectively with S21It is inversely proportional, and and S11It is directly proportional.
The time domain response of through-hole structure is illustrated in figure 6, it is 50% to give a dutycycle, and the cycle is 2ns, with TrAnd Tf
For 0.1ns pulse signal, in Fig. 6 Input Signal TDR show the through hole caused by discontinuity make high speed signal
Amplitude attenuation in reflection and time delay, particularly signal edge has reached 70mV, and this is due to that the stray inductance of through hole is caused
Excessive reflection noise.
In addition, from the point of view of through hole model, respectively there is a parasitic capacitance stray inductance both sides so that perception mutation is changed into biography
Defeated line.The characteristic impedance of through hole is 48.71 Ω in this example, close to the Ω of microstrip line characteristic impedance 50 at two ends, therefore Output
Signal noises are not very serious (10mV or so), main or time delay (about 32ps).
As shown in fig. 7, after a same waveform is given, the pulse whetheing there is after ground hole is respectively compared by FDTD algorithms
Response, it can be seen that no matter from rise time or time delay, the performance for having ground hole is superior to no ground hole.Pass through operation
It can be obtained after FDTD algorithms, in TM ripples wavefront surface rounded centered on via, in S11 parameters, it can be seen that
Within 3GB frequencies, there is the loss of signal of the loss of signal lower than without ground hole in ground hole.In S return loss parameters, it can equally obtain
Identical conclusion.After ground hole is rationally placed, return loss is substantially reduced in whole broadband, and Insertion Loss is close to 1, actual letter
Number decay is improved to consistent with input signal from 50mV or so, and improves the rise time, shortens signal time delay.In addition, working as
When high speed signal passes through power supply and stratum by through hole, electric current can be typically induced at via, the induced electricity in these vias
Stream will produce Electromagnetic Wave Propagation between metal level, so as to encourage the planar waveguide pattern of parasitism at via.Flat board ripple
Guided mode wavefront surface rounded centered on via, promptly spreads to surrounding, and changes the property of wave impedance completely
Matter, field intensity amplitude decays therewith.Because the size of pcb board is limited, the meeting during medium edge of this plane wave propagation to pcb board
Its transmission is terminated, which part energy is reflected back to form resonance, and another part energy can be radiated in space.
Compared with prior art, the invention has the characteristics that：
1) research of the FDTD algorithms in ground hole, is proposed：FDTD is with its direct time-domain calculating, wide applicability, saving
The characteristics of versatility of memory space and the suitable parallel computation of calculating and calculation procedure, just paid attention to by more and more extensive, and
The present invention is exactly the research applied to ground hole；
2) situation that via parasitic capacitance and stray inductance change with frequency, is proposed, the parasitic electricity of via can be quickly obtained
Hold the concrete numerical value with stray inductance；
3), contrasted by changing FDTD result of calculations and HFSS simulation results at layer in high speed signal, both extremely coincide,
And it can rapidly check S parameter value and time domain response；
4), by changing FDTD result of calculations and HFSS simulation results pair at layer after addition ground hole in high speed signal
Than in the case of based on FDTD, facilitation of the ground hole to signal integrity can be seen with fully aware of.
Simply the preferred embodiment of the present invention described above, for those skilled in the art,
Without departing from the principles of the invention, some improvements and modifications can also be made, these improvements and modifications are also regarded as this hair
Bright protection domain.
Claims (10)
1. method is influenceed to signal integrity based on FDTD Algorithm Analysis ground hole, it is characterized in that, the essence that full-wave electromagnetic is analyzed
True property and the rapidity of circuit analysis are combined, and are extracted and switched to after frequency variable element using a variety of using FDTD full-wave electromagnetics method
Circuit analysis method is analyzed high speed interconnection.
2. according to claim 1 influence method based on FDTD Algorithm Analysis ground hole on signal integrity, it is characterized in that,
Described method includes step in detail below：
Step S1, it is different reference planes that signal is changed layer punishment by the concrete condition changed according to high speed signal at layer；
Step S2, equivalent π models are set up according to the analysis to signal via structure；
Step S3, is analyzed ground hole using FDTD algorithms；
Step S4, the S parameter and the two-port network of equivalent π models extracted using HFSS simulation softwares, and calculate 3GHz models
Enclose the interior through hole parasitic parameter；
Step S5, com-parison and analysis is carried out to FDTD result of calculations and HFSS simulation results；
Step S6, the S parameter in the case of hole is connect to having, without ground and time domain response continues to compare, and determines that ground hole is complete to signal
The improvement result of whole property.
3. according to claim 2 influence method based on FDTD Algorithm Analysis ground hole on signal integrity, it is characterized in that,
In step sl, signal is changed layer punishment by the concrete condition changed according to high speed signal at layer：(a) reference that signal is changed after layer
Layer is still that same plane, (b) signal change Different Plane after layer with reference to same nature, (c) signal and changed after layer with reference to not
Connatural plane.
4. according to claim 3 influence method based on FDTD Algorithm Analysis ground hole on signal integrity, it is characterized in that,
In step s 2, the analysis process to signal via structure is：For high speed signal, via can produce parasitic capacitance and parasitism electricity
Sense, parasitic capacitance mainly slows down data signal rising edge, particularly with multiple signal transition, seriously reduces the speed of circuit
Degree；The harm that stray inductance is brought is often bigger, and through hole series inductance can reduce the validity of electrical power by-pass electric capacity, make whole electricity
Source power filter effect variation；Due to through-hole structure very little, when propagation delay of the signal on through hole is less than edge rate of change
When 1/10, lamped element can be modeled as, i.e., equivalent π models.
5. according to claim 4 influence method based on FDTD Algorithm Analysis ground hole on signal integrity, it is characterized in that,
In step s3, the detailed process analyzed using FDTD algorithms ground hole is comprised the following steps：
(1) spatial mesh size Δ x=Δ y=0.2mm are selected, Δ z=0.1mm, its number of plies is respectively Lx=Ly=Lz=10, it is defined
Microstrip line construction is really simulated, microstrip line all directions use local mesh subdivision, sub- mesh space step-length
I.e. electromagnetic field carries out five FDTD iteration in the sub- net region of local mesh subdivision in overall situation FDTD loop iterations every time, then the structure
Calculating grid sum be：Nx*Ny*Nz=156 × 172 × 142, and set up computation model：Signals layer and ground thickness 1.97mil,
Signals layer and reference planes dielectric thickness 8mil, interplanar thickness 40mil, via Barrel long 63.22mil, radius 5mil,
Pad radiuses 12mil, Antipad radius 12mil, uniform around telltale hole to place 4 radiuses for 6mil, spacing is 35mil's
Ground hole；
(2) to meet the numerical stability conditions, time step is calculated：
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</mrow>
In formula,c0For the light velocity in vacuum；
(3) Gaussian pulse is selectedFor driving source, wherein impulse time delay t0For 0, pulse width σ=128
Δ t=44.8ps, internal resistance SR=50 Ω standard voltage source is set up along Z-direction；
(4) due to relative to one, ground hole via, and this via possesses GND attributes, for the ease of being divided with Maxwell equations
Analysis, it is possible to regard ground hole as a transmission line parallel to high-speed line, with every a quarter highest letter on ground wire
The distance of the wavelength of number frequency component sets ground hole along transmission direction, and the ground plane of reference of pcb board is reliably connected together.
6. according to claim 5 influence method based on FDTD Algorithm Analysis ground hole on signal integrity, it is characterized in that,
In step s 4, the through hole parasitic parameter parasitic capacitance C obtained in the range of 3GHz is calculatedpadWith series inductance LBarrel, it is parasitic
Electric capacity CpadValue with frequency change and low-frequency range capacitance is insecure, series inductance LBarrelValue is changing and low with frequency
Band inductance value is insecure, and empirical calculation is approximate with HFSS results.
7. according to claim 6 influence method based on FDTD Algorithm Analysis ground hole on signal integrity, it is characterized in that,
In step s 5, by S parameter calculate analysis understand via diameter, pad diameter, anti-pad diameter respectively with S21It is inversely proportional, and with
S11It is directly proportional.
8. according to claim 7 influence method based on FDTD Algorithm Analysis ground hole on signal integrity, it is characterized in that,
In step s 6, if signal refers to connatural Different Plane or plane of different nature after changing layer, the signal of via is complete
Whole sex chromosome mosaicism is just than more serious, and the noise suppressed measure for both of these case is plus ground hole and decoupling capacitance respectively.
9. according to claim 8 influence method based on FDTD Algorithm Analysis ground hole on signal integrity, it is characterized in that,
In step s 6, the process that the time domain response in the case of hole is compared is connect to having, without ground is：In a given same waveform
Afterwards, be respectively compared by FDTD algorithms whether there is ground hole after impulse response, no matter from rise time or time delay, there is ground
The performance in hole is superior to no ground hole.
10. according to claim 8 influence method, its feature based on FDTD Algorithm Analysis ground hole on signal integrity
It is to connect the process that the S parameter in the case of hole is compared to having, without ground to be：Obtained by running FDTD algorithms, in TM ripples with mistake
Rounded wavefront surface centered on hole, in S11 parameters, within 3GB frequencies, has the loss of signal in ground hole lower than without ground hole
Loss of signal；In S return loss parameters, it is similarly obtained and the identical conclusion in S11 parameters.
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