CN107272270A - A kind of thin-film transistor array base-plate and liquid crystal display panel - Google Patents
A kind of thin-film transistor array base-plate and liquid crystal display panel Download PDFInfo
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- CN107272270A CN107272270A CN201710695053.3A CN201710695053A CN107272270A CN 107272270 A CN107272270 A CN 107272270A CN 201710695053 A CN201710695053 A CN 201710695053A CN 107272270 A CN107272270 A CN 107272270A
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- thin
- film transistor
- array base
- transistor array
- groove
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1339—Gaskets; Spacers; Sealing of cells
Abstract
The present invention relates to a kind of thin-film transistor array base-plate, including substrate, thin film transistor (TFT), gate insulator, interlayer insulating film and organic planarization layer；Groove is provided with organic planarization layer, the upper surface of groove is concordant with the upper surface of organic planarization layer, the lowermost end of groove is located at the intersection of organic planarization layer and interlayer insulating film, and groove is extended downwardly provided with borehole, and the lowermost end of borehole is located at the intersection of interlayer insulating film and gate insulator；Also include the inner surface of passivation layer, passivation layer covering groove and borehole, and cover organic planarization layer and be not provided with reeded surface.The depth height of groove and borehole the lifting sealant of the present invention, add the contact area of sealant and organic planarization layer, so as to improve the absorption affinity between sealant and thin-film transistor array base-plate, gassing, leakage etc. are abnormal when avoiding the reliability from testing, avoid in follow-up polishing because moving for substrate and caused by polyimides chip cause broken bright spot anomaly, product quality of deducting a percentage.
Description
Technical field
The invention belongs to technical field of liquid crystal display, and in particular to a kind of film crystal for being effectively increased frame glue laminating ability
Pipe array base palte and the liquid crystal display panel with thin-film transistor array base-plate.
Background technology
With continuing to develop for lcd technology, liquid crystal display panel has been widely used in various electronic equipments.Mesh
Before, the designer of various electronic equipments is devoted to the volume-diminished of product, to meet market and consumer demand.So
And, in the case where electronic product overall volume reduces, the display area that market and consumer still desire to product can constantly increase
Plus, therefore, how to ensure that it has had less volume while the situation of display area of liquid crystal display panel is increased
It is the main trend of display panel product.
The structure of TFT-LCD panels is by a color membrane substrates (Color Filter, CF), a thin-film transistor array base-plate
(Thin Film Transistor Array Substrate, TFT Array Substrate) and one it is configured at two substrates
Between liquid crystal layer thin-film transistor array base-plate (Liquid Crystal Layer) constituted, its operation principle is by two
Apply driving voltage on sheet glass substrate to control the rotation of the liquid crystal molecule of liquid crystal layer, the light of backlight module is reflected
Produce picture.It is brilliant that the manufacturing process of existing TFT-LCD thin-film transistor array base-plates panel is broadly divided into leading portion array film
Body pipe array base palte (Array) thin-film transistor array base-plate technique, stage casing are thin into box thin-film transistor array base-plate (Cell)
Film transistor array base palte technique and back segment module group assembling thin-film transistor array base-plate (Module) thin film transistor (TFT) array base
Plate technique.Leading portion array processes are mainly to form thin-film transistor array base-plate substrate and color membrane substrates；Stage casing molding process is born
Thin-film transistor array base-plate and color membrane substrates to group, are injected liquid crystal and are cut to chi in accordance with product by duty therebetween
It is very little；Back segment module group assembling technique is then responsible for carry out groups such as the panel after combination and backlight module, panel drive circuit and housings
Dress.
Tft liquid crystal in low-temperature polysilicon silicon technology LTPS (Low Temperature Poly-silicon)
In display TFT-LCD (Thin Film Transistor-Liquid Crystal Display) process structure, film crystal
Pipe array base palte is stood with carry out group after the completion of color membrane substrates technique, and group cube formula combines for sealant, if sealant combination is not good
Or sealant and thin-film transistor array base-plate adhesive force is not good that thin-film transistor array base-plate can be caused to depart from color membrane substrates,
Cause product abnormal.
As shown in figure 1, in the prior art, thin-film transistor array base-plate 5 includes glass substrate 56, delayed successively from lower to upper
Rush layer 55, gate insulator 54, interlayer insulating film 53, organic planarization layer 52 and the organic planarization layer of passivation layer 51 at present, generally exist
One or more equally spaced grooves 2 are set in organic planarization layer 52, and groove 2 is used to increase sealant 1 and thin film transistor (TFT) battle array
Contact area between row substrate 5, so that increase the stickiness between sealant 1 and thin-film transistor array base-plate 5, still,
Fluted 2 are only set now in organic planarization layer 52, and the edge of thin-film transistor array base-plate 5 is applied for sealant 1
The region (width) of cloth is limited, then the width range of sealant 1 is limited, and the design quantity of groove 2 is also limited so that sealant 1
Contact area with thin-film transistor array base-plate 5 is limited, can still there is thin-film transistor array base-plate 5 and color membrane substrates 6
Be easily separated from or fit not tight phenomenon after combination.
Accordingly, it would be desirable to a kind of thin-film transistor array base-plate and the LCD with thin-film transistor array base-plate
Plate, the laminating ability of sealant after lifting thin-film transistor array base-plate is combined with color membrane substrates, to improve LCD
The problem of thin film transistor (TFT) and colored filter in plate depart from abnormal, improve product quality.
The content of the invention
In order to solve the above problems, the invention provides a kind of thin-film transistor array base-plate and liquid crystal display panel, energy
The sealant laminating ability after thin-film transistor array base-plate and color membrane substrates combination is enough effectively increased, product quality is improved.
According to the invention provides a kind of thin-film transistor array base-plate, including substrate, on the substrate thin is set
Film transistor, the gate insulator being arranged on the thin film transistor (TFT), the layer insulation being arranged on the gate insulator
Layer and the organic planarization layer being arranged on the interlayer insulating film；
Multiple grooves, the upper surface of the groove and the upper surface of the organic planarization layer are provided with the organic planarization layer
Concordantly, the lowermost end of the groove is located at the intersection of the organic planarization layer and interlayer insulating film, and the groove is downward
Extension is provided with borehole, and the lowermost end of the borehole is located at the intersection of the interlayer insulating film and gate insulator；
Also include passivation layer, the passivation layer covers the inner surface of the groove and borehole, and cover described organic flat
Smooth layer is not provided with reeded surface.
In one embodiment, the quantity of the corresponding borehole of each groove is multiple and arranged at equal intervals.
In one embodiment, the trapezoidal shape in the cross section of the groove.
In one embodiment, the combination for being shaped as round platform, circular cone, terrace with edge, pyramid or its shape of the borehole.
In one embodiment, the diameter of the borehole upper surface is less than the width of the groove floor.
In one embodiment, there are a length direction and a width in the edge of the thin-film transistor array base-plate,
And lengthwise dimension is more than width size, the groove is arranged at intervals, extended along its length in the width direction.
The present invention also provides a kind of liquid crystal display panel, including thin-film transistor array base-plate described above, in addition to
Color membrane substrates and the sealant between color membrane substrates and thin-film transistor array base-plate, the sealant are used to bond coloured silk
Ilm substrate and thin-film transistor array base-plate.
In one embodiment, the one side of the sealant is brought into close contact with color membrane substrates, the sealant it is another
Side and the passivation layer of the thin-film transistor array base-plate are brought into close contact.
In one embodiment, the sealant is filled to the groove and borehole and is solidified into the groove and borehole
Shape.
In one embodiment, the edge of the thin-film transistor array base-plate and the surrounding of the color membrane substrates
Edge is sealant dispensing area, and the edge of the color membrane substrates is bonded in the thin film transistor (TFT) array by the sealant
On the corresponding edge of substrate.
Compared with prior art, the advantage of the invention is that：In one layer of the organic planarization layer of thin-film transistor array base-plate
In be provided with groove, and further offer at the interlayer insulating film of organic planarization layer bottom borehole, borehole is along thin film transistor (TFT)
The length direction of array base palte is spaced, the present invention by groove and groove bottom borehole, add sealant with it is thin
Dentation is presented after the contact area of film transistor array base palte, and sealant solidification to fit with thin-film transistor array base-plate, no
Only the depth height of lifting sealant, further improves the absorption affinity between sealant and thin-film transistor array base-plate,
Avoid gassing, leakage etc. when follow-up reliability is tested abnormal, and avoid when follow-up polishing is made because of the phase of substrate
Cause polyimides chip to cause broken bright spot anomaly to mobile, improve the quality of product.
Brief description of the drawings
The invention will be described in more detail below based on embodiments and refering to the accompanying drawings.Wherein：
Fig. 1 shows the cross-sectional view of thin-film transistor array base-plate in the prior art；
Fig. 2 shows the structural representation of liquid crystal display panel of the present invention；
Fig. 3 shows the partial enlarged drawing at B1 in liquid crystal display panel of the present invention；
Fig. 4 shows in Fig. 3 cutaway view Amplified image at b2-b3；
Fig. 5 shows thin-film transistor array base-plate of the present invention and color membrane substrates combination flow chart.
Reference：1- packaging plastics；2- grooves；3- boreholes；4- liquid crystal display panels；5- thin-film transistor array base-plates；
51- passivation layers；52- organic planarization layers；53- interlayer insulating films；54- gate insulators；55- cushions；56- substrates；6- coloured silk films
Substrate.
Identical part uses identical reference in the accompanying drawings.Accompanying drawing is not drawn according to actual ratio.
Embodiment
Below in conjunction with accompanying drawing, the invention will be further described.
The present invention it should be noted that the term being previously mentioned in the present invention such as in " upper surface " " on " refer to close to coloured silk
The direction of ilm substrate；" bottom " that the term mentioned such as " lowermost end " " downward " is defined and " under " all referring to away from color membrane substrates
Direction.
Fig. 2 to Fig. 4 is a kind of structural representation of liquid crystal display panel and thin-film transistor array base-plate of the invention；It is described
Liquid crystal display panel (LCD) includes color membrane substrates 6 and thin-film transistor array base-plate 5, and liquid crystal display panel is surrounded by envelope
The dispensing area of frame glue 1, i.e. the edge of thin-film transistor array base-plate 5 is dispensing area, the edge of color membrane substrates 6
For dispensing area, such thin-film transistor array base-plate 5 and color membrane substrates 6 are fitted by the sealant 1 of sealant dispensing area
Together；In other words, in the edge of thin-film transistor array base-plate 5 and the edge of color membrane substrates 6 provided with envelope frame
Glue 1, so as to form a sealing sky for placing liquid crystal and alignment film between thin-film transistor array base-plate 5 and color membrane substrates 6
Between.
Wherein, the color membrane substrates 6 are a slab construction, and the thin-film transistor array base-plate 5 is stacking multilayer boards
Into composite base plate；The thin-film transistor array base-plate 5 includes substrate 56 successively, it is preferred that substrate 56 uses glass matrix
Plate, is arranged on the cushion 55 on the substrate 56, is arranged on the gate insulator 54 on cushion 55, is arranged on gate insulator
Interlayer insulating film 53 on layer 54, is arranged on the organic planarization layer 52 on the interlayer insulating film 53, and be arranged on organic flat
Passivation layer 51 on smooth layer 52；The passivation layer 51 is that, close to the side of color membrane substrates 6, glass substrate 56 is away from color membrane substrates
6 side.
At least one groove 2, the upper surface of groove 2 are provided with the organic planarization layer 52 of thin-film transistor array base-plate 5
It is connected with the external world, the lowermost end of the groove 2 is located at the organic planarization layer 52 and the intersection of interlayer insulating film 53,
The shape of groove 2 is unrestricted, and the cross section of groove 2 can be arc-shaped, trapezoidal shape or its combination, preferably in this implementation
In example, the trapezoidal structure design in cross section of the groove 2；The groove 2 is extended downwardly provided with borehole 3, and the borehole 3 is set
In the interlayer insulating film 53 of the thin-film transistor array base-plate 5, the lowermost end of the borehole 3 is located at the interlayer insulating film
53 with the intersection of gate insulator 54, the structure of the borehole 3 is also unrestricted, as long as can increase sealant 1 with it is organic flat
The contact area of smooth layer 52, borehole 3 can be it is round table-like or coniform or be terrace with edge or pyramid-shaped or
The combination of four kinds of any wherein two or mores of structure of the above, in the present embodiment, the cross section of the borehole 3 is in round table-like.
Borehole 3 is correspondingly arranged in the groove 2 of organic planarization layer 52, and the side that borehole 3 extends in groove 2 along groove 2
To spread configuration at equal intervals.Sealant 1 increases thin-film transistor array base-plate 5 and color film by the design of groove 2 and borehole 3
Contact area between substrate 6, so, when thin-film transistor array base-plate 5 is fitted with color membrane substrates 6 by sealant 1, envelope
The upside of frame glue 1 and the surface of the color membrane substrates 6 are brought into close contact, the downside of sealant 1 and the thin film transistor (TFT) array base
The passivation layer 51 of plate 5 is brought into close contact, and when the sealant 1 is that passivation layer 51 is fitted, sealant 1 is filled into groove 2 and borehole 3
It is interior, and the structure consistent with the shape of borehole 3 with groove 2 is solidify to form in institute's groove 2 and borehole 3, form trapezoidal in groove 2
Shape, due to the spread configuration at equal intervals of borehole 3 so that sealant 1 finally shows dentation on thin-film transistor array base-plate 5
Structure, so the part contact surface increase by original sealant 1 at the bottom surface of groove 2 of thin film transistor (TFT) organic planarization layer 52,
So as to add the contact area of sealant 1 and thin-film transistor array base-plate 5, sealant 1 and thin film transistor (TFT) battle array are improved
The laminating ability of row substrate 5.
There are a length direction and a width, and length in each edge of the thin-film transistor array base-plate 5
Direction size is more than width size, it is preferred that each edge of the groove 2 along thin-film transistor array base-plate 5
Width is set at equal intervals, the length direction extension at each edge of the groove 2 along thin-film transistor array base-plate 5.
In the present embodiment, there are the two row grooves 2 on every one side of thin-film transistor array base-plate 5.So, ensure that it is thin
On the basis of stickiness between film transistor array base palte 5 and color membrane substrates 6, the width of sealant 1 is also effectively reduced,
The area of liquid crystal display panel is added, the ultra-narrow frame design of liquid crystal display panel is realized.
As shown in Figure 4, the top of the organic planarization layer 52 and groove 2, the inner surface of borehole 3 are by the passivation layer
51 are covered.That is, passivation layer 51 is equal by the side and bottom surface of two sides, the bottom surface of groove 2 and each borehole 3 of groove 2
Covering, the passivation layer 51 of design is in the surface of organic planarization layer 52, groove 2 and borehole 3 to be difficult oxidized state, and prolongs
The corrosion rate of slow thin-film transistor array base-plate 5, so as to extend the service life of thin-film transistor array base-plate 5.
As shown in Figure 5, it is shown that the technological process of thin-film transistor array base-plate 5 and color membrane substrates 6 combination of the present invention, it is thin
Film transistor array base palte 5 and color membrane substrates 6 are in manufacturing process, the general glass substrate 56 using 0.3mm or 0.4mm,
Four sides of thin-film transistor array base-plate 5 respectively organic planarization layer 52 at along thin-film transistor array base-plate 5 per one side
Length direction dig that two parallel and cross sections be trapezoidal shape groove 2, then in the interlayer of thin-film transistor array base-plate 5
What the place of insulating barrier 53 and respective slot 2 was spaced has dug borehole 3, so as to complete the system of thin-film transistor array base-plate 5
Make, then will again be assembled after the completion of thin-film transistor array base-plate 5 and the respective technique of color membrane substrates 6, i.e., by film crystal
The edge of pipe array base palte 5 and the edge of color membrane substrates 6 are fitted (at such as Fig. 2 B1) by sealant 1, if envelope frame
Glue 1 combines not good or sealant 1 and the adhesive force of thin-film transistor array base-plate 5 is not good can cause thin-film transistor array base-plate 5
Disengaging between color membrane substrates 6, causes product abnormal, and whether sealant 1 can closely paste with thin-film transistor array base-plate 5
Close significant to liquid crystal display panel.
From above content, the advantage of the invention is that：In the organic planarization layer 52 of thin-film transistor array base-plate 5
Provided with groove 2, the fitting area of packaging plastic 1 and thin-film transistor array base-plate 5 is added, and extends downwardly and is provided with groove 2
Borehole 3, length direction of the borehole 3 along thin-film transistor array base-plate 5 is spaced, and borehole 3 is in round table-like, by the bottom of groove 2
Area continue increase for borehole 3 whole inner surface, further increase packaging plastic 1 and thin-film transistor array base-plate
5 fitting area, the present invention adds sealant 1 and thin film transistor (TFT) array by groove 2 and the borehole 3 of the bottom of groove 2
The contact area of substrate 5, and the depth height of sealant 1 is lifted, so as to further increase sealant 1 and thin film transistor (TFT)
Absorption affinity between array base palte 5, it is to avoid gassing, leakage etc. are abnormal when follow-up reliability is tested, and avoid rear
Continuous polishing when being made because the relative movement of substrate and caused by polyimides (PI) chip cause broken bright spot anomaly, product of having deducted a percentage
Quality.
Although by reference to preferred embodiment, invention has been described, is not separating the situation of the scope of the present invention
Under, various improvement can be carried out to it and part therein can be replaced with equivalent.Especially, as long as in the absence of structure punching
Prominent, the every technical characteristic being previously mentioned in each embodiment can combine in any way.The invention is not limited in text
Disclosed in specific embodiment, but all technical schemes including falling within the scope of the appended claims.
Claims (10)
1. a kind of thin-film transistor array base-plate, it is characterised in that including substrate, the film crystal of setting on the substrate
The gate insulator that manage, is arranged on the thin film transistor (TFT), the interlayer insulating film being arranged on the gate insulator and
It is arranged on the organic planarization layer on the interlayer insulating film；
Multiple grooves are provided with the organic planarization layer, the upper surface of the groove and the upper surface of the organic planarization layer are put down
Together, the lowermost end of the groove is located at the intersection of the organic planarization layer and interlayer insulating film, and the groove is to downward
Stretch provided with borehole, the lowermost end of the borehole is located at the intersection of the interlayer insulating film and gate insulator；
Also include passivation layer, the passivation layer covers the inner surface of the groove and borehole, and covers the organic planarization layer
It is not provided with reeded surface.
2. thin-film transistor array base-plate according to claim 1, it is characterised in that the number of the corresponding borehole of each groove
Measure to be multiple and arrange at equal intervals.
3. thin-film transistor array base-plate according to claim 1, it is characterised in that the cross section of the groove is trapezoidal
Shape.
4. thin-film transistor array base-plate according to claim 1, it is characterised in that the borehole be shaped as round platform,
Circular cone, terrace with edge, the combination of pyramid or its shape.
5. thin-film transistor array base-plate according to claim 1, it is characterised in that the diameter of the borehole upper surface is small
In the width of the groove floor.
6. the thin-film transistor array base-plate according to any one of claim 1-5, it is characterised in that the film crystal
There are a length direction and a width in the edge of pipe array base palte, and lengthwise dimension is more than width size, described
Groove is arranged at intervals in the width direction, is extended along its length.
7. a kind of liquid crystal display panel, it is characterised in that including the thin film transistor (TFT) array any one of claim 1-8
Substrate, in addition to color membrane substrates and the sealant between color membrane substrates and thin-film transistor array base-plate, the envelope frame
Glue is used to bond color membrane substrates and thin-film transistor array base-plate.
8. liquid crystal display panel according to claim 7, it is characterised in that the one side and color membrane substrates of the sealant
It is brought into close contact, the another side of the sealant and the passivation layer of the thin-film transistor array base-plate are brought into close contact.
9. liquid crystal display panel according to claim 7, it is characterised in that the sealant is filled to the groove and digging
In hole and it is solidified into the shape of the groove and borehole.
10. liquid crystal display panel according to claim 7, it is characterised in that the four of the thin-film transistor array base-plate
The edge of circumferential edges and the color membrane substrates is sealant dispensing area, and the sealant is by the surrounding of the color membrane substrates
Edge is bonded on the corresponding edge of the thin-film transistor array base-plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710695053.3A CN107272270A (en) | 2017-08-15 | 2017-08-15 | A kind of thin-film transistor array base-plate and liquid crystal display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710695053.3A CN107272270A (en) | 2017-08-15 | 2017-08-15 | A kind of thin-film transistor array base-plate and liquid crystal display panel |
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| CN107272270A true CN107272270A (en) | 2017-10-20 |
Family
ID=60077616
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| CN201710695053.3A Pending CN107272270A (en) | 2017-08-15 | 2017-08-15 | A kind of thin-film transistor array base-plate and liquid crystal display panel |
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| CN107632442A (en) * | 2017-10-24 | 2018-01-26 | 业成科技（成都）有限公司 | Display panel and its non-display area structure |
| CN108490662A (en) * | 2018-05-31 | 2018-09-04 | 重庆永信科技有限公司 | LCD panel detector and panel of LCD detection method |
| CN109445203A (en) * | 2018-12-21 | 2019-03-08 | 武汉华星光电技术有限公司 | Promote the display panel of waterproofness |
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| CN110722462A (en) * | 2019-10-24 | 2020-01-24 | 深圳市华星光电技术有限公司 | Grinding wheel for preparing display panel and preparation method of display panel |
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| CN111627951A (en) * | 2020-06-10 | 2020-09-04 | 京东方科技集团股份有限公司 | Display panel, manufacturing method thereof and display device |
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| CN110174803A (en) * | 2019-05-10 | 2019-08-27 | 深圳市华星光电技术有限公司 | Array substrate and preparation method thereof |
| CN110722462A (en) * | 2019-10-24 | 2020-01-24 | 深圳市华星光电技术有限公司 | Grinding wheel for preparing display panel and preparation method of display panel |
| CN111308816A (en) * | 2020-02-28 | 2020-06-19 | 重庆京东方光电科技有限公司 | Organic film, array substrate, display panel and display device |
| CN111650785A (en) * | 2020-06-09 | 2020-09-11 | 武汉华星光电技术有限公司 | Display panel and display device |
| US11886064B2 (en) | 2020-06-09 | 2024-01-30 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Display panel and display device |
| CN111627951A (en) * | 2020-06-10 | 2020-09-04 | 京东方科技集团股份有限公司 | Display panel, manufacturing method thereof and display device |
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Application publication date: 20171020 |