CN107271501A - A kind of numeral output potentiostat - Google Patents

A kind of numeral output potentiostat Download PDF

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Publication number
CN107271501A
CN107271501A CN201710337856.1A CN201710337856A CN107271501A CN 107271501 A CN107271501 A CN 107271501A CN 201710337856 A CN201710337856 A CN 201710337856A CN 107271501 A CN107271501 A CN 107271501A
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current
oxide
metal
semiconductor
module
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刘云涛
熊力嘉
陈敏
徐卓慧
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Huizhou Desay Information Technology Co ltd
Shenzhen Desay Microelectronic Technology Co ltd
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Shenzhen Desay Microelectronic Technology Ltd Co
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis

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Abstract

The present invention relates to a kind of numeral output potentiostat, including cascade successively electrochemical sensor module, current sampling circuit, current integration module, voltage integrating meter module, compare trigger module and counter module;Current sampling circuit includes the first current mirror, the second current mirror and the 3rd current mirror, and the first current mirror is connected between electrochemical sensor module and current integration module;Second current mirror is used for reference current and sample rate current Downward addition;3rd current mirror is used to reference current being reversely superimposed with sample rate current.The output is carried out conversion to be directly quantified as digital quantity by the present invention by obtaining different numerical value to two-way superposition of the reference current on input current, and measurement data is more accurate.2 and it further avoid by way of current mirror digital quantity changed into using ADC in the prior art, with the increase of signal frequency, op-amp gain declines so that the problem of tested electric current degree of accuracy declines.

Description

A kind of numeral output potentiostat
Technical field
The present invention relates to circuit parameter measuring equipment, more particularly to a kind of numeral output potentiostat.
Background technology
The potentiostat of current electrochemical sensor mostly using the discrete element groups such as operational amplifier, resistance, electric capacity into, The potentiostat interference free performance built in this way is poor, is easily influenceed by extraneous environmental noise, and volume is big, limit The precision and integrated level of detecting system are made.
With micro- tool system(MEMS)With the development of microelectric technique, increasing miniature electrochemical is applied to The fields such as bio signal detection, water quality monitoring, corresponding single chip integrated potentiostat is also favored by researcher.Current Single-chip integration potentiostat can be divided into simulation output and numeral output two types.Because the application of sensor will generally be used Computer, microprocessor and some other digital devices, it is therefore necessary to realize the Digital output of sensor, it is so integrated Digital sensor provide not only more functions, and reduce the cost of whole system.The permanent electricity of current numeral output Position instrument is nearly all that sensor current is converted into voltage using trans-impedance amplifier, then passes through follow-up SAR ADC (SAR ADC)Or analog voltage is converted into digital quantity by Sigma-dleta ADC.But the problem of trans-impedance amplifier is present is when letter When number frequency is high, op-amp gain declines and causes input resistance to raise, and this is passed for the higher electrochemistry of output impedance Sensor is unacceptable.Further, since the electric current that MEMS electrochemical sensors are produced is usually nA, or even pA magnitudes, across Needed in impedance amplifier several million or tens resistance, so big resistance needs very big chip area in IC techniques, because This is not suitable for Single-Chip Integration.In addition, voltage is converted the current into, then again by way of ADC carries out analog-to-digital conversion Circuit structure have passed through the conversion of two steps, and circuit complexity is high, and SAR ADC or Sigma-Delta ADC can take very big core Piece area.
The content of the invention
In order to solve the above technical problems, The present invention provides with a kind of numeral output potentiostat.
A kind of numeral output potentiostat, including electrochemical sensor module, current sampling circuit, the electric current cascaded successively Integration module, voltage integrating meter module, compare trigger module and counter module;The current sampling circuit includes the first electric current Mirror, the second current mirror and the 3rd current mirror, first current mirror are connected to the electrochemical sensor module and described Between current integration module;Second current mirror is used for reference current and sample rate current Downward addition;3rd electric current Mirror is used to the reference current being reversely superimposed with the sample rate current;Second current mirror is with the 3rd current mirror by institute State and compare trigger module control.
Further, first current mirror includes the first metal-oxide-semiconductor and the second metal-oxide-semiconductor;First metal-oxide-semiconductor and The grid of two metal-oxide-semiconductors connects the output end of the electrochemical sensor;The source electrode of first metal-oxide-semiconductor and the second metal-oxide-semiconductor connects Connect power supply;The output end of the drain electrode connection electrochemical sensor of first metal-oxide-semiconductor;The drain electrode of second metal-oxide-semiconductor connects Connect the current integration circuit.
For the further materialization of above-mentioned potentiostat, second current mirror includes the 3rd metal-oxide-semiconductor, the 4th metal-oxide-semiconductor And the 5th metal-oxide-semiconductor;Source electrode connection power supply, the 3rd metal-oxide-semiconductor and the 4th of 3rd metal-oxide-semiconductor and the 4th metal-oxide-semiconductor The grid access reference current of metal-oxide-semiconductor;The drain electrode of 3rd metal-oxide-semiconductor connects its grid, the source electrode connection institute of the 5th metal-oxide-semiconductor State drain electrode, grid the connection output end for comparing trigger module, the drain electrode connection current integration module of the 4th metal-oxide-semiconductor.
For the further materialization of above-mentioned potentiostat, the 3rd current mirror includes the 6th metal-oxide-semiconductor, the 7th metal-oxide-semiconductor And the 8th metal-oxide-semiconductor;Grid, drain electrode and the drain electrode of the 7th metal-oxide-semiconductor access reference current of 6th metal-oxide-semiconductor;Described The source ground of six metal-oxide-semiconductors and the 7th metal-oxide-semiconductor;The source electrode of 8th metal-oxide-semiconductor connects the drain electrode of the 7th metal-oxide-semiconductor, grid The pole connection output end for comparing trigger module, the drain electrode connection current integration module.
It is preferred that, the 3rd current mirror also includes the 9th metal-oxide-semiconductor that current mirror is constituted with the 6th metal-oxide-semiconductor;It is described 9th metal-oxide-semiconductor provides current source for second current mirror.
In addition, being provided with electric charge buffer circuit between the current integration module and the voltage integrating meter module;The electric charge Buffer circuit is used to be buffered in the electric charge of the current integration module output in first time period, and by the Partial charge second It is input in period in the voltage integrating meter module.The electric charge buffer circuit includes the first electric capacity, in the first clock signal First switch, second switch under control and the 3rd switch the 4th under the second SECO are switched;The first switch One end connects the output end of the current integration module, and the other end is sequentially connected first electric capacity and second switch is followed by Ground;3rd switch one end ground connection, the other end connects the node between first electric capacity and the first switch;Described Four switch one end connect the voltage integrating meter module, and the other end connects the section between first electric capacity and the second switch Point.
Further, the current integration module is included in that the control of the first clock signal is lower 5th to be switched, at second The 6th switch and the 7th switch, the first amplifier and integrating capacitor under sequential signal control;The switch of institute the 5th is connected to described the Between the inverting input and current sampling circuit of one amplifier;The positive that 6th switch is connected to first amplifier is defeated Enter between end and current sampling circuit;The integrating capacitor and the 7th switch in parallel, and two ends be connected to it is described Between the inverting input and output end of first amplifier;The positive input end grounding of first amplifier.
Further, the voltage integrating meter module includes the second amplifier and the second electric capacity;Second amplifier it is secondary defeated Enter the end connection electric charge buffer circuit;Positive input end grounding, output end connection is described to compare trigger module;Second electricity Appearance is connected between the output end of second amplifier and inverting input.
Further, the trigger module that compares includes first comparator, the second comparator and trigger;Described first The inverting input of the normal phase input end of comparator and the second comparator connects the output end of the voltage integrating meter module;First ratio Inverting input compared with device accesses the set pin that the first comparison voltage VC1, output end connect the trigger;Second comparator Normal phase input end connect the reset pin that the second comparison voltage VC2, output end connect the trigger.
Further, two-phase does not overlap sequential to first clock signal each other with second clock signal.
The beneficial effect played of the present invention includes:
1st, by obtaining different numerical value to two-way superposition of the reference current on input current, and the output is converted So as to directly be quantified as digital quantity, measurement data is more accurate.
2nd, it further avoid by way of current mirror and digital quantity changed into using ADC in the prior art, with signal frequency The increase of rate, op-amp gain declines so that the problem of tested electric current degree of accuracy declines.
Brief description of the drawings
Fig. 1 is the circuit framework schematic diagram in the embodiment of the present invention one.
Fig. 2 be the embodiment of the present invention two in the first current mirror circuit theory diagrams.
Fig. 3 be the embodiment of the present invention two in the second current mirror circuit theory diagrams
Fig. 4 be the embodiment of the present invention two in the 3rd current mirror circuit theory diagrams.
Fig. 5 be the embodiment of the present invention two in circuit sampling circuit circuit theory diagrams.
Fig. 6 be the embodiment of the present invention three in electric charge buffer circuit circuit theory diagrams.
Fig. 7 is the current integration module and the circuit theory diagrams of voltage integrating meter module in the embodiment of the present invention three.
Fig. 8 is the comparison trigger and the circuit theory diagrams of counter module in the embodiment of the present invention three.
Fig. 9 is the circuit theory diagrams of electrochemical sensor module in the present invention.
Wherein, electrochemical sensor module is 10;Current sampling circuit is 20;First current mirror is 21;Second current mirror For 22;3rd current mirror is 23;Current integration module is 30;Voltage integrating meter module is 40;It is 50 to compare trigger module;Trigger It is 60 for 51 counter modules;Electric charge buffer circuit is 70;Input current is Iin;Reference current is Iref;Fixed voltage is Vcell;High resistant node is X;Trigger output end is Q;First clock signal CLK1;Second clock signal CLK2;First compares Voltage VC1;Second comparison voltage VC2.
Embodiment
Presently preferred embodiments of the present invention is described in detail below in conjunction with the accompanying drawings, so that advantages and features of the invention are more Easily it is readily appreciated by one skilled in the art, so as to make apparent define to protection scope of the present invention.
Embodiment 1:
A kind of numeral output potentiostat, as shown in figure 1, including the electrochemical sensor module 10, the current sample that cascade successively Circuit 20, current integration module 30, voltage integrating meter module 40, compare trigger module 50 and counter module 60.
Wherein, electrochemical sensor module 10 detects that environment produces an input current Iin according to it, by current sample electricity Road 20 is acquired, with reference to being integrated fortune by current integration module 30 and voltage integrating meter module 40 after reference current Iref Calculate, compare trigger module 50 and triggering is realized according to the output result after computing and resetted, by 60 pairs of triggerings of counter module Number of times and the time counted, so as to obtain the relation between input current Iin and reference current Iref, final detection Go out the current value that electric electrochemical sensor module 10 is produced.
Specifically, current sampling circuit 20 includes the first current mirror 21, the second current mirror 22 and the 3rd current mirror 23.Should In three current mirrors, the first current mirror 21 is connected between electrochemical sensor module 10 and current integration module 30, is used for By input current Iin image copyings, by the electric current of electrochemical sensor module 10 according to 1:1 scaled mirror is replicated.
Second current mirror 22 is used for reference current Iref and sample rate current Downward addition, when the second current mirror 22 is intervened When, the electric current exported to current integration module 30 for input current Iin and reference current Iref's and.3rd current mirror 23 is used for Reference current Iref is reversely superimposed with sample rate current, when the 3rd current mirror 23 is intervened, exported to current integration module 30 Electric current is input current Iin and reference current Iref difference.It should be noted that the second current mirror 22 is with the 3rd current mirror 23 Alternately intervene, two current mirrors are compared trigger module 50 and controlled, the level height that it is exported according to trigger 51 is come certainly Fixed intervened current mirror.
In terms of current integration and voltage integrating meter, electric charge is provided between current integration module 30 and voltage integrating meter module 40 Buffer circuit 70, for being buffered in the electric charge that current integration module 30 in first time period is exported, and by the Partial charge the It is input in two periods in voltage integrating meter module 40, so that the electric current that accumulated current integration module 30 is exported, electric current is joined Amount is converted into voltage parameter, and voltage supplied integration module 40 is integrated.In initial procedure, voltage integrating meter mould is cached with electric charge The input of circuit 70, makes its output voltage constantly raise, and the voltage that final voltage integrating meter module 40 is exported has exceeded the first ratio During compared with voltage VC1, make to compare the set of trigger module 50, so that reference current Iref and input current Iin stacked system are overturn, Reference current Iref becomes reverse superposition by Downward addition.Because reference current Iref value is greater than input current Iin value, Therefore the voltage that voltage integrating meter module 40 is exported will constantly reduce, when the voltage that voltage integrating meter module 40 is exported compares less than second During voltage VC2, compare the module resets that set out, the stacked system between reference current Iref and input current Iin is overturn again.
Because reference current Iref is constant, and input current Iin size will determine that voltage integrating meter module 40 is exported The pace of change of voltage, so as to influence to compare the state change speed of trigger module 50.Counter module 60 in the process, root It is that can calculate the current value of electrochemical sensor according to the set and number of resets of the comparison trigger module 50 in certain time.
Embodiment 2:
As the further optimization of embodiment 1, the present embodiment and the difference of embodiment 1 are, the present embodiment specifically describes three The tool circuit structure of current mirror, wherein as shown in Fig. 2 the first current mirror 21 includes the first metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2; First metal-oxide-semiconductor M1 and the second metal-oxide-semiconductor M2 grid connect the output end of electrochemical sensor;First metal-oxide-semiconductor M1 and second Metal-oxide-semiconductor M2 source electrode connection power supply;The output end of the drain electrode connection electrochemical sensor of first metal-oxide-semiconductor;Second metal-oxide-semiconductor M2's Drain electrode connection current integration circuit.In first current mirror 21, the current branch where the first metal-oxide-semiconductor M1 is used to gather electrochemistry biography Think after the electric current of sensor, the branch current of the first metal-oxide-semiconductor of Mirroring of tributary M1 where the second metal-oxide-semiconductor M2 as input current Iin Current integration module 30 is inputted.
In terms of referring to Fig. 3, the second current mirror 22, it includes the 3rd metal-oxide-semiconductor M3, the 4th metal-oxide-semiconductor M4 and the 5th metal-oxide-semiconductor M5.3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4 mirror image metal-oxide-semiconductor each other, the 5th metal-oxide-semiconductor M5 are for the MOS as switching function Pipe.3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4 source electrode connects power supply, the 3rd metal-oxide-semiconductor M3 and the 4th metal-oxide-semiconductor M4 grid Access reference current Iref, the 3rd metal-oxide-semiconductor M3 drain electrode connect its grid, complete the collection to reference current Iref.5th metal-oxide-semiconductor M5 source electrode and drain electrode connect the 4th metal-oxide-semiconductor M4 drain electrode and the input of current integration module 30 respectively, form a reference Electric current Iref Downward addition paths.And the output end of trigger module 50 is compared in the 5th metal-oxide-semiconductor M5 grid connection, make the 5th MOS Pipe M5 constitutes a channel selector, and when the 5th metal-oxide-semiconductor M5 is turned on, reference current Iref will be by Downward addition to input current Inside Iin.
Refer to Fig. 4, the aspect of the 3rd current mirror 23, the 3rd current mirror 23 include the 6th metal-oxide-semiconductor M6, the 7th metal-oxide-semiconductor M7 with And the 8th metal-oxide-semiconductor M8.It is similar to the principle of the second current mirror 22, the 6th metal-oxide-semiconductor M6 and the 7th metal-oxide-semiconductor M7 mirror image metal-oxide-semiconductor, each other Eight metal-oxide-semiconductor M8 are then as the metal-oxide-semiconductor of switching function.6th metal-oxide-semiconductor M6 grid, drain electrode and the 7th metal-oxide-semiconductor M7 drain electrode connects Enter reference current Iref, the 6th metal-oxide-semiconductor M6 and the 7th metal-oxide-semiconductor M7 source ground, complete the collection to reference current Iref. 8th metal-oxide-semiconductor M8 source electrode and drain electrode connect the 7th metal-oxide-semiconductor M7 drain electrode and current integration module 30 respectively, form a ginseng Examine electric current Iref and be reversely superimposed path.Grid connects the output end for comparing trigger module 50, the 8th metal-oxide-semiconductor M8 is constituted one and leads to Way switch, when the 8th metal-oxide-semiconductor M8 is turned on, reference current Iref will be reversed inside the input current Iin that is added to.
In order to which the reference current Iref for ensureing introduced can be consistent, as shown in figure 5, can be by the ginseng of the second current mirror 22 The reference current Iref sources for examining electric current Iref sources and the 3rd current mirror 23 merge into one, are specifically to be set again in the 3rd current mirror 23 Put a 9th metal-oxide-semiconductor M9 that current mirror is constituted with the 6th metal-oxide-semiconductor M6;9th metal-oxide-semiconductor M9 access way and the 6th metal-oxide-semiconductor M6 It is identical, equally it is that grid accesses reference current Iref, source ground, and drain and then connect the 3rd metal-oxide-semiconductor M3 drain electrode.For the 3rd Metal-oxide-semiconductor M3 provides reference current Iref.
Embodiment 3:
The present embodiment and the difference of embodiment 1 are, 7 switches will be mentioned in the present embodiment, when 7 switches will be by two kinds Sequential signal is controlled, when clock signal is high level, and the switch of time receiving sequential signal control will be switched on, disconnection on the contrary.And this reality Apply in example, two-phase does not overlap sequential each other by the first clock signal CLK1 and the first clock signal CLK2.And first in embodiment 1 Period corresponding respectively with second time period is that the first clock signal is at the period of high level and the second clock signal In the period of high level.
As shown in fig. 6, electric charge buffer circuit 70 includes the first electric capacity C1, first under the first clock signal CLK1 controls Switch S1, second switch S2 and the 3rd switch S3, the 4th switch S4 under the second SECO;First switch S1 one end connects The output end of current integration module 30 is connect, the other end is sequentially connected after the first electric capacity C1 and second switch S2 and is grounded;3rd opens Close the node between S3 one end ground connection, other end connection the first electric capacity C1 and first switch S1;4th switch S4 one end connection electricity Node between hematocrit sub-module 40, other end connection the first electric capacity C1 and second switch S2.
Fig. 7 is referred to, at the aspect of current integration module 30, it is specifically included in the under the first clock signal CLK1 controls Five switch S5, the 6th switch S6 under the first clock signal CLK2 controls and the 7th switch S7, the first amplifier A1 and integration Electric capacity;The 5th switch S5 be connected between the first amplifier A1 inverting input and current sampling circuit 20;6th switch S6 is connected between the first amplifier A1 normal phase input end and current sampling circuit 20;Integrating capacitor switchs S7 simultaneously with the 7th Join, and two ends are connected between the first amplifier A1 inverting input and output end;First amplifier A1 positive input End ground connection.
When current integration module 30 is started working, the initial voltage of voltage integrating meter module 40 is 0, the output shape of trigger 51 State Q is low level.When the first clock signal CLK1 is high level, the first clock signal CLK2 is low level, current integration module 30 are in current integration state, and input current Iin and reference current Iref's and are integrated, current integration module 30 it is defeated It is in ramp up to go out voltage.When the first clock signal CLK2 is high level, the 6th switch S6 and the 7th switch S7 closures, the 5th Switch S5 to disconnect, current integration module 30 is in reset state, the output end of amplifier is connected with inverting input, inverting input Voltage and output end voltage follow normal phase input end voltage, and due to positive input end grounding, therefore the first amplifier A1 completes reset; When the first clock signal CLK1 is high level, the 5th switch S5 closures, the 6th switch S6 and the 7th switch S7 disconnect, electric current product Sub-module 30 is in integrating state, and input current Iin charges to integrating capacitor CI.The first clock signal CLK1 from height to At the time of low saltus step, the output voltage of current integration module 30 is:
Wherein fs is the first clock signal CLK1 frequency.As can be seen from the above equation, output voltage and input current Iin and reference Electric current Iref and be directly proportional, be inversely proportional with integrating capacitor CI and the first clock signal CLK1 clock frequency fs.It is small when detecting During electric current, less integrating capacitor and slower clock frequency can be used, so as to save silicon area.
Fig. 7 is referred to, at the aspect of voltage integrating meter module 40, including voltage integrating meter module 40 includes the second amplifier A2 and the Two electric capacity C2;Second amplifier A2 auxiliary input end connection electric charge buffer circuit 70;Positive input end grounding, output end connection is compared Trigger module 50;Second electric capacity C2 is connected between the second amplifier A2 output end and inverting input.
As shown in figure 8, comparing trigger module 50 includes first comparator COMP1, the second comparator COMP2 and trigger 51;First comparator COMP1 normal phase input end and the second comparator COMP2 inverting input connection voltage integrating meter module 40 Output end;First comparator COMP1 inverting input accesses the first comparison voltage VC1, output end and connects trigger 51 Set pin;Second comparator COMP2 normal phase input end connects the second comparison voltage VC2, output end and connects trigger 51 Reset pin.
In current integration module 30 to input current Iin's and reference current Iref and during being integrated, first opens S1 and second switch S2 conductings are closed, the magnitude of voltage of the current integration module 30 is also sampled by the first electric capacity C1.When the first sequential letter Number CLK1 is changed into low level, when the first clock signal CLK2 is changed into high level, and the output of current integration module 30 is changed into common mode electricity Pressure.Now, switch first switch S1 and second switch S2 disconnects, the 3rd switch S3 and the 4th switch S4 conductings, when sampling disconnects Carve, be accumulated in the electric charge transfer on the first electric capacity C1 to the second electric capacity C2, the output integral voltage of voltage integrating meter module 40 passes through After N1 cycle, the output of voltage integrating meter module 40 can be expressed as:
Wherein t represents half of clock cycle, after N1 cycle, when the voltage of voltage integrating meter module 40 is more than the first comparison voltage During VC1, first comparator COMP1 output high level makes the set of trigger 51, the output end Q of trigger 51 is changed into from low level High level.And then the 5th metal-oxide-semiconductor M5 disconnect, the 8th metal-oxide-semiconductor M8 conducting, current integration module 30 input electric current by input current The electric current that Iin is reversely superimposed after reference current Iref gained is constituted, therefore after N2 cycle, voltage integrating meter module 40 it is defeated Go out to be changed into
Because input current Iin is less than reference current Iref, the output voltage of voltage integrating meter module 40 is not in the process It is disconnected to reduce, when the output voltage of voltage integrating meter module 40 is less than the second comparator COMP2 the second comparison voltage VC2, trigger 51 reset signal input RESET is changed into high level, and the output end Q of trigger 51 is changed into low level, repeats above procedure, triggering The output end Q of device 51 high level is calculated by follow-up counter module 60, the value reaction be exactly input current Iin and Reference current Iref relation.
Embodiment 4:
Electrochemical sensor module 10 in the present embodiment is as shown in figure 9, what the electrochemical sensor 11 in the present embodiment was used It is three-electrode electrochemical sensor, wherein WE extremely working electrode, RE extremely reference electrode, CE extremely auxiliary electrode.In addition also Including the 3rd amplifier A3 and the tenth metal-oxide-semiconductor M10, two parts constitute the control unit of potentiostat.Wherein electrochemical sensing The WE poles ground connection of device 11, RE poles are connected with the 3rd amplifier A3 inverting input, and normal phase input end is connected voltage Vcell, Output is connected on the tenth metal-oxide-semiconductor M10 of N ditches grid.Tenth metal-oxide-semiconductor M10 source electrode is extremely connected with CE.At the 3rd amplifier A3 In profound and negative feedbck state, the potential that RE electrode potentials are equal between Vcell, therefore RE poles and WE poles keeps constant, and steady state value is Vcell.When measuring solution concentration, chemically reacted on WE poles surface, generation and the electric current that concentration is in certain relation, and RE The inverting input for cmos operational amplifier of pole connection, the end points impedance is high, therefore the electric current that WE poles are produced will not flow Through RE poles, the electric current of generation is forced all to flow through CE poles.And WE poles connect truly so that the electric current of generation is to noise and interference It is insensitive.In addition, the output end of the 3rd amplifier A3 in the present embodiment, which does not have, is directly connected on CE poles, but pass through the tenth Metal-oxide-semiconductor M10 reconnects CE poles, therefore current output terminal is become for high resistant nodes X by low-resistance node CE poles.
Embodiments of the present invention are explained in detail above in conjunction with accompanying drawing, but the present invention is not limited to above-mentioned implementation Mode, can also be on the premise of present inventive concept not be departed from the knowledge that those of ordinary skill in the art possess Various changes can be made.

Claims (11)

1. a kind of numeral output potentiostat, it is characterised in that including electrochemical sensor module, the current sample cascaded successively Circuit, current integration module, voltage integrating meter module, compare trigger module and counter module;The current sampling circuit bag The first current mirror, the second current mirror and the 3rd current mirror are included, first current mirror is connected to the electrochemical sensor mould Between block and the current integration module;Second current mirror is used for reference current and sample rate current Downward addition;Institute Stating the 3rd current mirror is used to the reference current being reversely superimposed with the sample rate current;Second current mirror and the described 3rd Current mirror is compared trigger module control by described.
2. numeral output potentiostat according to claim 1, it is characterised in that first current mirror includes first Metal-oxide-semiconductor and the second metal-oxide-semiconductor;The grid of first metal-oxide-semiconductor and the second metal-oxide-semiconductor connects the output of the electrochemical sensor End;The source electrode connection power supply of first metal-oxide-semiconductor and the second metal-oxide-semiconductor;The drain electrode of first metal-oxide-semiconductor connects the electrification Learn the output end of sensor;The drain electrode of second metal-oxide-semiconductor connects the current integration circuit.
3. numeral output potentiostat according to claim 1, it is characterised in that second current mirror includes the 3rd Metal-oxide-semiconductor, the 4th metal-oxide-semiconductor and the 5th metal-oxide-semiconductor;The source electrode connection power supply of 3rd metal-oxide-semiconductor and the 4th metal-oxide-semiconductor, described the The grid access reference current of three metal-oxide-semiconductors and the 4th metal-oxide-semiconductor;The drain electrode of 3rd metal-oxide-semiconductor connects its grid, the described 5th The source electrode of metal-oxide-semiconductor connects the drain electrode of the 4th metal-oxide-semiconductor, the grid connection output end for comparing trigger module, drain electrode connection The current integration module.
4. numeral output potentiostat according to claim 1, it is characterised in that the 3rd current mirror includes the 6th Metal-oxide-semiconductor, the 7th metal-oxide-semiconductor and the 8th metal-oxide-semiconductor;Grid, drain electrode and the drain electrode of the 7th metal-oxide-semiconductor access of 6th metal-oxide-semiconductor Reference current;The source ground of 6th metal-oxide-semiconductor and the 7th metal-oxide-semiconductor;The source electrode connection the described 7th of 8th metal-oxide-semiconductor Drain electrode, grid the connection output end for comparing trigger module, the drain electrode connection current integration module of metal-oxide-semiconductor.
5. numeral output potentiostat according to claim 4, it is characterised in that the 3rd current mirror also includes and institute State the 9th metal-oxide-semiconductor that the 6th metal-oxide-semiconductor constitutes current mirror;9th metal-oxide-semiconductor provides current source for second current mirror.
6. numeral output potentiostat according to claim 1, it is characterised in that the current integration module and the electricity Electric charge buffer circuit is provided between hematocrit sub-module;The electric charge buffer circuit is used to be buffered in the electric current in first time period The electric charge of integration module output, and the Partial charge is input in second time period in the voltage integrating meter module.
7. numeral output potentiostat according to claim 6, it is characterised in that the electric charge buffer circuit includes first Electric capacity, the first switch under the control of the first clock signal, second switch and the 3rd switch the under the second SECO Four switches;Described first switch one end connects the output end of the current integration module, and the other end is sequentially connected first electricity It is grounded after appearance and second switch;3rd switch one end ground connection, the other end connects first electric capacity and opened with described first Node between pass;Described 4th switch one end connects the voltage integrating meter module, and the other end connects first electric capacity and institute State the node between second switch.
8. the numeral output potentiostat according to claim 6 or 7, it is characterised in that the current integration module includes The 5th switch under the control of the first clock signal, the 6th switch under the control of the second clock signal and the 7th switch, first Amplifier and integrating capacitor;The 5th switch be connected to first amplifier inverting input and current sampling circuit it Between;6th switch is connected between the normal phase input end of first amplifier and current sampling circuit;The integration electricity Hold and the 7th switch in parallel, and two ends are connected between the inverting input of first amplifier and output end; The positive input end grounding of first amplifier.
9. the numeral output potentiostat according to claim 6 or 7, it is characterised in that the voltage integrating meter module includes Second amplifier and the second electric capacity;The auxiliary input end of second amplifier connects the electric charge buffer circuit;Normal phase input end connects Ground, output end connection is described to compare trigger module;Second capacitance connection is in the output end of second amplifier and anti-phase Between input.
10. numeral output potentiostat according to claim 1, it is characterised in that the trigger module that compares includes the One comparator, the second comparator and trigger;The normal phase input end of the first comparator and the second comparator it is anti-phase defeated Enter the output end of the end connection voltage integrating meter module;The inverting input of first comparator accesses the first comparison voltage VC1, defeated Go out the set pin of the end connection trigger;The normal phase input end of second comparator connects the second comparison voltage VC2, output end Connect the reset pin of the trigger.
11. the numeral output potentiostat according to claim 6 or 7, it is characterised in that first clock signal and institute Stating the second clock signal, two-phase does not overlap sequential each other.
CN201710337856.1A 2017-05-15 2017-05-15 A kind of numeral output potentiostat Withdrawn CN107271501A (en)

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