CN107247646B

CN107247646B - Method capable of accurately positioning FW version of VR chip of mainboard and importing process

Info

Publication number: CN107247646B
Application number: CN201710381977.6A
Authority: CN
Inventors: 罗嗣恒
Original assignee: Suzhou Inspur Intelligent Technology Co Ltd
Current assignee: Suzhou Inspur Intelligent Technology Co Ltd
Priority date: 2017-05-26
Filing date: 2017-05-26
Publication date: 2020-07-31
Anticipated expiration: 2037-05-26
Also published as: CN107247646A

Abstract

The invention discloses a method for accurately positioning FW version of VR chip of mainboard, which carries out three-dimensional coding on FW version information of VR chip, wherein the three-dimensional information consists of PCBA number, VR chip serial number and FW version number of the mainboard. In the Infineon VR chip, two 4-bit user-defined registers a and B are reserved. The PCBA number of the mainboard is stored in a register A of the chip, the bit number of the VR chip on the mainboard is stored in the first 3 bits of a register B, the FW version number is stored in the last bit of the register B of the chip, and the data in the registers A and B jointly form the version information of the chip FW. The invention can avoid: when mainboard with different PCBA numbers are produced in the same generation factory, after the VR chip with optimized FW is introduced, the corresponding position of the chip is easy to be mistaken in the stage of production line VR chip loading. The problem of missed brushing or chip monomer can be conveniently and accurately positioned, the phenomenon that the optimized VR FW cannot be burnt and finally flows to a client side to cause quality problems is prevented. Thereby improving the product quality.

Description

Method capable of accurately positioning FW version of VR chip of mainboard and importing process

Technical Field

The invention relates to the field of server mainboard manufacturing and inspection.

Background

In the production process of the foundry, the server motherboard needs to burn VR FW (Voltage Regulation Firmware, a software program solidified in the Voltage conversion main chip) into the motherboard. And burning the VR FW mainboard, and finally outputting the mainboard to an inspection department for inspection so as to put the mainboard into a qualified warehouse for complete machine production of an assembly production line. Once the mainboard is neglected to brush in the factory of making a substitute for the factory, will cause bad board to stay the complete machine and assemble the production line, finally flow to the customer end, leave the hidden danger for product quality.

Generally, a VR chip has an initial FW after being shipped from a factory, and a memory cell defined by a user is reserved in a memory matrix of the chip. The memory cell of the cell identifier M shown in fig. 3 has the following address: 0x 67. Then, the information of the memory location corresponding to the address can be read out through a software tool, that is: version information of the current VR FW (assuming that the version is 0 at this time).

When the engineer makes an optimal adjustment to the VR line, there is an optimized FW document. Such as: the value corresponding to the address 0x67 in the document is modified to 1 (assuming that the version number at this time is 1, the FW latest version).

In the process of burning the VR chip FW into the VR chip, the address can be judged by a software tool to be: the content of the 0x67 storage unit is either a0 or 1 version. If the version is 0, the VR chip FW of the mainboard is missed; if the version 1 is adopted, the fact that the VR chip FW of the mainboard has no missed brushing (is the latest version) is indicated.

When the same VR chip is used on different PCBA numbered motherboards, if the following problems occur in VR FW management and control in factory generations: (for example, when the same VR chip (VR FW is different) is confused by the motherboard with the number 812 and the motherboard with the number 810), if two different numbered motherboards are used, the positions corresponding to a certain memory VR chip are: u70, the optimized version numbers are all defined as: 1. then the version definition method using two-dimensional coding cannot distinguish: different mainboard VR chip materials. However, when different PCBA motherboards are produced in a factory (when the same VR chip is used for these motherboards), if the two-dimensional code is used to define the version of VR FW, there are: the VRFW of which PCBA motherboard is cannot be accurately distinguished by the version information of the VR FW. When different PCBA motherboards are produced in a factory (when the same VR chip is used for these motherboards), if the two-dimensional code is used to define the version of VR FW, there are: the VR FW of which PCBA motherboard is cannot be accurately distinguished by the version information of the VR FW.

In addition, for the VR FW problem, a DOS environment is usually adopted to run a batch processing command and check the mainboard which misses the VR FW. The method requires a power supply, a CPU and a memory to be configured on the mainboard. The method comprises the steps of firstly starting the computer and entering a DOS interface, and then running batch processing in a command line to judge the version of the VR FW of the mainboard. The inspection method needs to be started to enter the DOS environment, the time required in the process is long, when the number of the mainboards to be inspected is large, the time of a quality inspector is occupied, and the inspection efficiency is low.

Disclosure of Invention

The invention aims to solve the technical problem of accurately positioning the FW version of a VR chip of a mainboard. Therefore, the invention provides a method for accurately positioning FW version of VR chip of mainboard, which has the advantages of conveniently and accurately positioning missed brushing or failing to burn correct chip due to chip monomer problem, preventing chip from being mistaken, and the like.

In order to achieve the above object, the present invention adopts the following technical solutions.

A method for accurately positioning FW version of VR chip of mainboard is disclosed, which carries out three-dimensional coding on FW version information of VR chip, wherein the three-dimensional information is composed of PCBA number, VR chip serial number and FW version number of mainboard. It is possible to avoid: when mainboard with different PCBA numbers are produced in the same generation factory, after the VR chip with optimized FW is introduced, the corresponding position of the chip is easy to be mistaken in the stage of production line VR chip loading.

Preferably, in the Infineon VR chip, two 4-bit user-defined registers a and B are reserved. The PCBA number of the mainboard is stored in a register A of the chip, the bit number of the VR chip on the mainboard is stored in the first 3 bits of a register B, the FW version number is stored in the last bit of the register B of the chip, and the data in the registers A and B jointly form the version information of the chip FW.

The flow of importing the optimized VR FW by the mainboard VR chip on a production line is that the VR FW optimized by the mainboard is defined according to the method of the text and then is stored as a single document (each VR chip corresponds to one VR FW document); burning VR FW corresponding to the chip bit number and the version number under the online; carrying out PCBA on the corresponding burned chip on the mainboard according to the VR chip bit number on the mainboard; after the mainboard is subjected to feeding and welding, starting up and powering on, and checking the version information of each VR chip on the mainboard by adopting a BMC interface; and after the version is confirmed to pass, carrying out related function test on the mainboard.

The invention has the beneficial effects that: the method proposed herein can solve the following problems:

1) and the FW version information of the VR chip is subjected to three-dimensional coding in the FW version of the VR chip. The three-dimensional information consists of PCBA numbers, VR chip numbers and version numbers of the mainboard. It is possible to avoid: when mainboard with different PCBA numbers are produced in the same generation factory, after the VR chip with optimized FW is introduced, the corresponding position of the chip is easy to be mistaken in the stage of production line VR chip loading.

2) The main board PCBA code applied by the chip, the bit number of the chip on the main board and the version number of the current FW of the chip can be accurately positioned by checking the numerical values of the VR chip registers A and B, the VR FW can be conveniently and accurately positioned and missed to be brushed or optimized in a burning mode due to the problem of a single chip, and finally the VR FW flows to a client side, so that the quality problem is caused, and the product quality is improved.

Drawings

Fig. 1 is a schematic diagram of a multi-VR chip motherboard distribution.

Fig. 2 is a flowchart of importing optimized VR FW from a motherboard VR chip on a production line.

FIG. 3 is a diagram of a user-customized memory cell in the prior art.

FIG. 4 is a schematic diagram of a user-defined storage unit in this embodiment.

Fig. 5 is a schematic view of the version definition of the present embodiment.

In the figure, 0.CPU0 VR

chip serial number

0, 1. CPU1 VR chip serial number 1, 2.DDR AB VR chip serial number 2, 3.DDR CD VR

chip serial number

3, 4. DDR EF VR

chip serial number

4, 5. DDR GH VR chip serial number 5, A. are user-defined registers A, B. is user-defined register B.

Detailed Description

The invention is further described with reference to the following figures and examples.

As shown in fig. 1, the distribution of a general server motherboard VR chip on the motherboard is shown schematically. Comprises the following steps: 2 sets of CPU VR and 4 sets of memory VR. Serial number of VR chip, as shown in fig. 1: the CPU0 VR \ CPU1 VR \ DDR AB VR \ DDR CD VR \ DDR EFVR \ DDR GH VR are sequentially as follows: 0\1\2\3\4\ 5.

In the Infineon VR chip, two 4-bit user-defined registers a and B are reserved for the user. And forming the information elements of 3 dimensions, namely the PCBA number of the mainboard, the bit number of the VR chip and the FW version number, into the complete version information of the FW of one chip. The PCBA number of the mainboard is stored in a register A of the chip, the bit number of the VR chip on the mainboard is stored in the first 3 bits of a register B, the FW version number is stored in the last bit of the register B of the chip, and the data in the registers A and B jointly form the version information of the chip FW.

As shown in fig. 2, a process of importing optimized VR FW for a server motherboard VR chip is performed in a production line.

Firstly, defining VR FW version information of mainboard optimization according to a method of the text, and storing the VR FW version information as a single document (each VR chip corresponds to one VR FW document); then, burning VR FW corresponding to the chip bit number and the version number on line; secondly, PCBA is carried out on the corresponding burned chip on the mainboard according to the VR chip bit number on the mainboard; after the mainboard is subjected to feeding and welding, starting up and powering on, and checking the version information of each VR chip on the mainboard by adopting a BMC interface; and finally, after the version is confirmed to pass, continuously completing the test of the related functions of the mainboard.

In fig. 4:

memory space address 0x67 cell-user custom register a is used to define: serial number of VR chip;

memory space address 0x69 cell-user custom register B is used to define: VR chip FW version number.

For example:

in fig. 1, the serial number of the DDR EF VR chip on the motherboard is: 4, the version number of the optimized VR FW is as follows: 1.

then: the version information of the VR chip is as follows: 41. during loading, a label can be pasted on the chip: 41, and is placed at the corresponding position of the main board. Namely: the situation that the position of the DDR EF VR chip is wrong with the position of the DDR AB or DDR CD or DDR GH is avoided.

And the VR FW version information of each serial number chip can be visually checked by starting the computer to enter a BMC interface.

As shown in fig. 5, a diagram is defined for the modified version. The user-defined registers A and B are each composed of 4-bit 16-ary numbers.

The 4 bits in register A (A3A 2A1A 0) are used to indicate the PCBA number for the motherboard. In general, the motherboard PCBA is encoded as follows: YZMB-XXXXX-101. Wherein: XXXXXXX represents the number of PCBA (X: 0, 1, 2.., 9). Such as: the PCBA coding of the mainboard is as follows: YZMB-00812-101, the PCBA number is: 0812.

the first 3 bits in register B (B3B 2B 1) are used to represent the VR chip bit number on the motherboard. Such as: if the chip position of the motherboard is U71, the corresponding bit numbers are: 071.

the last 1 bit (B0) in register B is used to indicate the version number corresponding to VR chip FW on the motherboard. Such as: VR FW was encoded by the original version: upgrade to version 0: 1, the version number corresponding thereto is: 1

Therefore, the complete version information corresponding to the VR chip U71 on the motherboard YZMB-00812-: 081207101

Later, the values in registers A and B may be read by the BMC and displayed on the BMC Web interface. The display content comprises: the PCBA code of the mainboard, the VR chip position and the latest FW version of the VR chip.

Referring now to fig. 1, 4 and 5, encoded in a motherboard PCBA: YZMB-00812-101 is taken as an example. The position sequence number of 6 VR chips on the mainboard does in proper order: u70\ U71\ U72\ U73\ U74\ U75. The latest version of the main board VR FW is: 1. then: the method comprises the following implementation steps:

1) and taking the server mainboard, testing and optimizing the server mainboard to generate optimized VR FW1 corresponding to the VR chip (the initial version number is: 0, the optimized version number is: 1) (ii) a

2) Confirming the PCBA number of the mainboard, the position serial number of the VR chip and the final version serial number information of the VR FW according to the figure 5;

3) and aiming at the VR chip U70, setting the address in the corresponding VR FW document as: the value in register a of 0x67 is set to: 00812; and setting the address in the VR FW document as: the value in register B of 0x69 is set to: 0701, and saving a VRFW document corresponding to U70;

4) and modifying the numerical values of the register A of 0x67 and the register B of 0x69 in the VR FW document according to the method of the step 3), storing the VR chip, and storing the VR FW document corresponding to U71\ U72\ U73\ U74\ U75.

6) Labeling the VR chips with the corresponding position serial numbers, and displaying the complete version information of the chips;

7) in the PCBA stage, corresponding to the position of the mainboard chip according to version information on the tag of the VR chip, and loading the piece;

8) and after the PCBA of the mainboard is completed, starting the mainboard to enter a BMC web interface, and checking the version information of all VR chips on the mainboard.

9) And finally, continuously completing the function test related to the mainboard after the VR chip version information is confirmed.

According to the steps, the implementation of the VR FW burning hard fool-proof definition method can be completed.

Although the embodiments of the present invention have been described with reference to the accompanying drawings, it is not intended to limit the scope of the present invention, and it should be understood by those skilled in the art that various modifications and variations can be made without inventive efforts by those skilled in the art based on the technical solution of the present invention.

Claims

1. The method capable of accurately positioning FW version of VR chip of mainboard is characterized in that FW version information of VR chip is three-dimensionally encoded, and the three-dimensional code is composed of PCBA number, VR chip number and FW version number of mainboard;

reserving two 4-bit user-defined registers A and B in a VR chip; the PCBA number of the mainboard is stored in a register A of the chip, the bit number of the VR chip on the mainboard is stored in the first 3 bits of a register B, the FW version number is stored in the last bit of the register B of the chip, and the data in the registers A and B jointly form the version information of the chip FW.

2. A method for importing and optimizing VR FW (virtual reality) by a mainboard VR chip on a production line is characterized in that the VR FW optimized by the mainboard is defined according to the method of claim 1 and then is stored as a single document; burning VR FW corresponding to the chip bit number and the version number under the online; carrying out PCBA on the corresponding burned chip on the mainboard according to the VR chip bit number on the mainboard; after the mainboard is subjected to feeding and welding, starting up and powering on, and checking the version information of each VR chip on the mainboard by adopting a BMC interface; and after the version is confirmed to pass, carrying out related function test on the mainboard.