CN107241529A

CN107241529A - A kind of TTL video output systems and its method

Info

Publication number: CN107241529A
Application number: CN201710569664.3A
Authority: CN
Inventors: 王彬彬
Original assignee: Shanghai Sail Acoustic Image Science And Technology Ltd
Current assignee: Shanghai Sail Acoustic Image Science And Technology Ltd
Priority date: 2017-07-13
Filing date: 2017-07-13
Publication date: 2017-10-10
Anticipated expiration: 2037-07-13
Also published as: CN107241529B

Abstract

The invention discloses a kind of TTL video output systems, first clock signal, the first Clock management module and described image output control module are sequentially connected, picture signal of the described image output control module output not comprising clock, the second clock signal connects the second clock management module, the second clock management module output image clock.The outside PLL chips of the present invention are controlled by FPGA control systems, outside PLL chips can export two clocks and be sent to FPGA, the two clocks are with frequency, but purposes is different, one of them by PLL0 enter FPGA control systems inside be connected into Clock management module carry out go deflection and increase be fanned out to, to improve clock quality, improved clock is sent to image control；Another clock PLL1 is then sent in Clock management module, to improve signal quality, and the clock then is sent into outside, used for lighting.

Description

A kind of TTL video output systems and its method

Technical field

The invention belongs to liquid crystal technology field, more specifically, more particularly to a kind of TTL video output systems.Meanwhile, this Invention further relates to a kind of TTL picture output methods.

Background technology

The liquid of liquid crystal display module (Liquid Crystal Display Module, hereinafter referred to as module) and its correlation The use of crystal display device (hereinafter referred to as equipment) is very universal, as well as TTL (Transistor Transistor Logic, transistor-transistor logic level) signal stabilization is reliable, passing speed, high, power consumption is relatively low, and many modules and equipment are all led to Cross using the signal as the display interface for receiving video image.

Produced in module and its equipment, debugged, videograph process when need to turn by video signal source or video Fishplate bar (abbreviation video source below) produces the source that TTL vision signals provide module displays signal to it, thereby, it is ensured that video Vision signal correctness and reliability that source is produced are the premises for ensureing module displays.

In terms of TTL transmission of video, the line and through hole that passed through on encapsulation bonding line, pcb board due to internal signal, It could be connected with other chips, if using Transistor-Transistor Logic level as output interface, various parasitic parameters can cause the upper of data The severe exacerbations such as the simultaneously match between liter/fall time and multichannel data.Therefore, it is general that video is used as using Transistor-Transistor Logic level Transmission, speed is low, the figure distortion pointed out.

The content of the invention

The invention aims to solve shortcoming present in prior art, and a kind of TTL video frequency outputs system proposed System and its method, in the case of signal is distortionless, lift TTL transmission of video effects.

To achieve the above object, the present invention provides following technical scheme：

A kind of TTL video output systems, including PLL chips and FPGA control systems, the PLL chips are included with the first of frequency Clock signal and second clock signal, the FPGA control systems include the first Clock management module, second clock management module and Image output control module, first clock signal, the first Clock management module and described image output control module It is sequentially connected, picture signal of the described image output control module output not comprising clock, the second clock signal connects institute State second clock management module, the second clock management module output image clock.

The present invention also provides a kind of TTL picture output methods, comprises the following steps：

S1, host computer issue play parameter and played after control, when controlling outside PLL chips output two-way with frequency with phase Zhong Zhong, wherein PLL0 are used for the output for controlling the data and row field sync signal of image；PLL1 is used for the clock control of lighting； PLL1 and PLL0 is that with frequency in-phase signal, therefore the sequential of output in source is synchronous signal during due to starting；

If S2, lighting are abnormal, phase controlling parameter is sent under host computer, the clock phase of output image has been adjusted, this The clock and data of Shi Yuanduan outputs are asynchronous, and due to the phase offset produced when signal is by system, are output to up to eventually End can reach lighting effect.

It is preferred that, in S2, it is adjusted by observing image state.

The technique effect and advantage of the present invention：TTL video output systems and its method that the present invention is provided, its outside PLL Chip is controlled by FPGA control systems, and outside PLL chips can export two clocks and be sent to FPGA, and the two clocks are same Frequently, but purposes is different, one of them is entered by PLL0 is connected into Clock management module and carries out going deflection inside FPGA control systems And increase is fanned out to, and to improve clock quality, improved clock is sent into image control；Another clock PLL1 is then sent to clock In management module, to improve signal quality, the clock is then sent to outside, used for lighting；Image output control module, this The clock of control sequential and the clock of lighting of individual parts of images output are not same clock, and the module is when work Only the data-signal of output image and some row field sync signals, are solved in the case of signal is distortionless, and lifting TTL is regarded Frequency laser propagation effect.

Brief description of the drawings

Fig. 1 is module principle block diagram of the invention；

Fig. 2 is control flow chart of the invention.

Fig. 3 is analysis chart of the invention.

Embodiment

In order to make the purpose , technical scheme and advantage of the present invention be clearer, below in conjunction with specific embodiment, to this Invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, not For limiting the present invention.Based on the embodiment in the present invention, those of ordinary skill in the art are not before creative work is made The every other embodiment obtained is put, the scope of protection of the invention is belonged to.

As shown in figure 1, the present invention provides a kind of TTL video output systems, including PLL chips and FPGA control systems, should PLL chips include the first clock signal and second clock signal with frequency, and the FPGA control systems include the first Clock management mould Block, second clock management module and image output control module, first clock signal, the first Clock management module and Described image output control module is sequentially connected, picture signal of the described image output control module output not comprising clock, institute State second clock signal and connect the second clock management module, the second clock management module output image clock.

As shown in Fig. 2 the present invention also provides a kind of TTL picture output methods, comprise the following steps：

S1, host computer issue play parameter and played after control, and control PLL chips export two-way with frequency clock signal, Wherein clock signal is used for the output for controlling the data and row field sync signal of image all the way, and another road clock signal is used for point The clock control of lamp；

If S2, lighting are abnormal, phase controlling parameter is sent under host computer, it is defeated to adjust the clock phase of output image Lighting effect can be reached by going out incoming terminal.In S2, by observing image state, it is adjusted；Because same set of cable and Tool, can caused by phase place change be certain, just can be with therefore it may only be necessary to once be adjusted.

During lighting, we can run into the synchronization of source output waveform, and arrive the nonsynchronous situation of terminal.So as to lead The exception of lighting effect is caused.It is not difficult to analyze the definition by Fourier space it is recognised that all cyclical signals can It is formed by stacking with the sine wave (general name for herein referring to sinusoidal and cosine) of different frequency.And the sine wave of a fixed frequency enters Any one complication system, its output can only make the waveform of input produce the change of amplitude and phase, can't change waveform Shape.Therefore, because the difference of the frequency of clock and data, causes clock and signal to generate skew after incoming terminal. As shown in Figure 3.

Finally it should be noted that：The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the invention, Although the present invention is described in detail with reference to the foregoing embodiments, for those skilled in the art, it still may be used To be modified to the technical scheme described in foregoing embodiments, or equivalent substitution is carried out to which part technical characteristic, Within the spirit and principles of the invention, any modification, equivalent substitution and improvements made etc., should be included in the present invention's Within protection domain.

Claims

1. a kind of TTL video output systems, it is characterised in that including PLL chips and FPGA control systems, the PLL chips include With the first clock signal and second clock signal of frequency, the FPGA control systems include the first Clock management module, second clock Management module and image output control module, first clock signal, the first Clock management module and described image are defeated Go out control module to be sequentially connected, picture signal of the described image output control module output not comprising clock, the second clock Signal connects the second clock management module, the second clock management module output image clock.

2. the TTL picture output methods described in a kind of claim 1, it is characterised in that：Comprise the following steps：

S1, host computer issue play parameter and played after control, and control PLL chips export two-way with frequency clock signal, wherein Clock signal is used for the output for controlling the data and row field sync signal of image all the way, and another road clock signal is used for lighting Clock control；

If S2, lighting are abnormal, phase controlling parameter is sent under host computer, to adjust the clock phase of output image, is output to Lighting effect can be reached up to terminal.

3. a kind of TTL picture output methods according to claim 2, it is characterised in that：In S2, by observing image shape State is adjusted.