CN107203079B - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN107203079B
CN107203079B CN201710387680.0A CN201710387680A CN107203079B CN 107203079 B CN107203079 B CN 107203079B CN 201710387680 A CN201710387680 A CN 201710387680A CN 107203079 B CN107203079 B CN 107203079B
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interval
pixel
display panel
sub
substrate
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CN107203079A (en
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崔宇
张振铖
邱英彰
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Xiamen Tianma Microelectronics Co Ltd
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Xiamen Tianma Microelectronics Co Ltd
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509Filters, e.g. light shielding masks
    • G02F1/133512Light shielding layers, e.g. black matrix

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The present invention describes a display panel and a display device including the same, the display panel including: the first substrate is a sub-pixel region which is arranged in an array along the scanning line direction and the data line direction; along the direction of the data lines, at least part of adjacent sub-pixel regions have a first interval or a second interval, two scanning lines are arranged in the first interval, no scanning line is arranged in the second interval, and the first interval is larger than the second interval; and/or, along the scanning line direction, at least part of adjacent sub-pixel regions have a third interval or a fourth interval, two data lines are arranged in the third interval, no data line is arranged in the fourth interval, and the third interval is larger than the fourth interval; the second substrate comprises a light shielding layer corresponding to the non-pixel region of the first substrate; the spacer is arranged between the first substrate and the second substrate and corresponds to the first interval or the third interval. The design of present case can effectively improve display panel's aperture opening ratio, promotes the whole luminance of display, reduces the consumption, makes the screen display quality show the promotion.

Description

Display panel and display device
Technical Field
The present invention relates to the field of display, and more particularly, to a display panel and a display device capable of increasing an aperture ratio of PPI products.
Background
With the progress of information technology, liquid crystal displays are increasingly ultra-thin, low in power consumption and low in cost, and are increasingly widely applied to daily life of people. With the pursuit of people for fine and smooth quality of video effect, whether cinema or home television playing, people hope that the higher the definition effect of video display is, the better is. High definition display, i.e. high ppi (pixels per inch) of the playback device. In the conventional art, it is difficult to achieve high PPI display due to limitations of processes and structures, or even if high PPI display can be achieved, the final visual display effect is not ideal. Therefore, in the liquid crystal display panel, the improvement of the display quality by providing the display effect with high PPI becomes a problem that researchers need to pay attention to and solve.
Fig. 1 is a schematic view of a partial plan structure of a liquid crystal display panel in the prior art. For ease of understanding, the present description in such figures depicts some of the internal structures of the traces and spacers in the display panel as being clearly visible. As shown in fig. 1, a related art liquid crystal display panel 10 includes a plurality of scan lines 11 (i.e., gate lines) and a plurality of data lines 12 intersecting and insulated from each other, and a plurality of sub-pixels 13 defined by the scan lines 11 and the data lines 12; the array substrate is designed by using a single row of gate lines (i.e. single gate traces), that is, the scanning line 11 passes through a gap between one row of sub-pixels 13 (i.e. pixels arranged along the X direction) and another row of sub-pixels 13 adjacent to the row, and connects one row of sub-pixels 13 to control the on/off of the row of pixels. In a color filter substrate of a liquid crystal display panel 10 in the prior art, a light shielding layer 14 (i.e., a black matrix BM) is formed at a corresponding position of a scan line 11 and a data line 12, wherein a line width of the light shielding layer 14 between adjacent sub-pixels 13 along a Y direction (i.e., a direction perpendicular to the scan line 11) is BM CDy, and in addition, spacers 15 (photospacers, PS) are usually disposed in two substrates of the liquid crystal display panel to control thickness and uniformity between the substrates.
After the array substrate and the color film substrate are oppositely arranged, when the two substrates are pressed, sliding friction is generated between the spacer 15 with a supporting function and the array substrate, two layers of alignment films between the spacer 15 and the array substrate are easily scratched, a display area can form bright spots, the spacer 15 moves after being extruded, and the problems of light leakage and the like can be caused. In order to avoid display distortion and light leakage in a display area caused by extrusion of the spacer 15, the existing product performs an outward-expanding design on the light shielding layer 12 at the position of the spacer 15 to form an outward-expanding light shielding area 16, as shown in the area indicated by the dashed line frame in the figure. However, in the prior art, the unit pixel area of the display panel with high display quality, especially the high PPI product, is smaller than that of the common product, and the design of the externally expanded light-shielding region 16 will sacrifice the opening area of the pixel unit, so that the overall opening transmittance is greatly reduced, and especially for the high PPI product, the overall brightness will be significantly lost.
Disclosure of Invention
In view of the above, the present invention provides a display panel, including: the display device comprises a first substrate, a second substrate and a third substrate, wherein the first substrate comprises a plurality of scanning lines and a plurality of data lines which are intersected and insulated, sub-pixel regions which are arranged in an array mode along the scanning line direction and the data line direction, and non-pixel regions which surround the sub-pixel regions; along the data line direction, at least part of the adjacent sub-pixel regions have a first interval therebetween, and at least part of the adjacent sub-pixel regions have a second interval therebetween, wherein two scan lines are disposed in the first interval, and no scan line is disposed in the second interval, and/or along the scan line direction, at least part of the adjacent sub-pixel regions have a third interval therebetween, at least part of the adjacent sub-pixel regions have a fourth interval therebetween, and two data lines are disposed in the third interval, and no data line is disposed in the fourth interval; wherein the first interval is greater than the second interval and the third interval is greater than the fourth interval;
a second substrate disposed opposite to the first substrate and including a light-shielding layer corresponding to the non-pixel region of the first substrate;
a spacer disposed between the first substrate and the second substrate, the spacer corresponding to the first or third gap.
The invention also provides a display device comprising the display panel.
Compared with the prior art, the display panel and the display device provided by the invention have the advantages that the two scanning lines are arranged in one pixel interval, and/or the two data lines are arranged in one pixel interval, and meanwhile, the standing position of the spacer and the line width of the shading layer are designed, so that the shading layer at the position corresponding to the signal line can meet the shading requirement for the signal line, the requirement for preventing light leakage at the spacer due to extrusion can be met, and the design of the external expansion shading layer for preventing the light leakage from extrusion of the spacer is not required. The design of present case can effectively improve display panel's aperture opening ratio, promotes the whole luminance of display, reduces the consumption, makes the screen display quality show the promotion.
Drawings
FIG. 1 is a schematic diagram of a partial plan structure of a prior art LCD panel;
FIG. 2 is a schematic partial plan view of a display panel according to an embodiment of the present invention;
FIG. 3 is a cross-sectional view taken along A-A in FIG. 2;
FIG. 4 is a cross-sectional view taken along line B-B of FIG. 2;
fig. 5 is a schematic diagram illustrating a pixel arrangement rule of a display panel according to an embodiment of the invention;
FIGS. 6- (a) to 6- (c) are schematic plan views of a partial spacer of a display panel according to an embodiment of the invention;
FIG. 7 is a schematic partial plan view of a display panel according to another embodiment of the invention;
fig. 8 is a schematic diagram of a pixel arrangement rule of a display panel according to another embodiment of the invention;
FIG. 9 is a schematic enlarged view of a portion of a display panel according to another embodiment of the present invention;
FIG. 10 is a schematic partial plan view of a display panel according to yet another embodiment of the invention;
FIG. 11 is a schematic partial enlarged view of a display panel according to yet another embodiment of the invention;
fig. 12 is a schematic diagram of a display device according to an embodiment of the invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, the present invention is further described with reference to the accompanying drawings and examples.
It should be noted that in the following description, specific details are set forth in order to provide a thorough understanding of the present invention. The invention can be implemented in a number of ways different from those described herein and similar generalizations can be made by those skilled in the art without departing from the spirit of the invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.
For high PPI products, in the prior art, in order to avoid light leakage due to extrusion of spacers, the light shielding layer at the spacer station is designed to be expanded, so that the aperture area of the pixel is sacrificed, the overall aperture penetration rate is greatly reduced, and the overall brightness is obviously lost.
In view of the above, the present invention provides a display panel, fig. 2 is a partial plan view of the display panel according to an embodiment of the present invention, fig. 3 is a cross-sectional view taken along a-a direction in fig. 2, and fig. 4 is a cross-sectional view taken along a-B direction in fig. 2. The thickness, the area size and the shape of each film layer in the attached drawings of the invention do not reflect the real proportion of each film layer, and the invention is only schematically illustrated.
As shown in fig. 2, 3 and 4, the display panel 100 includes a first substrate 110 (i.e., an array substrate), a second substrate 120 (i.e., a color filter substrate) disposed opposite to the first substrate 110, a spacer 140 disposed between the first substrate 110 and the second substrate 120, and a liquid crystal 130 filled between the first substrate 110 and the second substrate 120.
The first substrate 110 includes: a first substrate 111, a thin film transistor 150, a planarization layer 112, a common electrode (not shown), and a pixel electrode 160. The pixel electrode 160 may include a plurality of sub-electrodes extending in a direction forming an acute angle with the Y-direction.
The first thin film transistor 150 includes a gate electrode 151 electrically connected to the scan line 170, a gate insulating layer 152, an active layer 153, a first insulating layer 154, and a source/drain electrode 155. The source/drain electrodes 155 of the first thin film transistor 150 are electrically connected to the pixel electrode 160 through the via holes 113 on the planarization layer 112. The second substrate 120 includes: a second base substrate 121, and a light-shielding layer 122 (i.e., a black matrix) disposed on the base substrate 121, a color filter layer 123, a planarization layer 124, spacers 140, and an alignment film 126 coated on the spacers 140.
The display panel 100 further includes a plurality of scan lines 170 and a plurality of data lines 180 intersecting and insulated from each other, and sub-pixel regions 190 arranged in an array along an X direction (i.e., a direction of the scan lines 170) and along a Y direction (i.e., a direction of the data lines 180), and a non-pixel region surrounding the sub-pixel regions 190. A plurality of sub-pixel regions 190 having the same coordinate in the X direction collectively form a row pixel group 191 (a region enclosed by a dotted line frame) extending in the X direction. The first to nth row pixel groups 191 are arranged in the Y direction, where N is a positive integer. Each row pixel group 191 includes a plurality of red 1911, green 1912 and blue 1913 sub-pixel regions. In each row pixel group 191, the sub-pixel regions 190 of different colors are arranged in a repeating cycle in the order of a red sub-pixel region 1911, a green sub-pixel region 1912, and a blue sub-pixel region 1913. Of course, in other embodiments of the present invention, each row pixel group may include a plurality of red, green, blue and white sub-pixel regions. In each row of pixel group, the sub-pixel regions with different colors are respectively and repeatedly arranged according to the sequence of the red sub-pixel region, the green sub-pixel region, the blue sub-pixel region 1913 and the white sub-pixel region, and the transmittance of light in the display panel is increased by increasing the white sub-pixel region, so that the brightness of the display panel is improved, and the display quality is improved.
Along the Y direction, there is a first interval CD1 between the pixel group 191 of the 2N-th row and the pixel group 191 of the 2N-1 th row, and there is a second interval CD2 between the pixel group 191 of the 2N-th row and the pixel group 191 of the 2N +1 th row, where N is a positive integer and 2N +1< N, 2N-1> 0. That is, there is a first interval CD1 between the pixel group 191 of the even row and the adjacent previous pixel group 191 of the odd row, and there is a second interval CD2 between the pixel group 191 of the even row and the adjacent next pixel group 191 of the odd row. Of course, in other embodiments of the present invention, it may be designed that the even-row pixel group 191 and the adjacent previous odd-row pixel group 191 have the second interval CD2 therebetween, and the even-row pixel group 191 and the adjacent next odd-row pixel group 191 have the first interval CD1 therebetween.
Fig. 5 is a schematic diagram of a pixel arrangement rule of a display panel according to an embodiment of the invention. As shown in fig. 2 and 5: the second row pixel group 191/2 has a first spacing CD1 with the adjacent first odd row pixel group 191, i.e., the first row pixel group 191/1, and the second row pixel group 191/2 has a second spacing CD2 with the adjacent next odd row pixel group 191, i.e., the third row pixel group 191/3; the fourth row pixel group 191/4 has a first spacing CD1 with the adjacent previous odd row pixel group 191, i.e., the third row pixel group 191/3.
And so on, row 2n-2 pixel group 191/2n-2 has a second spacing CD2 with the next odd row pixel group 191, i.e., row 2n-1 pixel group 191/2 n-1; a first interval CD1 is provided between the pixel group 191/2n in the 2 n-th row and the adjacent pixel group 191 in the previous odd-numbered row, i.e., the pixel group 191/2n-1 in the 2n-1 row, and a second interval CD2 is provided between the pixel group 191/2n in the 2 n-th row and the adjacent pixel group 191 in the next odd-numbered row, i.e., the pixel group 191/2n +1 in the 2n +1 row.
Wherein the first spacing CD1 is greater than the second spacing CD 2. That is, in the Y direction, the distance between the pixel group 191 of the even row and the pixel group 191 of the adjacent previous odd row is greater than the distance between the pixel group 191 of the even row and the pixel group 191 of the adjacent next odd row.
Preferably, the dimension of the first spacing CD1 is not less than 18 μm along the Y direction, so as to satisfy the requirement of no light leakage of the corresponding spacer and light shielding layer; the size of the second space CD2 is not less than 3 μm, so as to meet the requirement of preventing the electric fields generated by the pixel electrodes between adjacent pixel rows from interfering with each other and avoiding the influence on the rotation of the liquid crystal.
Two scan lines 170 are disposed in the first space CD1, and no scan line 170 is disposed in the second space CD 2. The scan lines 170 in the first interval CD1 are respectively connected to the sub-pixel regions 190 in the adjacent row pixel groups 191 to provide scan signals to the sub-pixel regions 190.
The spacers 140 for supporting the first substrate 110 and the second substrate 120 are disposed on the planarization layer 124 of the second substrate 120 and corresponding to the first spacing CD 1.
The spacer 140 includes a main spacer 141 and an auxiliary spacer 142, and the height of the main spacer 141 is greater than that of the auxiliary spacer 142. Preferably, the main spacers 141 and the auxiliary spacers 142 are alternately arranged in the X direction (i.e., the scan line direction). Of course, the arrangement of the spacers is not limited thereto. In different embodiments, the main spacers 141 and the auxiliary spacers 142 may be alternately arranged along the Y direction (i.e., the data line direction), or may be arranged according to other rules.
The light shielding layer 122 on the substrate 121 of the second substrate 120 is disposed corresponding to the non-pixel region surrounding each sub-pixel region 190 to form a mesh-like light shielding structure to prevent light leakage; the light shielding layer 122 includes a first black matrix region 122/BM CD1 correspondingly shielding the first interval CD1, and can shield the scan lines 170 located in the first interval CD1, so as to prevent the scan lines 170 of the metal material from being reflected, thereby effectively avoiding the occurrence of rainbow fringes. The line width of the first black matrix region 122/BM CD1 is the length along the Y direction; in the Y direction, the length of each first space CD1 is equal to the line width of the first black matrix region 122/BMCD1 corresponding thereto.
The first thin film transistor 150 on the first substrate 110 and the via hole 113 on the planarization layer 112 are located in the first space CD1, and the aperture of the via hole 113 is 3.0-5.0 μm. In the X direction, the distance between the adjacent vias 113 is not less than 4 μm, and the distance between the via 113 and the adjacent sub-pixel region 190 is not less than 4 μm. Preferably, the aperture is 5.0 μm, and the distance between the via hole and the adjacent sub-pixel region is 4.85 μm, so that a sufficient distance is left between the adjacent via holes without causing contact of the pixel electrodes of different pixel regions.
The spacers and the light shielding layers thereof are arranged corresponding to the first interval, and the line width of the first black matrix area 122/BM CD1 is larger than the line width of the outward-expanded light shielding layer corresponding to the spacers in the prior art. The first space provides enough space for the spacers, so that the shape and distribution density of the spacers are not limited any more, and the spacers can be extended, for example, as shown in fig. 6- (a) to 6- (c), for a schematic plan view of a partial spacer of a display panel according to an embodiment of the present invention, the spacers 140 are extended in the X direction, and the spacers 140 may be rectangular as shown in fig. 6- (a), or oval as shown in fig. 6- (b), or may be designed in various shapes such as a barrier wall shape as shown in 6- (c), so as to ensure the aperture ratio of the pixel area, improve the distribution density of the spacers, and improve the anti-squeezing capability of the display panel.
Compared with the prior art, the display panel and the display device provided by the invention have the advantages that the two scanning lines are arranged in the pixel interval, and/or the two data lines are arranged in the pixel interval, and meanwhile, the standing position of the spacer and the line width of the shading layer are designed, so that the shading layer at the position corresponding to the signal line can meet the shading requirement for the signal line, the requirement for preventing light leakage at the spacer due to extrusion can be met, and the shading of the pixel area by the shading layer expanded outside the area corresponding to the spacer is reduced or avoided. Therefore, the design of the scheme can increase the opening of each sub-pixel under the condition of maintaining the original pixel arrangement structure, effectively improve the opening ratio of the existing product, achieve the aim of improving the brightness and improve the display effect and the display quality.
Fig. 7 is a partial schematic plan view of a display panel according to another embodiment of the invention. The display panel 200 includes a first substrate (i.e., an array substrate), a second substrate (i.e., a color filter substrate) disposed opposite to the first substrate, a spacer located between the first substrate and the second substrate, and a liquid crystal filled between the first substrate and the second substrate. The same parts in this embodiment as those in the previous embodiment will not be described again.
The display panel 200 in this embodiment further includes a plurality of scan lines 270 and a plurality of data lines 280 intersecting and insulated with each other, sub-pixel regions 290 arranged in an array along an X direction (i.e., a direction of the scan lines 270) and along a Y direction (i.e., a direction of the data lines 280), and non-pixel regions surrounding the sub-pixel regions 290.
A plurality of adjacent sub-pixel regions 290 having the same coordinate in the X direction collectively form one pixel group 291. The plurality of pixel groups 291 are arranged in an array in the X direction and in the Y direction. The row pixel groups 291 on the same column in the Y direction include the same number of sub-pixel regions 290, and the row pixel groups 291 are aligned with each other in the column direction; in the X direction, adjacent pixel groups 291 are offset from each other by a certain distance. Each row pixel group includes a plurality of red, green and blue sub-pixel regions. In each row of pixel groups, the sub-pixel regions 290 of different colors are respectively arranged in a repeating cycle in the order of the red sub-pixel region, the green sub-pixel region, and the blue sub-pixel region.
In this embodiment, the pixels are arranged in an array along the X direction and the Y direction, and there are N rows and M columns of pixel groups 291, where N and M are positive integers, and the pixel groups 291 and the pixel regions 290 have the following arrangement rule:
for even column pixel group 291:
in the Y direction, a first interval CD1 is arranged between the pixel group 291 in the 4n-2 th row and 2m column and the pixel group 291 in the 4n-3 th row and 2m column, and a second interval CD2 is arranged between the pixel group 291 in the 4n-2 th row and 2m column and the pixel group 291 in the 4n-1 th row and 2m column;
in the Y direction, a fifth interval CD5 is provided between the 4 n-th row 2m column pixel group 291 and the 4n-1 row 2m column pixel group 291, and a second interval CD2 is provided between the 4 n-th row 2m column pixel group 291 and the 4n + 1-th row 2m column pixel group 291;
for odd column pixel groups 291:
in the Y direction, a fifth interval CD5 is arranged between the pixel group 291 at the 4n-2 th row and 2m-1 column and the pixel group 291 at the 4n-3 th row and 2m-1 column, and a second interval CD2 is arranged between the pixel group 291 at the 4n-2 th row and 2m-1 column and the pixel group 291 at the 4n-1 th row and 2m-1 column;
in the Y direction, a first interval CD1 is arranged between the pixel group 291 at the 4n row and 2m-1 column and the pixel group 291 at the 4n-1 row and 2m-1 column, and a second interval CD2 is arranged between the pixel group 291 at the 4n row and 2m-1 column and the pixel group 291 at the 4n +1 row and 2m-1 column;
wherein N and M are positive integers, 4N +1< N, and 2M < M.
That is, the first spaces CD1 alternate with the fifth spaces CD5 in the X direction. Of course, in other embodiments of the present invention, the positions of the first interval CD1 and the fifth interval CD5 may be interchanged or other modulations may be performed to meet the present invention.
Specifically, referring to fig. 8, fig. 8 is a schematic diagram of a pixel arrangement rule of a display panel according to another embodiment of the present invention (for convenience of example, each rectangular frame represents one pixel group 291):
the second row first column pixel group 291/2/1 has a fifth spacing CD5 with the adjacent first odd row pixel group 291, i.e., the first row first column pixel group 291/1/1, and the second row first column pixel group 291/2/1 has a second spacing CD2 with the adjacent next odd row pixel group 291, i.e., the third row first column pixel group 291/3/1; the fourth row first column pixel group 291/4/1 has a first spacing CD1 with the adjacent upper odd row pixel group 291, i.e., the third row first column pixel group 291/3/1, and the fourth row first column pixel group 291/4/1 has a second spacing CD2 with the adjacent lower odd row pixel group 291, i.e., the fifth row first column pixel group 291/5/1; by analogy, the interval regularity among the first column pixel group in the 4n th row, the first column pixel group in the 4n-1 th row, the first column pixel group in the 4n-2 th row and the first column pixel group in the 4n-3 th row can be deduced;
the second row and second column pixel group 291/2/2 has a first spacing CD1 with the adjacent first odd row pixel group 291, i.e., the first row and second column pixel group 291/1/2, and the second row and second column pixel group 291/2/2 has a second spacing CD2 with the adjacent next odd row pixel group 291, i.e., the third row and second column pixel group 291/3/2; a fifth spacing CD5 is provided between the fourth row-second column pixel group 291/4/2 and the adjacent previous odd row pixel group 291, i.e., the third row-second column pixel group 291/3/2, and a second spacing CD2 is provided between the fourth row-second column pixel group 291/4/2 and the adjacent next odd row pixel group 291, i.e., the fifth row-second column pixel group 291/5/2; by analogy, regular intervals among the second pixel group in the 4 nth row and the second column, the second pixel group in the 4n-1 th row and the second column, the second pixel group in the 4n-2 th row and the second pixel group in the 4n-3 th row can be deduced;
by analogy, the interval rule between the pixel group at the k-th column in the 4 n-th row, the pixel group at the k-th column in the 4n-1 th row, the pixel group at the k-th column in the 4n-2 th row and the pixel group at the k-th column in the 4n-3 th row can be deduced, wherein k is m or 2 m.
Wherein the fifth spacing CD5 is greater than the second spacing CD2 and the fifth spacing CD5 is less than the first spacing CD 1. Two scan lines 270 are disposed in each of the first and fifth spacings CD1 and CD5, and no scan line 270 is disposed in the second spacing CD 2. That is, the scan lines 270 are arranged in the first and fifth intervals CD1 and CD5 alternately arranged in the direction in which they extend, i.e., the X direction. The scan lines 270 are respectively connected to the sub-pixel regions 290 in the adjacent row pixel groups 291 to provide scan signals to the sub-pixel regions 290.
The spacer 240 for supporting the first substrate and the second substrate is disposed on the flat layer of the second substrate and corresponding to the first interval CD 1.
The light-shielding layer 222 on the second substrate is disposed corresponding to the non-pixel region surrounding each sub-pixel region 290 to form a mesh-like light-shielding structure to prevent light leakage; the light-shielding layer 222 includes a first black matrix region 222/BM CD1 correspondingly shielding the first interval CD1, and can shield the scan lines 170 in the first interval CD1, so as to prevent the scan lines 170 of the metal material from being reflected, thereby effectively avoiding the occurrence of rainbow fringes. The light-shielding layer 222 further includes a fifth black matrix region 222/BM CD5 correspondingly shielding a fifth interval CD5, wherein, along the Y direction, the length of each first interval CD1 is equal to the line width (i.e., the length along the Y direction) of the corresponding first black matrix region 222/BM CD 1; the length of each fifth interval CD5 is equal to the line width of the fifth black matrix area 222/BM CD5 corresponding thereto.
Preferably, the dimension of the first spacing CD1 is not less than 18 μm along the Y direction, so as to ensure that the corresponding spacer and light shielding layer do not leak light and block the pixel region; the size of the second interval CD2 is not less than 3 μm, so as to meet the requirement of preventing the electric fields generated by the pixel electrodes between the adjacent pixel rows from interfering with each other and avoiding the influence on the rotation of the liquid crystal; the dimension of the fifth space CD5 is equal to the dimension of the first space CD1 minus the dimension of the second space CD2, so as to meet the requirements of shielding the scanning lines, preventing light leakage, and arranging the whole panel.
The first thin film transistor on the first substrate and the via hole on the planarization layer are located in the first space or the fifth space, and the aperture of the via hole is 3.0-5.0 μm. Along the X direction, the distance between the adjacent via holes is not less than 4 μm, and the distance between the via hole and the adjacent sub-pixel region is not less than 4 μm. Preferably, in the fifth interval, the distance between the adjacent via holes is 5.3 μm, which is sufficient that the adjacent via holes are spaced enough not to cause contact between the pixel electrodes of different pixel regions, and is also sufficient to provide sufficient space for the aperture of the via holes to be expanded, and sufficient space between the via holes and the adjacent sub-pixel regions.
When the display panel is extruded, the main spacer with larger height plays a main supporting role, and the auxiliary spacer with smaller height plays an auxiliary supporting role, so that the auxiliary spacer has smaller possibility of sliding or shifting than the main spacer, and the auxiliary spacer is shorter than the main spacer, has smaller possibility of scratching other film layers, and has smaller possible scratching range, therefore, for the main spacer and the auxiliary spacer with the same maximum diameter, the range of the shading layer corresponding to the auxiliary spacer which needs to be expanded is relatively smaller. Therefore, in the present embodiment, the diameter of the main spacer 141 is preferably smaller than that of the auxiliary spacer 142.
Although, of course, the present embodiment exemplifies the scanning lines, and provides the space for accommodating the scanning lines. In a different aspect, the concept of the present invention can also be applied to the design of the data line accommodating space and the corresponding light shielding area.
According to the invention, in the process of manufacturing the high PPI display panel, the size of the light shielding layer corresponding to the spacer is not reduced, so that the light shielding layer can shield the signal line, light leakage at the spacer due to extrusion can be prevented, the pixel region is prevented from being shielded by the externally expanded light shielding layer, the aperture opening ratio of the pixel region is increased, and the display brightness is improved. Through the design of adding the fifth interval in the embodiment of the scheme, the size of the fifth interval is between the size of the first interval and the size of the second interval along the Y direction, so that the aperture ratio of the pixels at the fifth interval is increased, the mutual interference of electric fields generated by pixel electrodes between the pixels at two sides of the interval can be avoided, and the display panel can be ensured not to have uneven display due to the overlarge difference between the size of the first interval and the size of the second interval through the adjustment of the fifth interval.
Taking a display panel applied to a FHD (Full High Definition) touch display screen with a display screen size of 5.46 inches as an example, the display panel provided in this embodiment is compared with a display panel in the prior art by referring to fig. 1, fig. 7, fig. 9, tables 1-1 and tables 1-2. Fig. 9 is a schematic partial enlarged view of a display panel according to another embodiment of the present invention, where table 1-1 shows relevant parameters of a display panel according to the prior art, and table 1-2 shows relevant parameters of a display panel according to another embodiment of the present invention.
Wherein, the width of the pixel region is the width of each pixel region 290 in the X direction, the length of the pixel region is the length of each pixel region 290 in the Y direction, BM CDx is the line width (width along the X direction) of the light shielding layer corresponding to the interval between the adjacent pixel regions in the X direction of the display panel in the prior art, BM CDy is the line width (width along the X direction) of the light shielding layer corresponding to the interval between the adjacent pixel regions in the Y direction of the display panel in the prior artLine width (width in Y direction), R, of light-shielding layerMPSIs the diameter of the main spacer, RSPSThe MPS BM CDy is the line width (width along the Y direction) of the extended light-shielding layer corresponding to the main spacer between the adjacent pixel regions in the Y direction of the display panel in the prior art, and the SPS BM CDy is the line width (width along the Y direction) of the extended light-shielding layer corresponding to the auxiliary spacer between the adjacent pixel regions in the Y direction of the display panel in the prior art. The MPS/SPS BM extension length is the length of the outer light shielding layer exceeding the main/auxiliary spacers along the Y direction in the prior art.
Tables 1 to 1: related parameters of 5.46FHD display panel in prior art
Width of pixel region 15.5μm
Length of pixel region 46.5μm
BM CDx 5.5μm
BM CDy 16.5μm
RMPS 9μm
RSPS 11μm
MPS BM flare length 11μm
SPS BM extension length 6μm
MPS BM CDy 31μm
SPS BM CDy 23μm
MPS BM CDy-BM CDy 16.5μm
SPS BM CDy-BM CDy 6.5μm
Tables 1 to 2: another embodiment of the invention provides parameters associated with a 5.46FHD display panel
Width of pixel region 15.5μm
Length of pixel region 46.5μm
BM CDx 5.5μm
BM CD1 29μm
BM CD2 4μm
BM CD5 25μm
RMPS 18μm
RSPS 22μm
MPS BM flare length 11μm
SPS BM extension length 0 μm/without external expansion
MPS BM CDy 31μm
SPS BM CDy 23μm
MPS BM CDy-BM CD1 2μm
As shown in the above table, in the prior art, the sizes of the spacers and the externally-expanded light-shielding layers corresponding to the spacers exceed the size of the interval between the normally-arranged sub-pixel regions, so that part of the sub-pixel regions are shielded by the externally-expanded light-shielding layers, the aperture opening ratio of the sub-pixel regions is affected, the aperture opening ratio of a single sub-pixel region at the main spacer station is 52.1%, and the aperture opening ratio of a single sub-pixel region at the auxiliary spacer station is 52.6%.
In the display panel provided by the invention, preferably, the line width of the first space and the corresponding first black matrix area BMCD1 is 29 μm, the line width of the second space and the corresponding second black matrix area BM CD2 is 4 μm, and the line width of the fifth space and the corresponding fifth black matrix area BM CD5 is 25 μm. The spacers and the light shielding layers thereof are arranged corresponding to the first interval, and the line width of the first black matrix area BM CD1 is 29 μm and is larger than the line width of the external light shielding layer corresponding to the auxiliary spacers in the prior art by 23 μm. Therefore, the sub-pixel area at the auxiliary spacer station position is not affected by the spacer and the corresponding shading layer, the aperture opening ratio of the single sub-pixel area at the auxiliary spacer station position is 54.5%, and the aperture opening ratio can be improved by 4.6% compared with the prior art. And the sub-pixel area at the auxiliary spacer station position and the sub-pixel area at the position without the spacer station position keep consistent opening size, thereby being beneficial to uniformity and consistency of light emission, preventing color cast and improving display effect.
Along the Y direction, the length of the pixel shielded by the external light shielding layer corresponding to the main spacer in the prior art is 16.5 μm at most, while in the present embodiment, along the Y direction, the line width of the external light shielding layer corresponding to the main spacer is 31 μm, the length exceeding the first black matrix area BM CD1 at most is 2 μm, the aperture ratio of the single sub-pixel area at the main spacer station is 54.4%, and the aperture ratio can be improved by 4.4% compared with the prior art.
The invention can ensure that the shading layer can meet the shading for the signal line while maintaining the original pixel arrangement structure, and can prevent light leakage at the position of the spacer due to extrusion, thereby reducing the shading of the pixel region by the externally-expanded shading layer, or preventing each sub-pixel region from being shaded by the externally-expanded shading layer without the design of the externally-expanded shading layer, effectively improving the aperture opening ratio of the existing product, achieving the purposes of improving the brightness, reducing the power consumption, preventing color cast and improving the display effect and the display quality.
Fig. 10 is a partial schematic plan view of a display panel according to yet another embodiment of the invention. The display panel 300 includes a first substrate (i.e., an array substrate), a second substrate (i.e., a color filter substrate) disposed opposite to the first substrate, a spacer disposed between the first substrate and the second substrate, and a liquid crystal filled between the first substrate and the second substrate. The first substrate and the second substrate in this embodiment are the same as those in the previous embodiment, and are not repeated.
The display panel 300 further includes a plurality of scan lines 370 and a plurality of data lines 380 intersecting and insulated from each other, and sub-pixel regions 390 arranged in an array along an X direction (i.e., a direction of the scan lines 370) and along a Y direction (i.e., a direction of the data lines 380), and non-pixel regions surrounding the sub-pixel regions 390.
Here, the sub-pixel regions 390 having the same coordinate in the Y direction collectively form one row pixel group 391 extending in the Y direction. The first to mth column pixel groups 391 are arranged in the X direction, where M is a positive integer.
In the X direction, a third interval CD3 is provided between the 2M-th column pixel group 391 and the 2M-1-th column pixel group 391, and a fourth interval CD4 is provided between the 2M-th column pixel group 391 and the 2M + 1-th column pixel group 391, where M is a positive integer and 2M +1< M. That is, a third interval CD3 is provided between the even column pixel group 391 and the previous adjacent odd column pixel group 391, and a fourth interval CD4 is provided between the even column pixel group 391 and the next adjacent odd column pixel group 391. Of course, in other embodiments of the present invention, it is possible to design the even-numbered column pixel group 391 and the previous odd-numbered column pixel group 391 as a fourth interval CD4, and the even-numbered column pixel group 391 and the next odd-numbered column pixel group 391 as a third interval CD 3.
Specifically, the second column pixel group 391/2 has a third interval CD3 with the adjacent previous odd column pixel group 391, i.e., the first column pixel group 391/1, and the second column pixel group 391/2 has a fourth interval CD4 with the adjacent next odd column pixel group 391, i.e., the third column pixel group 391/3; a third interval CD3 is provided between the fourth row pixel 391/4 and the previous odd row pixel 391, i.e., the third row pixel 391/3;
similarly, a third interval CD3 is provided between the 2 m-th pixel group 391/2m and the adjacent previous odd-numbered column pixel group 391, i.e., the 2m-1 column pixel group 391/2m-1, and a fourth interval CD4 is provided between the 2 m-th pixel group 391/2m and the adjacent next odd-numbered column pixel group 391, i.e., the 2m +1 column pixel group 391/2m + 1.
Wherein the third interval CD3 is greater than the fourth interval CD 4. That is, along the X direction, the distance between the even-numbered column pixel group 391 and the adjacent previous odd-numbered column pixel group 391 is greater than the distance between the even-numbered column pixel group 391 and the adjacent subsequent odd-numbered column pixel group 391. Preferably, the size of the third space CD3 is not less than 11 μm along the X direction, so as to ensure that the corresponding spacer and light shielding layer can not leak light and simultaneously not shield the pixel region; the size of the fourth space CD4 is not less than 3 μm to satisfy the requirement of preventing the rotational interference of the liquid crystal between the adjacent pixel rows.
The spacer 340 for supporting the first substrate and the second substrate is disposed on the flat layer of the second substrate and corresponding to the first spacing CD 1.
The light-shielding layer 322 on the second substrate is disposed corresponding to the non-pixel region surrounding each sub-pixel region 390 to form a mesh-like light-shielding structure to prevent light leakage; the light-shielding layer 322 includes a third black matrix area 322/BM CD3 correspondingly shielding a third interval CD3, and can shield the data line 380 located in the third interval CD3, so as to prevent the data line 380 from reflecting, and effectively avoid the occurrence of rainbow stripes. The light-shielding layer 322 further includes a fourth black matrix region 322/BM CD4 correspondingly shielding the fourth interval CD 4. Preferably, in the X direction, the length of each third interval CD3 is equal to the line width of the third black matrix region 322/BM CD3 corresponding thereto (i.e., the length in the X direction); the length of each fourth interval CD4 is equal to the line width of the fourth black matrix area 322/BMCD4 corresponding thereto.
The following takes a display panel applied to a touch display screen with a display screen size of 5.46 inches as an example, and compares the display panel provided in this embodiment with a display panel in the prior art with reference to fig. 1, fig. 10, fig. 11, table 2-1, and table 2-2. Table 2-1 shows the parameters of a display panel according to another embodiment of the present invention. The MPS BM CDx is a line width (width along the X direction) of the extended light-shielding layer corresponding to the main spacer between the adjacent pixel regions in the X direction of the display panel in the prior art, and the SPS BM CDx is a line width (width along the X direction) of the extended light-shielding layer corresponding to the auxiliary spacer between the adjacent pixel regions in the X direction of the display panel in the prior art. The MPS/SPS BM extension length is the length of the outer light shielding layer exceeding the main/auxiliary spacers along the X direction in the prior art.
Table 2-1: related parameters of 5.46 inch display panel in the prior art
Width of pixel region 14μm
Length of pixel region 46.5μm
BM CDx 7.0μm
BM CDy 16.5μm
RMPS 9μm
RSPS 11μm
MPS BM flare length 11μm
SPS BM extension length 6μm
MPS BM CDx 31μm
SPS BM CDx 23μm
MPS BM CDx-BM CDx 24μm
SPS BM CDx-BM CDx 16μm
Tables 2 to 2: yet another embodiment of the present invention provides parameters associated with a 5.46 inch display panel
Width of pixel region 14μm
Length of pixel region 46.5μm
BM CDy 16.5μm
BM CD3 11μm
BM CD4 3μm
RMPS 9μm
RSPS 11μm
MPS BM flare length 11μm
SPS BM extension length 6μm
MPS BM CDx 31μm
SPS BM CDx 23μm
MPS BM CDx-BM CD3 20μm
SPS BM CDx-BM CD3 12μm
As shown in the above table, in the prior art, the sizes of the spacers and the externally-expanded light-shielding layers corresponding to the spacers exceed the size of the interval between the normally-arranged sub-pixel regions, so that part of the sub-pixel regions are shielded by the externally-expanded light-shielding layers, the aperture opening ratio of the sub-pixel regions is affected, the aperture opening ratio of a single sub-pixel region at the main spacer station is 46.4%, and the aperture opening ratio of a single sub-pixel region at the auxiliary spacer station is 48.8%.
In the display panel of the present invention, preferably, the line width of the third black matrix area 322/BM CD3 corresponding to the third space is 11 μm, and the line width of the fourth black matrix area 322/BM CD4 corresponding to the fourth space is 3 μm. The spacers and the light-shielding layers thereof are disposed corresponding to the first interval, and the line width of the first black matrix region 322/BM CD1 is 29 μm. The area of the sub-pixel region shielded by the external light shielding layer corresponding to the spacer is smaller than the area of the sub-pixel region shielded by the external light shielding layer in the prior art.
Along the X direction, the length of the pixel shielded by the outward-extending light shielding layer corresponding to the main spacer in the prior art is 24 μm at most, whereas along the X direction in the embodiment, the length of the outward-extending light shielding layer corresponding to the main spacer exceeding the third black matrix area BM CD3 at most is 20 μm, the aperture ratio of the single sub-pixel area at the main spacer station is 47.3%, and the aperture ratio can be improved by 2.0% compared with the prior art.
Along the X direction, the length of the pixel shielded by the outward-extending light shielding layer corresponding to the auxiliary spacer in the prior art is 16 μm at most, whereas along the X direction in the embodiment, the length of the outward-extending light shielding layer corresponding to the auxiliary spacer, which exceeds the third black matrix area BM CD3 at most, is 12 μm, the aperture ratio of a single sub-pixel area at the position of the auxiliary spacer is 49.1%, and the aperture ratio can be improved by 1.0% compared with the prior art.
Therefore, the invention can reduce the area of the sub-pixel region shielded by the light shielding layer while maintaining the original pixel arrangement structure and meeting the functions of light leakage prevention of the light shielding layer, thereby effectively improving the aperture opening ratio of the product, achieving the purpose of improving the brightness, reducing the power consumption and improving the display effect and the display quality.
Of course, the invention is not limited to two adjacent signal lines being disposed in the same space, and in other embodiments of the invention, some signal lines may be individually disposed in one space according to the wiring and other design requirements; the invention is also not limited to the first, second, fifth, or third intervals; the four spaces are designed separately, and in other embodiments of the present invention, the display panel may include a combination of the first, second, and fifth spaces and the third and fourth spaces.
As shown in fig. 12, fig. 12 is a schematic view of a display device according to an embodiment of the invention. The display device 400 according to the present embodiment can be used in various devices such as a smart phone, a tablet terminal, a mobile phone terminal, a notebook-type personal computer, and a game device. Specifically, the display device includes the display panel mentioned in the foregoing embodiment.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.

Claims (15)

1. A display panel, comprising: the display device comprises a first substrate, a second substrate and a third substrate, wherein the first substrate comprises a plurality of scanning lines and a plurality of data lines which are intersected and insulated, sub-pixel regions which are arranged in an array mode along the scanning line direction and the data line direction, and non-pixel regions which surround the sub-pixel regions; along the data line direction, at least part of adjacent sub-pixel regions have a first interval, at least part of adjacent sub-pixel regions have a second interval, two scanning lines are arranged in the first interval, and the scanning lines are not arranged in the second interval, wherein the first interval is larger than the second interval;
a second substrate disposed opposite to the first substrate and including a light-shielding layer corresponding to the non-pixel region of the first substrate;
a spacer disposed between the first substrate and the second substrate, the spacer corresponding to the first space;
a fifth interval is further included between the adjacent sub-pixel regions along the data line direction, a size of the fifth interval along the data line extending direction is larger than a size of the second interval along the data line extending direction, a size of the fifth interval along the data line extending direction is smaller than a size of the first interval along the data line extending direction, and two scan lines are disposed in the fifth interval;
the first intervals and the fifth intervals are alternately arranged along the scanning line direction; the first interval, the second interval, and the fifth interval are sequentially repeated in the order of the first interval, the second interval, the fifth interval, and the second interval or in the order of the fifth interval, the second interval, the first interval, and the second interval along the data line direction.
2. The display panel according to claim 1, wherein along the scan line direction, at least a portion of adjacent sub-pixel regions have a third space therebetween, and at least a portion of adjacent sub-pixel regions have a fourth space therebetween, wherein two of the data lines are disposed in the third space, and wherein no data line is disposed in the fourth space; wherein the third interval is greater than the fourth interval;
the spacer also corresponds to the third interval.
3. The display panel according to claim 1, wherein a size of the first space is not less than 18 μm and a size of the second space is not less than 3 μm in an extending direction of the data line.
4. The display panel according to claim 3, wherein a size of the fifth space is equal to a size of the first space minus the second space in a direction in which the data line extends.
5. The display panel according to claim 2, wherein the third and fourth spacings extend in the data line direction, respectively; the third intervals and the fourth intervals are alternately arranged along the scanning line direction.
6. The display panel according to claim 5, wherein a size of the third space is not less than 11 μm and a size of the fourth space is not less than 3 μm in the scan line extending direction.
7. The display panel according to claim 1, wherein the first substrate further includes a pixel electrode located in the sub-pixel region, an insulating film layer located under the pixel electrode, and a first thin film transistor located under the insulating film layer, and the first thin film transistor is located in the first space or the fifth space, the first thin film transistor being electrically connected to the pixel electrode through a via hole provided in the insulating film layer.
8. The display panel according to claim 7, wherein the aperture of the via hole is 3.0-5.0 μm, the distance between each via hole is not less than 4 μm, and the distance between the via hole and the adjacent sub-pixel region is not less than 4 μm.
9. The display panel according to claim 1, wherein the sub-pixel regions arranged in the scan line direction include a red sub-pixel region, a green sub-pixel region, and a blue sub-pixel region repeatedly arranged in order.
10. The display panel according to claim 1, wherein the sub-pixel regions arranged in the scan line direction include a red sub-pixel region, a green sub-pixel region, a blue sub-pixel region, and a white sub-pixel region repeatedly arranged in order.
11. The display panel according to claim 1, wherein the light shielding layer includes a spacer shielding region corresponding to the spacer, and a size of at least a portion of the spacer shielding region is smaller than or equal to a size of the first space along the data line extending direction.
12. The display panel of claim 1, wherein the spacers can be any one or more of conical, truncated cone, cylindrical, rectangular, and elliptical.
13. The display panel according to claim 1, wherein the spacers include main spacers and auxiliary spacers, the main spacers have a height greater than that of the auxiliary spacers, and the main spacers and the auxiliary spacers are alternately arranged in a regular pattern along the scan line direction.
14. The display panel according to claim 2, wherein the spacers include main spacers and auxiliary spacers, the main spacers have a height greater than that of the auxiliary spacers, and the main spacers and the auxiliary spacers are alternately arranged in a regular pattern in the scan line direction and the data line direction.
15. A display device characterized by comprising the display panel according to any one of claims 1 to 14.
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