CN114236928B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN114236928B CN114236928B CN202111583109.9A CN202111583109A CN114236928B CN 114236928 B CN114236928 B CN 114236928B CN 202111583109 A CN202111583109 A CN 202111583109A CN 114236928 B CN114236928 B CN 114236928B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- Crystallography & Structural Chemistry (AREA)
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- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
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Abstract
The embodiment of the application provides a display panel and a display device. The display panel comprises an array substrate and an opposite substrate arranged opposite to the array substrate in a box; the array substrate comprises a plurality of grid lines, a plurality of data lines, a plurality of sub-pixel areas defined by the crossing of the grid lines and the data lines, and a thin film transistor and a pixel electrode which are positioned in each sub-pixel area, wherein the thin film transistor comprises a drain electrode connected with the pixel electrode; the opposite substrate comprises a shading layer and a plurality of sub-pixel light transmission areas defined by the shading layer, wherein the sub-pixel light transmission areas correspond to the sub-pixel areas one by one; in the direction of extending the grid line, every three sub-pixel areas form a pixel area, and when the drain electrode slides between the array substrate and the opposite substrate along the direction of the grid line in at least one sub-pixel area of the pixel area, the orthographic projection of the drain electrode on the opposite substrate is partially overlapped with the corresponding or adjacent sub-pixel light transmission area.
Description
Technical Field
The present application relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
This section provides merely background information related to the present disclosure and is not necessarily prior art.
As a currently mainstream flat panel display mode, a liquid crystal display device has advantages of light weight, thin profile, low power consumption, and the like, and is widely used in modern signal devices such as televisions, computers, mobile phones, digital cameras, and the like.
In the related art, in the liquid crystal display product with high PPI (pixel density), due to the smaller Pixels, the single Main spacer (Main PS) has smaller size, and when the liquid crystal display Panel (Panel) is pressed, the first substrate and the second substrate are easy to relatively Shift in the direction parallel to the display Panel, that is, shift (Shift), at this time, the Main spacer (Main PS) is easy to scratch into the light-transmitting area of the sub-pixel, so that the alignment layer PI on the first substrate located in the sub-pixel is damaged, the alignment disorder occurs, the normal display of the sub-pixel is affected, and the Mura (for example, red/blue spots) appears. To improve PS Mura, the Black Matrix (BM) around the Main spacer (Main PS) is usually widened, and the sliding boundary (Margin) of the Main spacer (Main PS) is increased. However, this modification causes a problem in that color shift occurs in the liquid crystal display panel after being pressed.
Disclosure of Invention
The embodiment of the application provides a display panel, a manufacturing method thereof and a display device, which are used for improving the color cast problem of the display panel after being pressed due to the widening of a black matrix and improving the display quality of the display panel. The specific technical content is as follows:
in a first aspect, an embodiment of the present application provides a display panel, including an array substrate and an opposite substrate disposed opposite to the array substrate;
the array substrate comprises a plurality of grid lines, a plurality of data lines, a plurality of sub-pixel areas defined by the grid lines and the data lines in a crossing mode, and a thin film transistor and a pixel electrode which are positioned in each sub-pixel area, wherein the thin film transistor comprises a drain electrode connected with the pixel electrode;
the opposite substrate comprises a shading layer and a plurality of sub-pixel light transmission areas defined by the shading layer, wherein the sub-pixel light transmission areas correspond to the sub-pixel areas one by one up and down;
and in the direction of extending the grid line, every three sub-pixel areas form a pixel area, and when the drain electrode slides between the array substrate and the opposite substrate along the direction of the grid line in at least one sub-pixel area of the pixel area, the orthographic projection of the drain electrode on the opposite substrate is partially overlapped with the corresponding or adjacent sub-pixel light transmission area.
The display panel according to the embodiment of the application may further have the following additional technical features:
in some embodiments of the application, the sub-pixel light transmissive region includes a first boundary adjacent to the drain electrode; the drain electrode includes a second boundary adjacent to the subpixel transmissive region, the second boundary coinciding with the first boundary.
In some embodiments of the application, in the at least one sub-pixel region, a second boundary of the drain electrode has a section that is not parallel to the gate line.
In some embodiments of the application, the areas of the drains in at least two of the sub-pixel regions are different in the pixel region.
In some embodiments of the application, the subpixel transmissive area further comprises a third boundary opposite the first boundary, the third boundary having a section non-parallel to the gate line.
In some embodiments of the present application, in the pixel region, the three sub-pixel regions are a first color sub-pixel region, a second color sub-pixel region, and a third color sub-pixel region, the first to third color sub-pixel regions are sequentially distributed along a gate line extending direction, a first section non-parallel to the gate line exists at a second boundary of the drain electrode in the first color sub-pixel region, a second section non-parallel to the gate line exists at a second boundary of the drain electrode in the second color sub-pixel region, and the first section is distributed adjacent to the second section.
In some embodiments of the application, the subpixel transmissive area further comprises a third boundary opposite the first boundary, the third boundary having a section non-parallel to the gate line.
In some embodiments of the application, the area of the drain electrode within the third color sub-pixel region is greater than the areas of the drain electrodes within the first and second color sub-pixel regions.
In some embodiments of the present application, the drain electrode in the sub-pixel region of the third color has a convex shape, and a convex portion of the drain electrode faces the sub-pixel light-transmitting region.
In some embodiments of the application, the light shielding layer is a black matrix.
In some embodiments of the present application, the thin film transistor further includes a gate electrode, an active layer, and a source electrode, the gate line is connected to the gate electrode, and the source electrode is connected to the data line.
In a second aspect, embodiments of the present application also provide a display device including the display panel according to any one of the first aspects.
The embodiment of the application has the beneficial effects that:
in the display panel provided by the embodiment of the application, a plurality of sub-pixel areas and a plurality of sub-pixel light-transmitting areas are in one-to-one correspondence up and down, a thin film transistor and a pixel electrode are arranged in each sub-pixel area, the thin film transistor comprises a drain electrode connected with the pixel electrode, each three sub-pixel areas form a pixel area along the extending direction of a grid line, and when the drain electrode slides between an array substrate and a counter substrate along the direction of the grid line in at least one sub-pixel area of the pixel area, the orthographic projection of the drain electrode on the counter substrate is partially overlapped with the corresponding or adjacent sub-pixel light-transmitting area. In order to improve PS Mura, a peripheral shading layer of a spacer is usually widened, and a sliding boundary of the spacer is increased, so that a light-transmitting region of a sub-pixel is in an asymmetric structure, when the liquid crystal display panel is pressed, an array substrate and a counter substrate slide left/right, a large difference exists between areas of the light-transmitting regions of the adjacent two sub-pixels, that is, a large difference in transmittance of the light-transmitting regions of the adjacent two sub-pixels, so that the liquid crystal display panel has obvious color shift, the display quality of the liquid crystal display panel is reduced, and in the display panel in the embodiment of the application, when the drain electrode slides between the array substrate and the counter substrate along the direction of a grid line, the orthographic projection of the drain electrode on the counter substrate partially overlaps with the corresponding or adjacent sub-pixel light-transmitting region, that is, the overlapping part of the drain electrode and the sub-pixel light-transmitting region can compensate for the difference in area of the light-transmitting region of the adjacent two sub-pixels, which is blocked by a data line, so that the difference in area of the light-transmitting region of the adjacent two sub-pixels, which is blocked by the data line, is reduced, the color shift of the display panel after the pressed by the shading layer is widened, is improved. In addition, the display panel of the embodiment of the application can be applied to a display device, so that the display quality of the display device can be improved.
Of course, it is not necessary for any one product or method of practicing the application to achieve all of the advantages set forth above at the same time.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the related art, the drawings that are required to be used in the description of the embodiments of the present application or the related technologies are briefly described below. It is evident that the drawings in the following description are only some embodiments of the present application and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art.
FIG. 1 is a schematic diagram of a display panel in the related art;
FIG. 2a is a schematic diagram of the opposite substrate of the display panel of FIG. 1 after sliding to the left relative to the array substrate;
FIG. 2b is a schematic diagram of the opposite substrate of the display panel of FIG. 1 after sliding to the right with respect to the array substrate;
fig. 3 is a schematic view of a display panel according to some embodiments of the application.
Detailed Description
Embodiments of the technical scheme of the present application will be described in detail below with reference to the accompanying drawings. The following examples are only for more clearly illustrating the technical aspects of the present application, and thus are merely examples, and are not intended to limit the scope of the present application.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "comprising" and "having" and any variations thereof in the description of the application and the claims and the description of the drawings above are intended to cover a non-exclusive inclusion.
In the description of embodiments of the present application, the technical terms "first," "second," and the like are used merely to distinguish between different objects and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated, a particular order or a primary or secondary relationship. In the description of the embodiments of the present application, the meaning of "plurality" is two or more unless explicitly defined otherwise.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
In the description of the embodiments of the present application, the term "and/or" is merely an association relationship describing an association object, and indicates that three relationships may exist, for example, a and/or B may indicate: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
In the description of the embodiments of the present application, the term "plurality" means two or more (including two), and similarly, "plural sets" means two or more (including two), and "plural sheets" means two or more (including two).
In the description of the embodiments of the present application, the orientation or positional relationship indicated by the technical terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. are based on the orientation or positional relationship shown in the drawings, and are merely for convenience of description and simplification of the description, and do not indicate or imply that the apparatus or element referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the embodiments of the present application.
In the description of the embodiments of the present application, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured" and the like should be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally formed; or may be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the embodiments of the present application will be understood by those of ordinary skill in the art according to specific circumstances.
It is noted that in the drawings, the size of layers and regions may be exaggerated for clarity of illustration. Moreover, it will be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or intervening layers may be present. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it can be directly under the other element or intervening layers or elements may be present. In addition, it will be understood that when a layer or element is referred to as being "between" two layers or elements, it can be the only layer between the two layers or elements, or more than one intervening layer or element may also be present. Like reference numerals refer to like elements throughout.
At present, as a currently mainstream flat panel display mode, a liquid crystal display device has advantages of light weight, thin thickness, low power consumption, and the like, and is widely used in modern signal devices such as televisions, computers, mobile phones, digital cameras, and the like. As shown in fig. 1, a top view of a high pixel density liquid crystal display panel 100' in the related art is shown. Fig. 2a is a schematic diagram showing a structure in which the counter substrate of the liquid crystal display panel is shifted to the right with respect to the array substrate, and fig. 2b is a schematic diagram showing a structure in which the counter substrate of the liquid crystal display panel is shifted to the left with respect to the array substrate.
As shown in fig. 1, the liquid crystal display panel 100 ' includes an array substrate 110 ', a counter substrate (not shown) and a liquid crystal layer (not shown) disposed between the array substrate 110 ' and the counter substrate, the array substrate 110 ' includes a gate line 111 ', a data line 112 ', a thin film transistor 113 ' and a pixel electrode 114 ', a plurality of gate lines and a plurality of data lines are disposed on the array substrate 110 ' to cross each other to define a plurality of sub-pixel regions 115 ', a thin film transistor 113 ' and a pixel electrode 114 ' are disposed in each sub-pixel region 115 ', a drain 1131 ' of the thin film transistor 113 ' is connected to the pixel electrode 114 ', the counter substrate includes a light shielding layer 121 ' and a plurality of sub-pixel light-transmitting regions 122 ' defined by the light shielding layer 121 ', and the plurality of sub-pixel regions 115 ' and the plurality of sub-pixel light-transmitting regions 122 ' are in one-to-one correspondence. In order to maintain the thickness of the liquid crystal display panel 100 ' uniform (i.e., the thickness of the liquid crystal layer is substantially uniform), it is generally necessary to provide spacers 130 ' on the opposite substrate side facing the array substrate 110 '. For example, as shown in fig. 1, the surface of the spacer 130 'facing the array substrate 110' is in contact with the data line provided on the array substrate 110 ', and functions to position the thickness of the liquid crystal display panel 100'.
It should be understood that the spacer 130 ' may be abutted against the gate line or the thin film transistor 113 ' of the array substrate 110 ' in addition to the data line 112 ' of the array substrate 110 '. A Main spacer and an auxiliary spacer are disposed between the array substrate 110' and the opposite substrate, the Main spacer is usually in the form of a support column called Main support column (Main-PS), and correspondingly, the auxiliary spacer may also be in the form of a support column called auxiliary support column (Sub-PS), and the height of the auxiliary spacer is smaller than that of the Main spacer. The spacer in the related art is referred to as a main spacer.
However, for the lcd panel with high pixel density, since the sub-pixels are smaller, the size of the single spacer 130 ' is smaller, when the lcd panel 100 ' is pressed, the relative displacement, i.e., the Shift (Shift), between the array substrate 110 ' and the opposite substrate in the direction parallel to the display panel easily occurs, and at this time, the spacer 130 ' is easily marked into the sub-pixel light-transmitting region 122 ', so that the alignment layer PI on the array substrate 110 ' located in the sub-pixel region 115 ' is damaged, the alignment disorder occurs, the normal display of the sub-pixel is affected, and PS Mura (for example, expressed as red/blue spots) occurs. In order to improve PS Mura, a peripheral Black Matrix (BM) of a spacer is usually widened, a sliding boundary (Margin) of the spacer is increased, for example, as shown in fig. 1, a corner of the black matrix, which is close to the spacer 130 ', is increased and reflected on a sub-pixel light-transmitting area 122 ' defined by the black matrix, that is, the sub-pixel light-transmitting area 122 ' is in an asymmetric structure, so that when the liquid crystal display panel is pressed, an array substrate and a counter substrate slide left/right, there is a large difference in the area of shielding the adjacent two sub-pixel light-transmitting areas 122 ' by a data line, that is, the difference in transmittance of the adjacent two sub-pixel light-transmitting areas 122 ' is large, so that the liquid crystal display panel 100 ' has obvious color shift, and the display quality of the liquid crystal display panel 100 ' is reduced.
Based on the above-mentioned problems, the present application provides a display panel and a display device, so as to improve the color shift problem of the display panel after being pressed due to widening of the black matrix, and improve the display quality of the display panel.
As shown in fig. 3, an embodiment of the first aspect of the present application provides a display panel 100, including an array substrate 110 and an opposite substrate (not shown) disposed opposite to the array substrate; the array substrate 110 includes a plurality of gate lines 111, a plurality of data lines 112, a plurality of sub-pixel regions 115 defined by the intersections of the plurality of gate lines 111 and the plurality of data lines 112, and a thin film transistor 113 and a pixel electrode 114 within each sub-pixel region, the thin film transistor 113 including a drain electrode 1131 connected to the pixel electrode 114; the opposite substrate comprises a light shielding layer 121 and a plurality of sub-pixel light transmission areas 122 defined by the light shielding layer 121, wherein the sub-pixel light transmission areas 122 are in one-to-one correspondence with the sub-pixel areas 115; in the direction in which the gate line 111 extends, each three sub-pixel regions 115 forms one pixel region 140, and when the drain electrode 1131 slides between the array substrate 110 and the opposite substrate along the gate line 111 in at least one sub-pixel region 115 of the pixel region 140, the orthographic projection of the drain electrode 1131 on the opposite substrate overlaps with the corresponding or adjacent sub-pixel light transmitting region 122.
In the display panel 100 provided by the embodiment of the application, the plurality of sub-pixel regions 115 and the plurality of sub-pixel light-transmitting regions 122 are in one-to-one correspondence up and down, the thin film transistor 113 and the pixel electrode 114 are disposed in each sub-pixel region 115, the thin film transistor 113 includes the drain electrode 1131 connected with the pixel electrode 114, and each three sub-pixel regions 115 form one pixel region 140 along the extending direction of the gate line 111, and when the drain electrode 1131 slides between the array substrate 110 and the opposite substrate along the direction of the gate line 111 in at least one sub-pixel region 115 of the pixel region 140, the orthographic projection of the drain electrode 1131 on the opposite substrate is partially overlapped with the corresponding or adjacent sub-pixel light-transmitting region 122. In this way, when the display panel 100 slides along the gate line direction, the overlapping portion of the drain electrode 1131 and the sub-pixel light-transmitting region 122 compensates for the area difference of the adjacent two sub-pixel light-transmitting regions 122 blocked by the data line 112, so as to reduce the area difference of the adjacent two sub-pixel light-transmitting regions 122 blocked by the data line 112, further improve the color shift problem of the display panel 100 after being pressed due to the widening of the light shielding layer 121, and improve the display quality of the display panel 100.
In some embodiments of the present application, the sub-pixel light transmissive region 122 includes a first boundary 1221 adjacent to the drain electrode 1131; the drain electrode 1131 includes a second boundary 1131-1 adjacent to the sub-pixel light transmitting region 122, the second boundary 1131-1 coinciding with the first boundary 1221. In this way, the area of the drain electrode 1131 is increased, when the first boundary 1221 of the sub-pixel light-transmitting region 122 and the gate line 111 have non-parallel sections, and the array substrate 110 and the opposite substrate slide along the direction of the gate line 111, the orthographic projection of the drain electrode 1131 in the sub-pixel region 115 on the opposite substrate may partially overlap with the corresponding sub-pixel light-transmitting region 122, so as to compensate the area difference of the adjacent two sub-pixel light-transmitting regions 122 blocked by the data line 112, and further improve the color cast problem of the display panel 100 after being pressed due to the widening of the light shielding layer 121, and improve the display quality of the display panel 100.
In some embodiments of the present application, within at least one subpixel region 115, a second boundary 1131-1 of drain electrode 1131 exists for a section that is not parallel to gate line 111. Since the second boundary 1131-1 of the drain electrode 1131 coincides with the first boundary 1221 of the sub-pixel light-transmitting region 122, when the second boundary 1131-1 of the drain electrode 1131 has a section that is not parallel to the gate line 111, the first boundary 1221 of the sub-pixel light-transmitting region 122 also has a section that is not parallel to the gate line 111, so that when the array substrate 110 and the opposite substrate slide along the gate line 111, the front projection of the drain electrode 1131 in the sub-pixel region 115 on the opposite substrate may partially overlap with the corresponding sub-pixel light-transmitting region 122, thereby compensating the area difference of the two adjacent sub-pixel light-transmitting regions 122 blocked by the data line 112, and further improving the color cast problem of the display panel 100 after being pressed due to the widening of the light-shielding layer 121, and improving the display quality of the display panel 100.
In some embodiments of the present application, the areas of the drain electrode 113 in at least two sub-pixel regions 115 are different in the pixel region 140. Since the second boundary 1131-1 of the drain electrode 1131 coincides with the first boundary 1221 of the sub-pixel light-transmitting region 122, when the areas of the drain electrodes 113 in the at least two sub-pixel regions 115 are different, the distances from the first boundary 1221 of the at least two sub-pixel light-transmitting regions 122 to the gate line 111 are different, so that when the array substrate 110 and the opposite substrate slide along the gate line 111, the orthographic projection of the drain electrode 1131 in the sub-pixel region 115 on the opposite substrate can partially overlap with the adjacent sub-pixel light-transmitting regions 122, thereby compensating the difference of the areas of the adjacent two sub-pixel light-transmitting regions 122 blocked by the data line 112, further improving the color cast problem of the display panel 100 after being pressed due to the widening of the light shielding layer 121, and improving the display quality of the display panel 100.
In some embodiments of the present application, the sub-pixel light transmissive region 122 further includes a third boundary 1222 opposite the first boundary 1221, the third boundary 1222 having a section non-parallel to the gate line 111. Thus, the light shielding layer 121 can be widened along the direction of the data line 112, so that the sliding boundary of the spacer is increased, and the PS Mura is effectively improved.
In some embodiments of the present application, in the pixel region 140, the three sub-pixel regions 115 are a first color sub-pixel region, a second color sub-pixel region, and a third sub-pixel region, respectively, the first, second, and third color sub-pixel regions are sequentially distributed along the extending direction of the gate line 111, a first section non-parallel to the gate line 111 exists at a second boundary of the drain electrode in the first color sub-pixel region, a second section non-parallel to the gate line 111 exists at a second boundary of the drain electrode in the second color sub-pixel region, and the first section is adjacent to the second section. It should be understood that the first color sub-pixel region may be a red sub-pixel region, the second color sub-pixel region may be a blue sub-pixel region, and the third color sub-pixel region may be a green sub-pixel region. Since the human eyes are most sensitive to green, the spacers are generally located between the red and blue sub-pixels, that is, the spacers are located between the first color sub-pixel region and the second color sub-pixel region, and the second boundary of the drain electrode in the first color sub-pixel region has a first section non-parallel to the gate line 111, and the second boundary of the drain electrode in the second color sub-pixel region has a second section non-parallel to the gate line 111, and the first section and the second section are distributed adjacently, so that not only the sliding boundary of the spacers can be increased, but also the PS Mura can be effectively improved, and the orthographic projection of the drain electrode 1131 in the sub-pixel region 115 on the opposite substrate can be partially overlapped with the corresponding sub-pixel light-transmitting region 122 when the array substrate slides relative to the opposite substrate, so as to compensate the difference of the areas of the adjacent two sub-pixel light-transmitting regions 122, which are blocked by the data line 112, thereby improving the color shift problem of the display panel 100 after being pressed due to widening the light shielding layer 121, and improving the display quality of the display panel 100.
In some embodiments of the present application, the sub-pixel light transmissive region 122 further includes a third boundary 1222 opposite the first boundary 1221, the third boundary 1222 having a section non-parallel to the gate line 111. Thus, the light shielding layer 121 can be widened along the direction of the data line 112, so that the sliding boundary of the spacer is increased, and the PS Mura is effectively improved.
In some embodiments of the application, the area of the drain electrode in the third color sub-pixel region is larger than the areas of the drain electrodes in the first red sub-pixel region and the second sub-pixel region. In this way, when the array substrate 110 slides along the gate line direction relative to the opposite substrate, the difference of the areas of the three sub-pixel light transmitting areas corresponding to the first to third color sub-pixel areas blocked by the data lines can be reduced, so as to improve the color cast problem of the display panel 100.
In some embodiments of the present application, the drain electrode in the third sub-pixel region has a convex shape, and the convex portion of the drain electrode faces the sub-pixel light transmitting region 122. In this way, when the array substrate 110 slides along the gate line direction relative to the opposite substrate, the difference of the areas of the three sub-pixel light transmitting areas corresponding to the first to third color sub-pixel areas blocked by the data line can be further reduced, so as to effectively improve the color cast problem of the display panel 100.
In some embodiments of the present application, the light shielding layer 121 may be a black matrix.
In some embodiments of the present application, the array substrate 110 includes a first substrate and a common electrode, the thin film transistor 113 is disposed on the first substrate, the thin film transistor 113 further includes a gate electrode, an active layer, and a source electrode, the gate line is connected to the gate electrode, the source electrode is connected to the data line, and the common electrode and the pixel electrode are disposed opposite to each other. The first substrate base plate is typically made of glass.
In some embodiments of the present application, a PVX protective layer is disposed between the common electrode and the pixel electrode 114.
In some embodiments of the present application, the opposite substrate further includes a second substrate and a color resist unit, the light shielding layer 121 is disposed on a side of the second substrate, which is close to the array substrate 110, the color resist unit is disposed in the sub-pixel light-transmitting region, the color resist unit may include a first color resist, a second color resist, and a third color resist, the first color resist may be a red resist, the second color resist may be a green resist, and the third color resist may be a blue resist.
In some embodiments of the present application, a liquid crystal layer is disposed between the array substrate 110 and the opposite substrate.
In some embodiments of the present application, the display panel 100 further includes a first alignment layer disposed on a side of the array substrate 110 adjacent to the liquid crystal layer, and a second alignment layer disposed on a side of the opposite substrate adjacent to the liquid crystal layer, the first alignment layer and the second alignment layer cooperatively controlling an initial array direction of the liquid crystal layer.
In a second aspect, embodiments of the present application also provide a display device comprising the display panel 100 according to any one of the first aspects.
The specific type of the display device is not particularly limited, and the type of the display device commonly used in the art may be, for example, a mobile device such as a mobile phone, a VR device, etc., and those skilled in the art may select the display device accordingly according to the specific application of the display device, which is not described herein.
It should be noted that, the display device includes other necessary components and components besides the display panel, so that the display device can be correspondingly supplemented by a person skilled in the art according to specific use requirements of the display device for the purpose of, for example, a housing, a circuit board, a power cord, etc., which are not described herein.
Compared with the prior art, the display device provided by the embodiment of the application has the same beneficial effects as the display panel provided by the embodiment, and is not repeated here.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In this specification, each embodiment is described in a related manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments.
The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application are included in the protection scope of the present application.
Claims (12)
1. The display panel is characterized by comprising an array substrate and an opposite substrate which is arranged opposite to the array substrate;
the array substrate comprises a plurality of grid lines, a plurality of data lines, a plurality of sub-pixel areas defined by the grid lines and the data lines in a crossing mode, and a thin film transistor and a pixel electrode which are positioned in each sub-pixel area, wherein the thin film transistor comprises a drain electrode connected with the pixel electrode;
the opposite substrate comprises a shading layer and a plurality of sub-pixel light transmission areas defined by the shading layer, wherein the sub-pixel light transmission areas correspond to the sub-pixel areas one by one up and down;
and in the direction of extending the grid line, every three sub-pixel areas form a pixel area, and when the drain electrode slides between the array substrate and the opposite substrate along the direction of the grid line in at least one sub-pixel area of the pixel area, the orthographic projection of the drain electrode on the opposite substrate is partially overlapped with the corresponding or adjacent sub-pixel light transmission area.
2. The display panel of claim 1, wherein the subpixel transmissive region comprises a first boundary adjacent to the drain; the drain electrode includes a second boundary adjacent to the subpixel transmissive region, the second boundary coinciding with the first boundary.
3. The display panel of claim 2, wherein within the at least one subpixel region, a second boundary of the drain electrode presents a section that is non-parallel to the gate line.
4. The display panel according to claim 2, wherein areas of drains in at least two of the sub-pixel regions are different in the pixel region.
5. A display panel according to claim 3, wherein the sub-pixel light transmissive region further comprises a third boundary opposite the first boundary, the third boundary having a section non-parallel to the gate line.
6. The display panel according to claim 2, wherein in the pixel region, three of the sub-pixel regions are a first color sub-pixel region, a second color sub-pixel region, and a third sub-pixel region, respectively, the first to third color sub-pixel regions are sequentially distributed along a gate line extending direction, a first section non-parallel to the gate line exists at a second boundary of the drain electrode in the first color sub-pixel region, a second section non-parallel to the gate line exists at a second boundary of the drain electrode in the second color sub-pixel region, and the first section is distributed adjacent to the second section.
7. The display panel of claim 6, wherein the subpixel transmissive region further comprises a third boundary opposite the first boundary, the third boundary having a section non-parallel to the gate line.
8. The display panel of claim 7, wherein an area of a drain electrode within the third color sub-pixel region is greater than an area of the drain electrode within the first and second color sub-pixel regions.
9. The display panel of claim 8, wherein the drain electrode in the third sub-pixel region has a convex shape, and a convex portion of the drain electrode faces the sub-pixel light transmitting region.
10. The display panel of claim 1, wherein the light shielding layer is a black matrix.
11. The display panel according to claim 1, wherein the thin film transistor further comprises a gate electrode, an active layer, and a source electrode, wherein the gate line is connected to the gate electrode, and wherein the source electrode is connected to the data line.
12. A display device comprising the display panel according to any one of claims 1 to 11.
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CN113767323A (en) * | 2020-04-01 | 2021-12-07 | 京东方科技集团股份有限公司 | Array substrate and display device |
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