CN107065370B

CN107065370B - Display panel and display device

Info

Publication number: CN107065370B
Application number: CN201710474014.0A
Authority: CN
Inventors: 杜凌霄; 杨康; 柴慧平
Original assignee: Shanghai Tianma Microelectronics Co Ltd
Current assignee: Shanghai Tianma Microelectronics Co Ltd
Priority date: 2017-06-21
Filing date: 2017-06-21
Publication date: 2020-08-18
Anticipated expiration: 2037-06-21
Also published as: CN107065370A

Abstract

The embodiment of the invention provides a display panel and a display device, relates to the technical field of display, and can reduce the diffraction degree during transparent display so as to reduce the adverse effect of diffraction on the transparent display effect. The display panel includes: the array substrate and the color film substrate are arranged opposite to the array substrate; the array substrate comprises a plurality of pixel electrodes distributed in a matrix manner; the array substrate further comprises a grid line corresponding to each row of the pixel electrodes; each column of the pixel electrodes comprises a plurality of adjacent pixel electrode groups, and each pixel electrode group only comprises two adjacent pixel electrodes; two grid lines are arranged between every two adjacent rows of the pixel electrode groups; in each pixel electrode group, the area between two pixel electrodes is a first area; a black matrix is arranged on the color film substrate; the projection of the black matrix on the array substrate is not overlapped with the first area. The technical scheme is mainly used for transparent display.

Description

Display panel and display device

[ technical field ] A method for producing a semiconductor device

The invention relates to the technical field of display, in particular to a display panel and a display device.

[ background of the invention ]

With the continuous development of display technologies, the functions and applicable scenes of display products are increasing, for example, transparent display products have appeared, which not only can realize the display function, but also can enable users to see the back of the display products through the display products.

The present liquid crystal transparent display product includes a plurality of sub-pixel units, wherein some sub-pixel units are used for implementing a display function, and other sub-pixel units are used for implementing a transparent function. Each sub-pixel unit is surrounded by a black matrix for shielding light-impermeable members such as signal lines and thin film transistors. However, when the transparent display function is implemented, due to the arrangement of the black matrix, a diffraction phenomenon occurs when light passes through the transparent sub-pixel unit, thereby adversely affecting the transparent display effect.

[ summary of the invention ]

In view of this, embodiments of the present invention provide a display panel and a display device, which can reduce the diffraction degree during transparent display, thereby reducing the adverse effect of diffraction on the transparent display effect.

In one aspect, an embodiment of the present invention provides a display panel, including:

the array substrate and the color film substrate are arranged opposite to the array substrate;

the array substrate comprises a plurality of pixel electrodes distributed in a matrix manner;

the array substrate further comprises a grid line corresponding to each row of the pixel electrodes;

each column of the pixel electrodes comprises a plurality of adjacent pixel electrode groups, and each pixel electrode group only comprises two adjacent pixel electrodes;

two grid lines are arranged between every two adjacent rows of the pixel electrode groups;

in each pixel electrode group, the area between two pixel electrodes is a first area;

a black matrix is arranged on the color film substrate;

the projection of the black matrix on the array substrate is not overlapped with the first area.

Optionally, a region between two adjacent pixel electrode groups in the column direction is a second region, and the second region is a first sub-region or a second sub-region;

the display panel further includes a thin film transistor corresponding to each of the pixel electrodes;

the orthographic projection of the thin film transistor on the array substrate is not overlapped with the second sub-area;

the width of the orthographic projection of the black matrix in the first sub-area on the array substrate in the column direction is larger than the width of the orthographic projection of the black matrix in the second sub-area on the array substrate in the column direction.

Optionally, the plurality of pixel electrodes include a plurality of adjacent column combinations, each column combination is composed of a first column of pixel electrodes and a second column of pixel electrodes which are sequentially and adjacently arranged along the same direction;

the first sub-regions are all located on the first column of pixel electrodes, and the second sub-regions are all located on the second column of pixel electrodes.

Optionally, the plurality of pixel electrodes include a plurality of adjacent column combinations, each column combination is composed of a first column of pixel electrodes, a second column of pixel electrodes, a third column of pixel electrodes and a fourth column of pixel electrodes which are sequentially and adjacently arranged along the same direction;

the first sub-regions are located on the first column of pixel electrodes and the second column of pixel electrodes, and the second sub-regions are located on the third column of pixel electrodes and the fourth column of pixel electrodes.

Optionally, in each column of the pixel electrodes, the first sub-region and the second sub-region are sequentially arranged at intervals along a column direction;

in any two adjacent columns of the pixel electrodes, two adjacent second regions in the row direction are the first sub-region and the second sub-region respectively.

Optionally, in the row direction, four thin film transistors are disposed between any two adjacent second sub-regions;

the four thin film transistors are staggered with each other in the row direction.

Optionally, distances between orthographic projections of any two adjacent second areas of the black matrix in the column direction on the array substrate are all equal.

Optionally, the forward projection area of the black matrix in each first sub-region on the array substrate is equal;

the forward projection area of the black matrix in each second sub-area on the array substrate is equal.

Optionally, a region between two adjacent pixel electrode groups in the column direction is a third region, and the third region is a third sub-region or a fourth sub-region;

the orthographic projection of the thin film transistor on the array substrate is not overlapped with the fourth sub-area;

the orthographic projection of the black matrix on the array substrate is overlapped with the third sub-area;

the orthographic projection of the black matrix on the array substrate is not overlapped with the fourth sub-area.

Optionally, in each column of the pixel electrodes, the third sub-region and the fourth sub-region are sequentially arranged at intervals along a column direction;

in any two adjacent columns of the pixel electrodes, two of the third regions adjacent in the row direction are divided into the third sub-region and the fourth sub-region.

Optionally, in the row direction, four thin film transistors are disposed between any two adjacent fourth sub-regions;

Optionally, a color filter layer is disposed on the color film substrate, and the color green layer includes a red filter layer, a blue filter layer, a green filter layer, and a white filter layer.

On the other hand, an embodiment of the present invention further provides a display device, including the display panel.

According to the display panel and the display device, only two grid lines are arranged between every two rows of pixel electrodes, and the transverse black matrix is not arranged between the two rows of pixel electrodes.

[ description of the drawings ]

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive labor.

FIG. 1 is a schematic cross-sectional view illustrating a display panel according to an embodiment of the present invention;

FIG. 2 is a top view of the array substrate of FIG. 1;

fig. 3 is a top view of a color filter substrate corresponding to the array substrate in fig. 2;

FIG. 4 is a top view of the display panel corresponding to the color film substrate of FIG. 3;

FIG. 5 is an enlarged schematic view of a portion of the display panel of FIG. 4;

fig. 6 is another top view of the color filter substrate in fig. 1;

FIG. 7 is a top view of a display panel corresponding to the color film substrate of FIG. 6;

fig. 8 is another top view of the color filter substrate of fig. 1;

FIG. 9 is a top view of the display panel corresponding to the color film substrate of FIG. 8;

fig. 10 is a partially enlarged schematic view of the array substrate of fig. 4 or 9;

fig. 11 is another top view of the color filter substrate of fig. 1;

FIG. 12 is a top view of the display panel corresponding to the color film substrate of FIG. 11;

fig. 13 is a partially enlarged view of the array substrate of fig. 12;

fig. 14 is a schematic structural diagram of a display device according to an embodiment of the invention.

[ detailed description ] embodiments

For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.

It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.

As shown in fig. 1, fig. 1 is a schematic cross-sectional structure diagram of a display panel according to an embodiment of the present invention, and an embodiment of the present invention provides a display panel including: the liquid crystal display panel comprises an array substrate 100 and a color film substrate 200 arranged opposite to the array substrate 100, wherein a liquid crystal layer 300 is arranged between the array substrate 100 and the color film substrate 200; as shown in fig. 2, fig. 2 is a top view of the array substrate of fig. 1, the array substrate 100 includes a plurality of pixel electrodes 1 distributed in a matrix; the array substrate 100 further includes a gate line 2 corresponding to each row of the pixel electrodes 1; each column of pixel electrodes 1 includes a plurality of adjacent pixel electrode groups 10a, each pixel electrode group 10a includes only two adjacent pixel electrodes 1; two grid lines 2 are arranged between every two adjacent rows of pixel electrode groups 10 a; in each pixel electrode group 10a, an area between two pixel electrodes 1 is a first area 11; as shown in fig. 3, fig. 3 is a top view of a color filter substrate corresponding to the array substrate in fig. 2, and a black matrix 3 is disposed on the color filter substrate 200; the projection of the black matrix 3 on the array substrate 100 does not overlap the first region 11.

Specifically, the gate line 2 is used for transmitting a scan signal, and charges each pixel electrode 1 in the display panel in response to the scan signal, so that an electric field is formed between the pixel electrode 1 and a common electrode (not shown in the figure) to realize a display function. Two gate lines 2 are arranged between every two adjacent rows of pixel electrode groups 10a, that is, two gate lines 2 are arranged every two rows of pixel electrodes 1, so that no gate line 2 needs to be arranged between two pixel electrodes 1 in each pixel electrode group 10a, and because the main function of the black matrix 3 is to shield the signal line, based on the arrangement mode of the gate lines 2 in fig. 2, as shown in fig. 2 and 3, in each row of pixel electrode groups 10a, no transverse black matrix 3 is arranged between two adjacent rows of pixel electrodes 1, and only between two adjacent rows of pixel electrode groups 10a, the black matrix 3 is arranged to shield two rows of gate lines 2.

According to the display panel in the embodiment of the invention, only two grid lines are arranged between every two rows of pixel electrodes, and the transverse black matrix is not arranged between the two rows of pixel electrodes.

Alternatively, as shown in fig. 3, 4 and 5, fig. 4 is a top view of the display panel corresponding to the color film substrate in fig. 3, fig. 5 is an enlarged schematic view of a partial region of the display panel in fig. 4, a region between two adjacent pixel electrode sets in the column direction is a second region 12, and the second region 12 is a first sub-region 101 or a second sub-region 102; the display panel further includes a thin film transistor 4 corresponding to each pixel electrode 1; the orthographic projection of the thin film transistor 4 on the array substrate is not overlapped with the second sub-area 102; the width d1 of the black matrix 3 in the column direction, which is orthographic projected in the first sub-area 101 on the array substrate, is greater than the width d2 of the black matrix 3 in the column direction, which is orthographic projected in the second sub-area 102 on the array substrate.

Specifically, as shown in fig. 5, the display panel further includes a data line 5 corresponding to each row of pixel electrodes 1, the data line 5 is used for transmitting a data voltage signal, a source electrode of the thin film transistor 4 is electrically connected to the corresponding data line 5, a drain electrode of the thin film transistor 4 is electrically connected to the corresponding pixel electrode 1, a gate electrode of the thin film transistor 4 is electrically connected to the corresponding gate line 2, when the gate line 2 provides a turn-on signal, the corresponding thin film transistor 4 is turned on, and the data voltage signal on the corresponding data line 5 is transmitted to the corresponding pixel electrode 1, so that the pixel electrode 1 is charged. The area between two pixel electrode sets adjacent in the column direction is the first sub-area 101 or the second sub-area 102, wherein the thin film transistor 4 is disposed in the first sub-area 101, and the thin film transistor 4 is not disposed in the second sub-area 102, that is, the thin film transistor 4 corresponding to two pixel electrodes 1 adjacent to the second sub-area 102 is disposed outside the second sub-pixel area 102, so that the black matrix 3 with a larger area needs to be disposed in the first sub-area 101 to shield the thin film transistor 4, and only the black matrix 3 with a smaller area needs to be disposed in the second sub-area 102 to shield the gate line 2, therefore, the width d1 of the black matrix 3 in the first sub-area 101 in the column direction on the array substrate is greater than the width d2 of the black matrix 3 in the second sub-area 102 in the column direction on the array substrate, the width of the black matrix 3 between the adjacent pixel electrodes 1 in the column direction is reduced, the opening size of the black matrix is further increased, and the diffraction degree in transparent display is reduced, so that the adverse effect of diffraction on the transparent display effect is reduced.

Alternatively, as shown in fig. 4 and 5, the plurality of pixel electrodes 1 includes a plurality of adjacent column combinations 10b, each column combination 10b is composed of a first column of pixel electrodes 101b and a second column of pixel electrodes 102b which are sequentially adjacently arranged in the same direction; the first sub-regions 101 are located in the first row of pixel electrodes 101b, and the second sub-regions 102 are located in the second row of pixel electrodes 102 b. The second regions 12 in the odd-numbered columns of pixel electrodes 1 are all the first sub-regions 101, and the second regions 12 in the even-numbered columns of pixel electrodes 1 are all the second sub-regions 102, so that the thin film transistors 4 corresponding to the even-numbered columns of pixel electrodes 1 can be shielded by the black matrixes 3 in the first sub-regions 101 in the adjacent odd-numbered columns of pixel electrodes 1 and the black matrixes 3 between the two adjacent columns of pixel electrodes 1.

Alternatively, as shown in fig. 6 and 7, fig. 6 is another top view of the color film substrate in fig. 1, fig. 7 is a top view of a display panel corresponding to the color film substrate in fig. 6, the plurality of pixel electrodes 1 includes a plurality of adjacent column combinations 10b, each column combination 10b is formed by sequentially and adjacently disposing a first column of pixel electrodes 101b, a second column of pixel electrodes 102b, a third column of pixel electrodes 103b, and a fourth column of pixel electrodes 104b along the same direction; the first sub-regions 101 are located in a first column of pixel electrodes 101b and a second column of pixel electrodes 102b, and the second sub-regions 102 are located in a third column of pixel electrodes 103b and a fourth column of pixel electrodes 104 b. The tft corresponding to the third column of pixel electrodes 103b may be shielded by the black matrix 3 in the second adjacent column of pixel electrodes 103b and the black matrix 3 between the two columns of pixel electrodes 1, and the tft corresponding to the fourth column of pixel electrodes 104b may be shielded by the black matrix 3 between the fourth column of pixel electrodes 104b and the first adjacent column of pixel electrodes 101 b.

Alternatively, as shown in fig. 8 and fig. 9, fig. 8 is another top view of the color film substrate in fig. 1, and fig. 9 is a top view of a display panel corresponding to the color film substrate in fig. 8, in each row of pixel electrodes 1, the first sub-regions 101 and the second sub-regions 102 are sequentially arranged at intervals along the row direction; in any two adjacent columns of pixel electrodes 1, two second regions 12 adjacent in the row direction are a first sub-region 101 and a second sub-region 102, respectively. The first sub-area 101 and the second sub-area 102 are spaced apart from each other in both the row direction and the column direction, so that the distribution of the black matrix 3 is more uniform, thereby improving the uniformity of display.

Alternatively, as shown in fig. 10, fig. 10 is a partially enlarged schematic view of the array substrate in fig. 4 or fig. 9, and in the row direction, four thin film transistors 4 are disposed between any two adjacent second sub-regions 102; the four thin film transistors 4 are staggered with each other in the row direction. The thin film transistors 4 arranged in a staggered manner can further reduce the width of the black matrix in the first sub-region 102 in the column direction, further increase the opening size of the black matrix, and reduce the diffraction degree during transparent display, thereby reducing the adverse effect of diffraction on the transparent display effect.

Alternatively, as shown in fig. 9, distances L between orthographic projections of the black matrices 3 in any two adjacent second regions 12 in the column direction on the array substrate are all equal. That is, the openings of any two black matrices 3 are equal in size in the column direction, and the uniformity of display is further improved.

Alternatively, as shown in fig. 9, the forward projection area of the black matrix 3 in each first sub-region 101 on the array substrate is equal; the area of the forward projection of the black matrix 3 in each second sub-area 102 on the array substrate is equal. Even if the proportion of the area occupied by the black matrix 3 is the same in each sub-pixel, thereby further improving the uniformity of display.

Alternatively, as shown in fig. 11 and 12, fig. 11 is another top view of the color film substrate in fig. 1, fig. 12 is a top view of the display panel corresponding to the color film substrate in fig. 11, a region between two adjacent pixel electrode groups 10a in the column direction is a third region 13, the third region 13 is a third sub-region 103 or a fourth sub-region 104, and the display panel further includes a thin film transistor (not shown in fig. 11 and 12) corresponding to each pixel electrode 1; the orthographic projection of the thin film transistor on the array substrate is not overlapped with the fourth sub-area 104; the orthographic projection of the black matrix 3 on the array substrate is overlapped with the third sub-area 103; the orthographic projection of the black matrix 3 on the array substrate does not overlap with the fourth sub-area 104.

Specifically, as shown in fig. 11 and 12, the thin film transistors are disposed in the third sub-region 103, and the thin film transistors are not disposed in the fourth sub-region 104, so that the black matrix 3 is disposed in the third sub-region 103, and the black matrix 3 is not disposed in the fourth sub-region 104, which further increases the opening size of the black matrix, reduces the degree of diffraction at the time of transparent display, and thus reduces the adverse effect of diffraction on the transparent display effect.

Alternatively, as shown in fig. 11 and 12, in each column of pixel electrodes 1, the third sub-region 103 and the fourth sub-region 104 are sequentially disposed at intervals in the column direction; in any two adjacent columns of pixel electrodes 1, two third regions 13 adjacent in the row direction are the third sub-region 103 and the fourth sub-region 104. The third sub-area 103 and the fourth sub-area 104 are spaced apart from each other in both the row direction and the column direction, so that the distribution of the black matrix 3 is more uniform, thereby improving the uniformity of display.

Alternatively, as shown in fig. 13, fig. 13 is a partially enlarged schematic view of the array substrate in fig. 12, and in the row direction, four thin film transistors 4 are disposed between any two adjacent fourth sub-regions 104; the four thin film transistors 4 are staggered with each other in the row direction. The thin film transistors 4 arranged in a staggered manner can further reduce the width of the black matrix in the third sub-region 103 in the column direction, further increase the opening size of the black matrix, and reduce the diffraction degree during transparent display, thereby reducing the adverse effect of diffraction on the transparent display effect.

Alternatively, as shown in fig. 3, 6, 8, and 11, a color filter layer is disposed on the color film substrate, and the color green layer includes a red filter layer R, a blue filter layer B, a green filter layer G, and a white filter layer W.

Specifically, the sub-pixels corresponding to R, G, B three filter layers are used for realizing the display of a color picture, and the sub-pixels corresponding to the white filter layer W are used for realizing the transparent display.

As shown in fig. 14, fig. 14 is a schematic structural diagram of a display device according to an embodiment of the present invention, and the embodiment of the present invention further provides a display device including the display panel 400.

The specific structure and principle of the display panel 400 are the same as those of the above embodiments, and are not described herein again. The display device may be any electronic device with a display function, such as a touch display screen, a mobile phone, a tablet computer, a notebook computer, an electronic paper book, or a television.

According to the display device in the embodiment of the invention, only two grid lines are arranged between every two rows of pixel electrodes, and the transverse black matrix is not arranged between the two rows of pixel electrodes.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims

1. A display panel, comprising:

a black matrix is arranged on the color film substrate;

the projection of the black matrix on the array substrate is not overlapped with the first area;

a region between two adjacent pixel electrode groups in the column direction is a second region, and the second region is a first sub-region or a second sub-region;

the width of the orthographic projection of the black matrix in the first sub-area on the array substrate in the column direction is larger than the width of the orthographic projection of the black matrix in the second sub-area on the array substrate in the column direction;

in the row direction, the first sub-region and the second sub-region located in the same row are arranged at an interval from each other.

2. The display panel according to claim 1,

the plurality of pixel electrodes comprise a plurality of adjacent column combinations, and each column combination consists of a first column of pixel electrodes and a second column of pixel electrodes which are sequentially and adjacently arranged along the same direction;

3. The display panel according to claim 1,

the pixel electrodes comprise a plurality of adjacent column combinations, and each column combination is formed by sequentially and adjacently arranging a first column of pixel electrodes, a second column of pixel electrodes, a third column of pixel electrodes and a fourth column of pixel electrodes along the same direction;

4. The display panel according to claim 1,

in each row of the pixel electrodes, the first sub-regions and the second sub-regions are sequentially arranged at intervals along the row direction;

5. The display panel according to claim 2 or 4,

in the row direction, four thin film transistors are arranged between any two adjacent second subregions;

6. The display panel according to claim 4,

distances between orthographic projections of any two adjacent second areas of the black matrix in the array substrate in the column direction are equal.

7. The display panel according to claim 6,

the forward projection area of the black matrix in each first sub-area on the array substrate is equal;

8. A display panel, comprising:

a black matrix is arranged on the color film substrate;

a region between two adjacent pixel electrode groups in the column direction is a third region, and the third region is a third sub-region or a fourth sub-region;

the orthographic projection of the black matrix on the array substrate is not overlapped with the fourth sub-area;

in the row direction, the third sub-region and the fourth sub-region located in the same row are arranged at an interval.

9. The display panel according to claim 8,

in each row of the pixel electrodes, the third sub-region and the fourth sub-region are sequentially arranged at intervals along the row direction;

10. The display panel according to claim 9,

in the row direction, four thin film transistors are arranged between any two adjacent fourth subregions;

11. The display panel according to claim 1 or 8,

the color film substrate is provided with a color filter layer, and the color green layer comprises a red filter layer, a blue filter layer, a green filter layer and a white filter layer.

12. A display device characterized by comprising the display panel according to any one of claims 1 to 11.