CN107195669A - Autoregistration nano field-effect pipe comprising metal stack gate electrode and preparation method thereof - Google Patents
Autoregistration nano field-effect pipe comprising metal stack gate electrode and preparation method thereof Download PDFInfo
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- CN107195669A CN107195669A CN201710504915.XA CN201710504915A CN107195669A CN 107195669 A CN107195669 A CN 107195669A CN 201710504915 A CN201710504915 A CN 201710504915A CN 107195669 A CN107195669 A CN 107195669A
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- 229910052751 metal Inorganic materials 0.000 title claims abstract description 98
- 239000002184 metal Substances 0.000 title claims abstract description 98
- 230000005669 field effect Effects 0.000 title claims abstract description 25
- 238000002360 preparation method Methods 0.000 title claims abstract description 13
- 239000000463 material Substances 0.000 claims abstract description 30
- 230000008021 deposition Effects 0.000 claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 238000000151 deposition Methods 0.000 claims description 19
- 230000004888 barrier function Effects 0.000 claims description 15
- 239000003795 chemical substances by application Substances 0.000 claims description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 5
- 229910021389 graphene Inorganic materials 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 239000000203 mixture Substances 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 239000004642 Polyimide Substances 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- 239000004411 aluminium Substances 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 3
- 229910052681 coesite Inorganic materials 0.000 claims description 3
- 229910052593 corundum Inorganic materials 0.000 claims description 3
- 229910052906 cristobalite Inorganic materials 0.000 claims description 3
- 125000000118 dimethyl group Chemical group [H]C([H])([H])* 0.000 claims description 3
- 239000011521 glass Substances 0.000 claims description 3
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 3
- 229920001721 polyimide Polymers 0.000 claims description 3
- 229920005573 silicon-containing polymer Polymers 0.000 claims description 3
- 229910052682 stishovite Inorganic materials 0.000 claims description 3
- 229910052905 tridymite Inorganic materials 0.000 claims description 3
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 3
- 238000006701 autoxidation reaction Methods 0.000 claims description 2
- -1 polyethylene terephthalate Polymers 0.000 claims description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 claims 2
- 239000005020 polyethylene terephthalate Substances 0.000 claims 2
- 150000002148 esters Chemical class 0.000 claims 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 239000010931 gold Substances 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 238000005516 engineering process Methods 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 7
- 238000004377 microelectronic Methods 0.000 description 3
- 230000003628 erosive effect Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229910003090 WSe2 Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 229910052961 molybdenite Inorganic materials 0.000 description 1
- CWQXQMHSOZUFJS-UHFFFAOYSA-N molybdenum disulfide Chemical compound S=[Mo]=S CWQXQMHSOZUFJS-UHFFFAOYSA-N 0.000 description 1
- 229910052982 molybdenum disulfide Inorganic materials 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0688—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions characterised by the particular shape of a junction between semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
Abstract
The invention discloses a kind of autoregistration nano field-effect pipe comprising metal stack gate electrode, including substrate, substrate is provided with layer of channel material, it is gate electrode region in the middle part of layer of channel material, gate electrode region both sides are respectively to deposit to have deposition on gate dielectric layer, gate dielectric layer to have the first metal layer on source region and drain region, gate electrode region, on the first metal layer deposition have on second metal layer, source region and drain region respectively sedimentary origin, leakage metal to form source, drain electrode.The second metal layer of the present invention is formed for self aligned undercut shape with the first metal layer, so as to constituting gate electrode, the gate electrode of metal stack increases gate capacitance efficiency, and defines and only need to single exposure for the gate electrode of self-alignment structure, preparation technology is simplified, preparation cost is also saved.The invention also discloses a kind of preparation method of the autoregistration nano field-effect pipe comprising metal stack gate electrode.
Description
Technical field
The present invention relates to microelectronics technology, more particularly to a kind of autoregistration nanometer field comprising metal stack gate electrode
Effect pipe and preparation method thereof.
Background technology
Graphene is as a kind of new electronic functional material, due to unique physical arrangement and excellent electrical property
Can, the study hotspot as current microelectronic material is with a wide range of applications in microelectronic.New nanostructured material
Material（Such as MoS2, MoSe2, WSe2）Increasingly attract attention.
The connection resistance that un-gate regions between gate electrode and source electrode and drain electrode are produced is influence nano field-effect pipe
One of key factor of energy, is the feasible solution for solving this problem using self-alignment structure.In existing self-alignment structure
In nano field-effect pipe, in order to form self aligned grid structure, electron beam exposure forms T-shaped grid twice or thrice the need for having
Structure, adds the complexity of technique, and what is had has the stacking gate electrode of silica, reduces gate capacitance efficiency.
The content of the invention
In order to solve the above-mentioned technical problem, the present invention, which is provided, a kind of makes that simple, cost is low, gate capacitance efficiency high include
The autoregistration nano field-effect pipe of metal stack gate electrode, and its preparation method is provided.
Technical proposal that the invention solves the above-mentioned problems is：A kind of autoregistration nanometer field effect comprising metal stack gate electrode
Ying Guan, including substrate, it is gate electrode region, gate electrode region both sides that substrate, which is provided with the middle part of layer of channel material, layer of channel material,
Deposition has deposition on gate dielectric layer, gate dielectric layer to have the first metal on respectively source region and drain region, gate electrode region
Layer, on the first metal layer deposition have on second metal layer, source region and drain region respectively sedimentary origin, leakage metal to be formed
Source, drain electrode.
The above-mentioned autoregistration nano field-effect pipe comprising metal stack gate electrode, it is rotten that the second metal layer is not etched agent
Erosion forms barrier layer, and the first metal layer agent that is etched corrodes to form supporting layer, and second metal layer is formed with the first metal layer to be used for
Self aligned undercut shape, so as to constitute gate electrode.
The above-mentioned autoregistration nano field-effect pipe comprising metal stack gate electrode, the layer of channel material is graphene.
The above-mentioned autoregistration nano field-effect pipe comprising metal stack gate electrode, the gate dielectric layer for deposition aluminium from oxygen
The medium formed after change.
The above-mentioned autoregistration nano field-effect pipe comprising metal stack gate electrode, the source, the thickness for leaking metal are less than the
The thickness of one metal level.
The above-mentioned autoregistration nano field-effect pipe comprising metal stack gate electrode, the substrate includes basalis and positioned at base
Insulating barrier above bottom.
The above-mentioned autoregistration nano field-effect pipe comprising metal stack gate electrode, the insulating barrier is SiO2、Si3N4、BN、
Al2O3、HfO2, AlN, SiC, Si, Sapphire, glass, pet material PET, polyimides PI,
Mixture more than one or both of dimethyl silicone polymer.
A kind of preparation method of the autoregistration nano field-effect pipe comprising metal stack gate electrode, comprises the following steps：
1）Transfer or depositing trench material on substrate, and graphically；
2）The lithographic definition gate electrode region on layer of channel material；
3）In the gate electrode area area deposition gate medium of definition；
4）First layer metal is deposited on gate dielectric layer；
5）Second layer metal is deposited on the first metal；
6）Peel off the photoresist for removing and being used for defining gate electrode region；
7）Barrier layer is done with second metal layer, etchant first layer metal is used, so as to be formed for self aligned
Undercut shapes；
8）Deposit source and drain metal formation source-drain electrode.
The beneficial effects of the present invention are：The second metal layer of the present invention is not etched agent and corrodes to form barrier layer, and first
The metal level agent that is etched corrodes to form supporting layer, and second metal layer is formed for self aligned undercut shape with the first metal layer,
So as to constitute gate electrode, the gate electrode of metal stack increases gate capacitance efficiency, and defines the grid electricity for self-alignment structure
Pole only needs to single exposure, simplifies preparation technology, also saves preparation cost.
Brief description of the drawings
Fig. 1 is the internal structure schematic diagram of FET of the present invention.
Fig. 2 is the schematic diagram of the manufacturing process first step of the present invention.
Fig. 3 is the schematic diagram of manufacturing process second step of the present invention.
Fig. 4 is the schematic diagram of the step of manufacturing process the 3rd of the present invention.
Fig. 5 is the schematic diagram of the step of manufacturing process the 4th of the present invention.
Fig. 6 is the schematic diagram of the step of manufacturing process the 5th of the present invention.
Fig. 7 is the schematic diagram of the step of manufacturing process the 6th of the present invention.
Fig. 8 is the schematic diagram of the step of manufacturing process the 7th of the present invention.
Embodiment
The present invention is further illustrated with reference to the accompanying drawings and examples.
As shown in figure 1, a kind of autoregistration nano field-effect pipe comprising metal stack gate electrode, including substrate 1, substrate 1
Insulating barrier including basalis and above basalis.The insulating barrier is SiO2、Si3N4、BN、Al2O3、HfO2、AlN、
SiC, Si, Sapphire, glass, pet material PET, polyimides PI, dimethyl silicone polymer
Deng one or both of more than mixture.The basalis is for semi-conducting material, conductive material or different from insulating barrier
Mixture more than one or both of material.
Substrate 1 is provided with layer of channel material 2, and layer of channel material 2 is graphene or other nano structural materials, raceway groove material
The middle part of the bed of material 2 is gate electrode region, and gate electrode region both sides are respectively to be deposited on source region and drain region, gate electrode region
There is deposition on gate dielectric layer 5, the medium that gate dielectric layer 5 is formed after the aluminium autoxidation for deposition, gate dielectric layer 5 to have the first metal layer
6, deposition has second metal layer 7 on the first metal layer 6, and being provided between the first metal layer 6 and second metal layer 7 is used to increase adhesion
Property adhesion metal layer, the second metal layer 7 is not etched agent and corrodes to form barrier layer, and the agent that is etched of the first metal layer 6 is rotten
Erosion forms supporting layer, and second metal layer 7 is formed for self aligned undercut shape with the first metal layer 6, so as to constitute gate electrode
Sedimentary origin, leakage metal are to form self aligned source S and drain D respectively on G, source region and drain region, source, leakage metal
Thickness is less than the thickness of the first metal layer 6.
A kind of preparation method of the autoregistration nano field-effect pipe comprising metal stack gate electrode, comprises the following steps：
1）Transfer or depositing trench material formation layer of channel material 2, and graphically on substrate 1；
2）3, the 4 lithographic definition gate electrode region with photoresist on layer of channel material 2；
3）In the gate electrode area area deposition gate medium formation gate dielectric layer 5 of definition；
4）First layer metal formation the first metal layer 6 is deposited on gate dielectric layer 5；
5）Second layer metal formation second metal layer 7 is deposited on the first metal layer 6；
6）Peel off the photoresist for removing and being used for defining gate electrode region；
7）Barrier layer is done with second metal layer 7, with etchant the first metal layer 6, so as to be formed for self aligned
Undercut shapes；
8）Deposit source and drain metal formation source-drain electrode 8,9.
Fig. 2-8 gives the schematic diagram for preparing each stage of the present invention.Fig. 2 examples go out to prepare the first step of the present invention,
Transfer or the graphene of depositing trench material layer 2 or other nano structural materials, and graphically on substrate 1.Fig. 3 examples go out system
The second step of the standby present invention, only gate electrode region is defined on the layer of channel material 2 with a photoetching technique.Fig. 4 examples go out
The 3rd step of the present invention is prepared, gate medium is deposited.Fig. 5 examples go out to prepare the 4th step of the present invention, and first is deposited on gate medium
Layer metal.Fig. 6 examples go out to prepare the 5th step of the present invention, and second layer metal is deposited on first layer metal.Fig. 7 examples go out to prepare this
6th step of invention, peels off the photoresist for removing and being used for defining gate electrode region.Fig. 8 examples go out to prepare the 7th step of the present invention,
Barrier layer is done with second metal layer 7, with a kind of etching agent somewhat etching first metal layer 6, so as to be formed for self aligned
Undercut shapes.Finally, deposition source and drain metal formation source-drain electrode 8,9, the thickness of source and drain metal should be less than first layer metal
Thickness, that is, form structure shown in Fig. 1.
Claims (9)
1. a kind of autoregistration nano field-effect pipe comprising metal stack gate electrode, it is characterised in that：Including substrate, set on substrate
It is gate electrode region to have in the middle part of layer of channel material, layer of channel material, and gate electrode region both sides are respectively source region and drain region
Deposition has on gate dielectric layer, gate dielectric layer deposition have on the first metal layer, the first metal layer deposition have the on domain, gate electrode region
On two metal levels, source region and drain region respectively sedimentary origin, leakage metal to form source, drain electrode.
2. the autoregistration nano field-effect pipe according to claim 1 comprising metal stack gate electrode, it is characterised in that：Institute
State second metal layer and be not etched agent and corrode to form barrier layer, the first metal layer agent that is etched corrodes to form supporting layer, the second gold medal
Category layer is formed for self aligned undercut shape with the first metal layer, so as to constitute self aligned source-drain electrode.
3. the autoregistration nano field-effect pipe according to claim 1 comprising metal stack gate electrode, it is characterised in that：Institute
Layer of channel material is stated for graphene.
4. the autoregistration nano field-effect pipe according to claim 1 comprising metal stack gate electrode, it is characterised in that：Institute
State the medium formed after aluminium autoxidation of the gate dielectric layer for deposition.
5. the autoregistration nano field-effect pipe according to claim 1 comprising metal stack gate electrode, it is characterised in that：Institute
State source, leak thickness of the thickness less than the first metal layer of metal.
6. the autoregistration nano field-effect pipe according to claim 1 comprising metal stack gate electrode, it is characterised in that：Institute
Stating substrate includes basalis and the insulating barrier above basalis.
7. the autoregistration nano field-effect pipe according to claim 6 comprising metal stack gate electrode, it is characterised in that：Institute
Insulating barrier is stated for SiO2、Si3N4、BN、Al2O3、HfO2, AlN, SiC, Si, Sapphire, glass, polyethylene terephthalate
Mixture more than one or both of ester material PET, polyimides PI, dimethyl silicone polymer.
8. it is a kind of such as the autoregistration nano field-effect pipe comprising metal stack gate electrode any one of claim 1-7
Preparation method, comprises the following steps：
1）Transfer or depositing trench material on substrate, and graphically；
2）The lithographic definition gate electrode region on layer of channel material；
3）In the gate electrode area area deposition gate medium of definition；
4）First layer metal is deposited on gate dielectric layer；
5）Second layer metal is deposited on the first metal；
6）Peel off the photoresist for removing and being used for defining gate electrode region；
7）Barrier layer is done with second metal layer, etchant first layer metal is used, so as to be formed for self aligned
Undercut shapes；
8）Deposit source and drain metal formation source-drain electrode.
9. preparation method according to claim 8, it is characterised in that：The step 8）In, the thickness of source and drain metal is less than
The thickness of first layer metal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710504915.XA CN107195669A (en) | 2017-06-28 | 2017-06-28 | Autoregistration nano field-effect pipe comprising metal stack gate electrode and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710504915.XA CN107195669A (en) | 2017-06-28 | 2017-06-28 | Autoregistration nano field-effect pipe comprising metal stack gate electrode and preparation method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107195669A true CN107195669A (en) | 2017-09-22 |
Family
ID=59881440
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710504915.XA Pending CN107195669A (en) | 2017-06-28 | 2017-06-28 | Autoregistration nano field-effect pipe comprising metal stack gate electrode and preparation method thereof |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109560125A (en) * | 2018-11-27 | 2019-04-02 | 湖南工业大学 | Metal stack source-drain electrode field-effect tube and preparation method thereof |
| CN109817703A (en) * | 2019-01-02 | 2019-05-28 | 湖南工业大学 | High on-off ratio graphene hetero junction field effect pipe and preparation method thereof |
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| US4679311A (en) * | 1985-12-12 | 1987-07-14 | Allied Corporation | Method of fabricating self-aligned field-effect transistor having t-shaped gate electrode, sub-micron gate length and variable drain to gate spacing |
| US5272100A (en) * | 1988-09-08 | 1993-12-21 | Mitsubishi Denki Kabushiki Kaisha | Field effect transistor with T-shaped gate electrode and manufacturing method therefor |
| US20120248416A1 (en) * | 2011-03-29 | 2012-10-04 | University Of Southern California | High Performance Field-Effect Transistors |
| US20130105765A1 (en) * | 2011-11-01 | 2013-05-02 | International Business Machines Corporation | Graphene and Nanotube/Nanowire Transistor with a Self-Aligned Gate Structure on Transparent Substrates and Method of Making Same |
| CN103325671A (en) * | 2013-05-25 | 2013-09-25 | 复旦大学 | Method for manufacturing T-shaped grid electrode on semiconductor surface |
| US20160071982A1 (en) * | 2014-09-05 | 2016-03-10 | Sumitomo Electric Industries, Ltd. | Semiconductor device with graphene layer as channel |
| CN206864474U (en) * | 2017-06-28 | 2018-01-09 | 湖南工程学院 | Autoregistration nano field-effect pipe comprising metal stack gate electrode |
-
2017
- 2017-06-28 CN CN201710504915.XA patent/CN107195669A/en active Pending
Patent Citations (7)
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|---|---|---|---|---|
| US4679311A (en) * | 1985-12-12 | 1987-07-14 | Allied Corporation | Method of fabricating self-aligned field-effect transistor having t-shaped gate electrode, sub-micron gate length and variable drain to gate spacing |
| US5272100A (en) * | 1988-09-08 | 1993-12-21 | Mitsubishi Denki Kabushiki Kaisha | Field effect transistor with T-shaped gate electrode and manufacturing method therefor |
| US20120248416A1 (en) * | 2011-03-29 | 2012-10-04 | University Of Southern California | High Performance Field-Effect Transistors |
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| US20160071982A1 (en) * | 2014-09-05 | 2016-03-10 | Sumitomo Electric Industries, Ltd. | Semiconductor device with graphene layer as channel |
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Cited By (3)
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| CN109560125A (en) * | 2018-11-27 | 2019-04-02 | 湖南工业大学 | Metal stack source-drain electrode field-effect tube and preparation method thereof |
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| CN109817703A (en) * | 2019-01-02 | 2019-05-28 | 湖南工业大学 | High on-off ratio graphene hetero junction field effect pipe and preparation method thereof |
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