CN107195323A - Double deference negative-feedback data reading circuit and its method based on memristor - Google Patents
Double deference negative-feedback data reading circuit and its method based on memristor Download PDFInfo
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- CN107195323A CN107195323A CN201710570860.2A CN201710570860A CN107195323A CN 107195323 A CN107195323 A CN 107195323A CN 201710570860 A CN201710570860 A CN 201710570860A CN 107195323 A CN107195323 A CN 107195323A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0023—Address circuits or decoders
- G11C13/0028—Word-line or row circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/003—Cell access
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
- G11C2013/0042—Read using differential sensing, e.g. bit line [BL] and bit line bar [BLB]
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Abstract
The invention discloses the inverting input branch road and comparator COMP normal phase input end branch roads of a kind of Double deference negative-feedback data reading circuit based on memristor, including wordline WL sub-circuits, in addition to comparator COMP, comparator COMP；The inverting input branch road of the wordline WL sub-circuits and the comparator COMP is electrically connected；The normal phase input end branch road of the comparator COMP is electrically connected with by a reference resistance unit R ref adaptive sub-circuits that a reference current source Iref constitutes of connecting；The reference data voltage Vr that the voltage Vm that the comparator COMP is inputted according to inverting input branch road is inputted with the normal phase input end is compared, and is produced DQ signals and is completed memristor memory cell signal/data read-out.Using the present invention, the reading feature of memristor memory cell is disclosure satisfy that, reaches effectively according to the variation characteristic of resistance, in real time, data is read out rapidly, and ensure the purpose of the correctness of data read-out.
Description
Technical field
The present invention relates to memristor design and application technology, more particularly to a kind of Double deference negative factor based on memristor
According to reading circuit and its method.
Background technology
Memristor, full name memory resistor (Memristor), be a kind of circuit devcie for representing magnetic flux and charge relationship (again
Claim " the 4th kind of electronic device ").Resistance is another circuit devcie for characterizing voltage and current relation.Memristor has resistance
Dimension, but from unlike resistance, the resistance of memristor is determined by the electric charge for flowing through it.Therefore, by determining memristor
Resistance, so that it may know and flow through its quantity of electric charge, so as to play the role of to remember electric charge.2008, the researcher of Hewlett-Packard was first
It is secondary to make a nanometer memory resistor, start memristor research boom.The appearance of nanometer memory resistor, is expected to realize that non-volatile random is deposited
Reservoir.Also, the integrated level of the random access memory based on memristor, power consumption, read or write speed will be more excellent than traditional random access memory
More.The best way of artificial neural network cynapse is realized in addition, memristor is hardware.Due to the non-linear nature of memristor, it can produce
Raw chaos circuit, so as to also there is many applications in secret communication.
Memristor is the nonlinear resistance with memory function.Its resistance can be changed by the change of control electric current, if
High value is defined as " 1 ", low resistance is defined as " 0 ", then this resistance can just realize the function of data storage.Due to memristor
Device size is small, energy consumption is low, so can store well and processing information.
The simplest application of memristor is as non-volatile impedance memory (RRAM).Current dynamic RAM
(DRAM) maximum deficiency is that when the power is turned off, the data of storage will disappear in dynamic RAM (DRAM).And
During power-off, the data in non-volatile RAM (RRAM) can still be maintained at equal state during power-off.Recall
It is the basic structure for constituting the RRAM to hinder device memory cell, because memristor unit is to complete information by high and low resistance state
Storage, its design feature is single-ended reading out structure, so require to provide a stable reference current for sense amplifier,
But existing reference current circuit is influenceed and unstable by factors such as technique, temperature, thus information reading is had a strong impact on
The degree of accuracy and reliability.Meanwhile, the reference circuit introduced by outside can not adapt to resistive material complicated and changeable and work extensively
Skill condition, therefore, adaptability is relatively low with reading speed.
The content of the invention
In view of this, it is a primary object of the present invention to provide a kind of Double deference negative-feedback digital independent based on memristor
Circuit and its method, by using dynamic regulation structure to meet the reading feature of memristor memory cell, reach effective basis
The variation characteristic of resistance, in real time, is read out rapidly data, and ensure the correctness of data read-out.
To reach above-mentioned purpose, the technical proposal of the invention is realized in this way：
A kind of Double deference negative-feedback data reading circuit based on memristor, including wordline WL sub-circuits, the data read-out
Circuit also includes comparator COMP, comparator COMP inverting input branch road and comparator COMP normal phase input end branch roads；
The inverting input branch road of the wordline WL sub-circuits and the comparator COMP is electrically connected；The positive of the comparator COMP is defeated
Enter to hold branch road to be electrically connected with by a reference resistance unit R ref adaptive sub-circuits that a reference current source Iref constitutes of connecting；Institute
State voltage Vm and the reference data voltage of normal phase input end input that comparator COMP is inputted according to inverting input branch road
Vr is compared, and is produced DQ signals and is completed memristor memory cell signal/data read-out.
Wherein：The wordline WL sub-circuits are that one resistive element R of transistor T1 series connection memristor memory cell is constituted.
The resistive element R of wordline WL sub-circuits one end is electrically connected with transistor T2 source/drain, the crystal
Pipe T2 drain/source is electrically connected with amplifier AMP1 end of oppisite phase and transistor T3 source/drain simultaneously, the transistor
T3 drain/source is electrically connected with transistor T4 drain electrode；The grid of the transistor T2 is electrically connected with reading Enable Pin；The crystalline substance
Body pipe T3 grid is electrically connected with amplifier AMP1 output end Vl_mat；The source electrode connection working power of the transistor T4
VDD, transistor T4 grid is electrically connected with the inverting input of the comparator COMP.
The reference current source Iref ends of the adaptive sub-circuit are electrically connected with transistor T5 source/drain, the crystalline substance
Body pipe T5 drain/source is electrically connected with the source/drain of amplifier AMP2 end of oppisite phase and transistor T6, the transistor T6
Drain/source electrically connected with transistor T7 drain electrode；The grid of the transistor T5 is electrically connected with reading Enable Pin；The crystal
Pipe T6 grid is electrically connected with amplifier AMP2 output end；The source electrode connection working power VDD of the transistor T7, transistor
T7 grid connects the normal phase input end of the comparator COMP.
The transistor T2, transistor T3 are N-type metal-oxide-semiconductor, and the transistor T4 is p-type metal-oxide-semiconductor.
The transistor T5, transistor T6 are N-type metal-oxide-semiconductor, and the transistor T7 is p-type metal-oxide-semiconductor.
A kind of method for reading data of the Double deference negative-feedback data reading circuit based on memristor, comprises the following steps：
A, unlatching wordline WL, open transistor T1, electric current are read above the resistive element R values of memristor memory cell
Value Igen；
B, in 1T1R sub-circuits, Current amplifier regulation is carried out by reversed feedback amplifier AMP1, and this is negative anti-
Supply current is amplified, while converting the current into voltage Vm；Meanwhile, in adaptive sub-circuit, according to reference resistance
Rref produces reference current Iref, and reference current Iref is produced into another reference data voltage by amplifier AMP2
Vr；
C, by voltage Vm and reference data voltage Vr be compared it is final produce DQ signals, so as to realize that memristor storage is single
Signal/data read-out of member.
The Double deference negative-feedback data reading circuit based on memristor and its method of the present invention, with as follows
Beneficial effect：
The Double deference negative-feedback reading circuit based on memristor, by using the negative feedback current difference of dynamic self-adapting
The current type sensitive amplifier structure of reading out structure, i.e. reference current (Iref), the dynamic regulation structure disclosure satisfy that storage is single
The reading feature of member, can dynamically be adjusted according to the resistance characteristic of unit, produce the current reference characteristic for being adapted to memristor unit,
Because the electric current is dynamic change, it can produce different reference current values according to the difference of memristor unit, to play reality
When the characteristic that accurately quickly reads, so as to realize the effective correctness for ensureing data read-out according to the variation characteristic of resistance.
Brief description of the drawings
Fig. 1 is Double deference negative-feedback reading circuit structure schematic diagram of the embodiment of the present invention based on memristor；
Fig. 2 shows for the data read method flow of Double deference negative-feedback reading circuit of the embodiment of the present invention based on memristor
It is intended to.
Embodiment
Below in conjunction with the accompanying drawings and embodiments of the invention are to Double deference negative-feedback reading circuit of the present invention based on memristor
And its read method is described in further detail.
Fig. 1 is Double deference negative-feedback reading circuit structure schematic diagram of the embodiment of the present invention based on memristor.
The Double deference negative-feedback reading circuit based on memristor, the reading of memory cell is met using dynamic regulation structure
Go out feature, by reference current (Iref) current type sensitive amplifier structure of the dynamic self-adapting, store single according to memristor
The resistance characteristic of member is dynamically adjusted, and produces the current reference characteristic for being adapted to memristor memory cell, because the electric current is dynamic
Change, it can produce corresponding different reference currents according to the difference of memristor memory cell, real-time, accurate, fast to reach
Fast reading goes out the characteristic of (electric current).
Double deference negative-feedback reading circuit of the embodiment based on memristor as shown in Figure 1, is also dynamic reference source differential type
Sense amplifier, mainly includes comparator COMP, amplifier AMP1, amplifier AMP2 and some transistors.The transistor, tool
Body is N-type metal-oxide-semiconductor and/or p-type metal-oxide-semiconductor (note：T4, T7 are the p-type metal-oxide-semiconductor of control electric current).
On comparator COMP inverting input branch road, it is also associated with connecting a resistive element R's by a transistor T1
The wordline sub-circuit WL that memristor memory cell is constituted, i.e. 1T1R sub-circuits.Correspondingly, comparator COMP normal phase input end branch
Road is also associated with the adaptive sub-circuit being made up of one reference current source Iref of reference resistance unit R ref series connection.Wherein：
The resistive element R of 1T1R sub-circuits one end is electrically connected with transistor T2 source/drain, the transistor
T2 drain/source is electrically connected with amplifier AMP1 end of oppisite phase and transistor T3 source/drain simultaneously, the transistor T3
Drain/source electrically connected with transistor T4 drain electrode.The grid of the transistor T2 is electrically connected with reading enable (EN_READ) end
Connect.The grid of the transistor T3 is electrically connected with amplifier AMP1 output end Vl_mat.The source electrode connection of the transistor T4
Working power VDD, transistor T4 grid is electrically connected with the inverting input of the comparator COMP.
The reference current source Iref ends of the adaptive sub-circuit are electrically connected with transistor T5 source/drain, the crystalline substance
Body pipe T5 drain/source is electrically connected with the source/drain of amplifier AMP2 end of oppisite phase and transistor T6, the transistor T6
Drain/source electrically connected with transistor T7 drain electrode.The grid of the transistor T5 is electrically connected with reading enable (EN_READ) end
Connect.The grid of the transistor T6 is electrically connected with amplifier AMP2 output end.The source electrode connection work electricity of the transistor T7
Source VDD, transistor T7 grid connect the normal phase input end of the comparator COMP.
The reference data electricity that the voltage Vm that the comparator COMP is inputted according to inverting input is inputted with normal phase input end
Pressure Vr is compared, final to produce DQ signals, so as to realize the function of memristor memory cell signal/data read-out.
Fig. 2 shows for the data read method flow of Double deference negative-feedback reading circuit of the embodiment of the present invention based on memristor
It is intended to.
As shown in Fig. 2 the data read-out of foregoing circuit is operated, i.e., the Double deference negative-feedback reading circuit based on memristor
Data read method, comprises the following steps：
Step 21：Wordline WL is opened, transistor T1 is opened, read above the resistive element R values of memristor memory cell
To current value Igen.
Step 22：In 1T1R sub-circuits, Current amplifier regulation is carried out by a reversed feedback amplifier AMP1, and should
Negative feedback current is amplified, while converting the current into voltage Vm；Meanwhile, can be according to reference in adaptive sub-circuit
Resistance Rref produces reference current Iref, and reference current Iref is produced into another reference data electricity by amplifier AMP2
Press Vr.
Step 23：Voltage Vm and reference data voltage Vr are compared final generation DQ signals, so as to realize memristor
The function of signal/data read-out of memory cell.
Because reference resistance Rref is a technological datum resistance in itself, so being dynamic tracking change, in addition circuit
The form of Double deference amplification, while there is the function of negative-feedback zoom comparison again, so be for memristor Double deference it is negative anti-
The reading circuit of feedback.
Using the Double deference negative feedback current reading circuit structure, using negative feedback current difference reading out structure, that is,
Effectively according to change in resistance characteristic, it is ensured that the correctness of data read-out.The reading circuit, make use of difference negative-feedback principle,
Adjusted by chip internal circuits current reference, effectively reflect which kind of current reference is most effective, so that according to the numerical value of feedback
Judge which kind of read current is most reasonable, so that dynamic regulation is reached, adaptive purpose.
The foregoing is only a preferred embodiment of the present invention, is not intended to limit the scope of the present invention.
Claims (7)
1. a kind of Double deference negative-feedback data reading circuit based on memristor, including wordline WL sub-circuits, it is characterised in that should
Data reading circuit also includes comparator COMP, comparator COMP inverting input branch road and the input of comparator COMP positives
Hold branch road；The inverting input branch road of the wordline WL sub-circuits and the comparator COMP is electrically connected；The comparator COMP
Normal phase input end branch road connected the adaptive sub-circuit that a reference current source Iref constitutes with by a reference resistance unit R ref
Electrical connection；The reference that the voltage Vm that the comparator COMP is inputted according to inverting input branch road is inputted with the normal phase input end
Reference voltage V r is compared, and is produced DQ signals and is completed memristor memory cell signal/data read-out.
2. the Double deference negative-feedback data reading circuit based on memristor according to claim 1, it is characterised in that the word
Line WL sub-circuits are that one resistive element R of transistor T1 series connection memristor memory cell is constituted.
3. the Double deference negative-feedback data reading circuit according to claim 1 or claim 2 based on memristor, it is characterised in that institute
The one end for stating the resistive element R of wordline WL sub-circuits is electrically connected with transistor T2 source/drain, the leakage of the transistor T2
Pole/source electrode is electrically connected with amplifier AMP1 end of oppisite phase and transistor T3 source/drain simultaneously, the leakage of the transistor T3
Pole/source electrode is electrically connected with transistor T4 drain electrode；The grid of the transistor T2 is electrically connected with reading Enable Pin；The transistor T3
Grid electrically connected with amplifier AMP1 output end Vl_mat；The source electrode connection working power VDD of the transistor T4, crystal
Pipe T4 grid is electrically connected with the inverting input of the comparator COMP.
4. the Double deference negative-feedback data reading circuit based on memristor according to claim 1, it is characterised in that it is described from
The reference current source Iref ends for adapting to sub-circuit are electrically connected with transistor T5 source/drain, the drain/source of the transistor T5
Pole is electrically connected with amplifier AMP2 end of oppisite phase and transistor T6 source/drain, drain/source and the crystalline substance of the transistor T6
Body pipe T7 drain electrode electrical connection；The grid of the transistor T5 is electrically connected with reading Enable Pin；The grid of the transistor T6 is with putting
Big device AMP2 output end electrical connection；Source electrode connection the working power VDD, transistor T7 of the transistor T7 grid connection institute
State comparator COMP normal phase input end.
5. the Double deference negative-feedback data reading circuit based on memristor according to claim 3, it is characterised in that the crystalline substance
Body pipe T2, transistor T3 are N-type metal-oxide-semiconductor, and the transistor T4 is p-type metal-oxide-semiconductor.
6. the Double deference negative-feedback data reading circuit based on memristor according to claim 4, it is characterised in that the crystalline substance
Body pipe T5, transistor T6 are N-type metal-oxide-semiconductor, and the transistor T7 is p-type metal-oxide-semiconductor.
7. the number of the Double deference negative-feedback data reading circuit based on memristor described in a kind of any one of use claim 1~6
According to read method, it is characterised in that comprise the following steps：
A, unlatching wordline WL, open transistor T1, current value are read above the resistive element R values of memristor memory cell
Igen；
B, in 1T1R sub-circuits, Current amplifier regulation is carried out by reversed feedback amplifier AMP1, and by negative-feedback electricity
Stream is amplified, while converting the current into voltage Vm；Meanwhile, in adaptive sub-circuit, produced according to reference resistance Rref
Raw reference current Iref, and reference current Iref is produced into another reference data voltage Vr by amplifier AMP2；
C, by voltage Vm and reference data voltage Vr be compared it is final produce DQ signals, so as to realize memristor memory cell
Signal/data read-out.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710570860.2A CN107195323A (en) | 2017-07-13 | 2017-07-13 | Double deference negative-feedback data reading circuit and its method based on memristor |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710570860.2A CN107195323A (en) | 2017-07-13 | 2017-07-13 | Double deference negative-feedback data reading circuit and its method based on memristor |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109920461A (en) * | 2017-12-12 | 2019-06-21 | 杭州潮盛科技有限公司 | A kind of resistance-variable storing device based on thin film transistor (TFT) |
| CN110597487A (en) * | 2019-08-26 | 2019-12-20 | 华中科技大学 | Matrix vector multiplication circuit and calculation method |
| CN110648706A (en) * | 2019-09-02 | 2020-01-03 | 中国科学院微电子研究所 | Three-dimensional resistive random access memory and reading circuit thereof |
| CN110797062A (en) * | 2019-09-17 | 2020-02-14 | 华中科技大学 | Memristor read-write circuit and method |
| CN111462802A (en) * | 2019-01-22 | 2020-07-28 | 上海汉容微电子有限公司 | Reading circuit of NOR flash memory |
| CN111755036A (en) * | 2019-03-27 | 2020-10-09 | 中芯国际集成电路制造(上海)有限公司 | Frequency comparison type reading amplification circuit |
| CN112292727A (en) * | 2018-06-27 | 2021-01-29 | 江苏时代全芯存储科技股份有限公司 | Memory driving device |
| CN117157990A (en) * | 2021-04-12 | 2023-12-01 | 特忆智能科技 | Artificial intelligent pixel sensor based on memristor |
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| CN109920461A (en) * | 2017-12-12 | 2019-06-21 | 杭州潮盛科技有限公司 | A kind of resistance-variable storing device based on thin film transistor (TFT) |
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| CN111755036A (en) * | 2019-03-27 | 2020-10-09 | 中芯国际集成电路制造(上海)有限公司 | Frequency comparison type reading amplification circuit |
| CN110597487A (en) * | 2019-08-26 | 2019-12-20 | 华中科技大学 | Matrix vector multiplication circuit and calculation method |
| CN110648706A (en) * | 2019-09-02 | 2020-01-03 | 中国科学院微电子研究所 | Three-dimensional resistive random access memory and reading circuit thereof |
| CN110797062A (en) * | 2019-09-17 | 2020-02-14 | 华中科技大学 | Memristor read-write circuit and method |
| CN110797062B (en) * | 2019-09-17 | 2021-07-06 | 华中科技大学 | Memristor read-write circuit and method |
| CN117157990A (en) * | 2021-04-12 | 2023-12-01 | 特忆智能科技 | Artificial intelligent pixel sensor based on memristor |
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