CN107167975A - A kind of array base palte, its detection method, display panel and display device - Google Patents
A kind of array base palte, its detection method, display panel and display device Download PDFInfo
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- CN107167975A CN107167975A CN201710571823.3A CN201710571823A CN107167975A CN 107167975 A CN107167975 A CN 107167975A CN 201710571823 A CN201710571823 A CN 201710571823A CN 107167975 A CN107167975 A CN 107167975A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13454—Drivers integrated on the active matrix substrate
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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- Optics & Photonics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a kind of array base palte, its detection method, display panel and display device, by setting the signal output unit being connected with each grid line, with the scanning signal output that will be inputted on each grid line, and 2N bars transmission line is set and all signal output units are divided into 2N unit group, each unit group is set to connect one to one a bars transmission line, so that the scanning signal of all signal output units output in same unit group is exported to outside detection means by a bars transmission line, all signal output units in i.e. same unit group share a bars transmission line, so as to set less signal transmssion line to export the scanning signal on whole grid lines to outside detection means to realize the detection to whole scanning signals.And because the signal transmssion line of setting is less, the cabling arrangement space and reduction technique that can also save array base palte prepare difficulty.
Description
Technical field
The present invention relates to display technology field, more particularly to a kind of array base palte, its detection method, display panel and display
Device.
Background technology
With developing rapidly for Display Technique, direction of the display increasingly towards high integration and low cost is developed.Its
In, GOA (Gate Driver on Array, array base palte row driving) technology by TFT (Thin Film Transistor, it is thin
Film transistor) gate driving circuit is integrated in form the turntable driving to display panel on the array base palte of display panel, from
And binding (Bonding) region of grid integrated circuits (IC, Integrated Circuit) can be saved and (Fan- is fanned out to
Out) the wiring space in region, not only can be in material cost and the aspect reduction product cost of manufacture craft two, and can make
Display panel accomplishes symmetrical and narrow frame the design for aesthetic in both sides；Also, this integrated technique may be omitted with controlling grid scan line
The Bonding techniques in direction, so as to improve production capacity and yield.
Existing array base palte is generally comprised：A plurality of grid line and the GOA circuits being connected with each bar grid line；Wherein, GOA electricity
The shift register for routeing multiple cascades is constituted, for inputting scanning signal to each bar grid line successively, to control often row grid line pair
The pixel answered is opened.In technique preparation flow, in order to ensure that the GOA circuits formed on array base palte being capable of normal work, one
As need to detect each scanning signal of GOA circuit outputs.However, because the wiring of array base palte is limited, can not
Each scanning signal for GOA circuit outputs sets a cabling to be exported scanning signal and be used to detect, one respectively
As connected up only for the scanning signal of most preceding several shift registers and last several shift register outputs, cause to be only capable of
Scanning signal for subregion is detected, so that the scanning signal in remaining region in addition to above-mentioned subregion goes out
It will be unable to be detected during existing unfavorable condition, and then cause to be unfavorable for the whole scanning signal of detection.
The content of the invention
The embodiment of the present invention provides a kind of array base palte, its detection method, display panel and display device, existing to solve
There is the problem of being unfavorable for whole scanning signals on detection array base palte in technology.
Therefore, the embodiments of the invention provide a kind of array base palte, including：A plurality of grid line；Also include：With each grid line
One-to-one signal output unit and intersects with each grid line and insulation set 2N bars transmission lines, N is just whole
Number；By all signal output units be divided into each signal output unit in 2N unit group, same unit group respectively with
Connected every the grid line of 2N-1 rows, and the same unit group connects same signal transmssion line, different units group connection unlike signal
Transmission line；
Each signal output unit is used for the effective voltage of the scanning signal inputted on the grid line of connection more than default
During threshold voltage, the scanning signal is exported into the signal transmssion line to connection.
Preferably, in above-mentioned array base palte provided in an embodiment of the present invention, each signal output unit includes：Switch
Transistor, the predetermined threshold value voltage is the threshold voltage of the switching transistor；
The grid of the switching transistor and source electrode are connected with corresponding grid line, the drain electrode of the switching transistor with it is right
The signal transmssion line connection answered.
Preferably, in above-mentioned array base palte provided in an embodiment of the present invention, the array base palte also includes：With it is each described
The a plurality of data lines of grid line intersection and insulation set, each signal transmssion line is with each data wire with layer same material.
Preferably, in above-mentioned array base palte provided in an embodiment of the present invention, the array base palte also includes：Positioned at described
The non-display area of array base palte and the calibrating terminal electrically connected with each signal transmssion line one-to-one corresponding.
Preferably, in above-mentioned array base palte provided in an embodiment of the present invention, N=1, the array base palte also includes：One
Individual gate driving circuit；The gate driving circuit includes the multi-stage shift register of cascade, and the shift register at different levels
It is connected respectively a grid line.
Preferably, in above-mentioned array base palte provided in an embodiment of the present invention, N=2, the array base palte also includes：Two
Individual gate driving circuit；Each gate driving circuit includes the multi-stage shift register of cascade；
The shift registers at different levels of a gate driving circuit in described two gate driving circuits are connected respectively
One grid line of odd-numbered line, the shift registers at different levels of another gate driving circuit are connected respectively a grid of even number line
Line.
Correspondingly, the embodiment of the present invention additionally provides a kind of display panel, including above-mentioned provided in an embodiment of the present invention
A kind of array base palte.
Correspondingly, the embodiment of the present invention additionally provides a kind of display device, including provided in an embodiment of the present invention above-mentioned aobvious
Show panel.
Correspondingly, the embodiment of the present invention additionally provides a kind of detection to above-mentioned array base palte provided in an embodiment of the present invention
Method, including：
Each external testing probe and each signal transmssion line are corresponded and turned on, and controls the gate driving circuit successively
Scanning signal is inputted to the grid line of connection, corresponding signal on each signal transmssion line is obtained；Wherein, for a grid line,
When the effective voltage of scanning signal on the grid line is more than predetermined threshold value voltage, the signal output list being connected with the grid line
Member exports the scanning signal signal transmssion line to connection.
Preferably, it is right on each signal transmssion line is obtained in above-mentioned detection method provided in an embodiment of the present invention
Also include after the signal answered：Each bars transmission line is directed to using oscillograph, by the signal transmssion line got
The waveform of the waveform of signal and preset standard signal is compared, and determines the unusual waveforms in the signal transmssion line signal；
Unusual waveforms according to determining determine the corresponding scanning signal of the unusual waveforms, and according to the scanning determined
Signal determines the series of shift register in corresponding gate driving circuit.
The present invention has the beneficial effect that：
Array base palte provided in an embodiment of the present invention, its detection method, display panel and display device, by setting and often
The signal output unit of one grid line connection, the scanning signal inputted on each grid line is exported, and sets 2N bars letter
All signal output units are simultaneously divided into 2N unit group by number transmission line, each unit group is connected one to one bars biography
Defeated line, the scanning signal of all signal output units output in same unit group is exported by a bars transmission line
To outside detection means, i.e., all signal output units in same unit group share a bars transmission line, so as to
To set less signal transmssion line to export the scanning signal on whole grid lines to outside detection means to realize to whole
The detection of scanning signal.And because the signal transmssion line of setting is less, the cabling arrangement space of array base palte can also be saved
And reduction technique prepares difficulty.
Brief description of the drawings
Fig. 1 a are one of structural representation of array base palte provided in an embodiment of the present invention；
Fig. 1 b are the two of the structural representation of array base palte provided in an embodiment of the present invention；
Fig. 2 a are one of concrete structure schematic diagram of array base palte shown in Fig. 1 a；
Fig. 2 b are the two of the concrete structure schematic diagram of the array base palte shown in Fig. 1 b；
Fig. 3 a are the signal sequence schematic diagram of the array base palte shown in Fig. 2 a；
Fig. 3 b are the signal sequence schematic diagram of the array base palte shown in Fig. 2 b；
Fig. 4 is the flow chart of detection method provided in an embodiment of the present invention.
Embodiment
In order that the purpose of the present invention, technical scheme and advantage are clearer, below in conjunction with the accompanying drawings, to the embodiment of the present invention
The array base palte of offer, its driving method, the embodiment of display panel and display device are described in detail.Should
Understand, preferred embodiment disclosed below is merely to illustrate and explain the present invention, is not intended to limit the present invention.And not
In the case of conflict, the feature in embodiment and embodiment in the application can be mutually combined.
Size and shape of each figure etc. does not reflect the actual proportions of array base palte in accompanying drawing, and purpose is schematically illustrate
Present invention.
The embodiments of the invention provide a kind of array base palte, (by taking N=1 as an example, Fig. 1 b are with N=2 by Fig. 1 a with Fig. 1 b by such as Fig. 1 a
Exemplified by) shown in, including：The a plurality of grid line Gate_m (M of m=1,2,3 ...；M is the sum of grid line in array base palte)；With each grid line
The one-to-one signal output units 100 of Gate_m and intersect with each grid line Gate_m and insulation set 2N bars transmission
Line 200_n (2N of n=1,2,3 ...), N is positive integer；It is 2N unit group 300_n by 100 points of all signal output units, it is same
Each signal output unit 100 in unit group 300_n is connected with being spaced the grid line of 2N-1 rows respectively, and same unit group 300_n
Connect same signal transmssion line 200_n, different units group connection unlike signal transmission line；
The effective voltage that each signal output unit 100 is used for the scanning signal inputted on the grid line Gate_m of connection is more than
During predetermined threshold value voltage, scanning signal is exported into the signal transmssion line 200_n to connection.
Above-mentioned array base palte provided in an embodiment of the present invention, by setting the signal output list being connected with each grid line
Member, the scanning signal inputted on each grid line is exported, and sets 2N bars transmission line and by all signal outputs
Unit is divided into 2N unit group, each unit group is connected one to one a bars transmission line, by same unit group
The scanning signal of all signal output units output exported by a bars transmission line to outside detection means, i.e., it is same
All signal output units in individual unit group share a bars transmission line, so as to set less signal transmssion line will
Scanning signal on whole grid lines exports to outside detection means to realize the detection to whole scanning signals.And due to setting
The signal transmssion line put is less, and the cabling arrangement space and reduction technique that can also save array base palte prepare difficulty.
In the specific implementation, above-mentioned array base palte provided in an embodiment of the present invention can also include setting each grid line and each
The underlay substrate of signal output unit.
There are multiple pixel cells in general array base palte, in the specific implementation, provided in an embodiment of the present invention above-mentioned
In array base palte, the effective impulse signal of scanning signal can open each pixel cell of correspondence row grid line connection.The scanning is believed
Number the voltage of effective impulse signal be its effective voltage, the effective voltage can be high voltage, or can also be low electricity
Pressure, is not limited thereto.
In the specific implementation, in above-mentioned array base palte provided in an embodiment of the present invention, as shown in Fig. 2 a and Fig. 2 b, each letter
Number output unit 100 can specifically include：Switching transistor M0, predetermined threshold value voltage is switching transistor M0 threshold voltage；
Switching transistor M0 grid and source electrode are connected with corresponding grid line, switching transistor M0 drain electrode with it is corresponding
Signal transmssion line is connected.Wherein, switching transistor M0 can be thin film transistor (TFT) (TFT, Thin Film Transistor),
It can also be metal oxide semiconductor field effect tube (MOS, Metal Oxide Scmiconductor), be not limited thereto.
In the specific implementation, in above-mentioned array base palte provided in an embodiment of the present invention, as shown in Fig. 2 a and Fig. 2 b, switch
Transistor M0 can be N-type transistor.Certainly, switching transistor can also be P-type transistor, be not limited thereto.
In the specific implementation, in above-mentioned array base palte provided in an embodiment of the present invention, switching transistor is in its grid
The voltage of signal is more than its threshold voltage VthWhen turn on, its grid signal voltage be less than or equal to its threshold voltage Vth
When end.In actual applications, threshold voltage VthCan be 0.7v, certain threshold voltage can also be other magnitudes of voltage, this
Need to design determination according to actual application environment, be not limited thereto.
It the above is only the concrete structure for illustrating signal output unit provided in an embodiment of the present invention, in specific implementation
When, the concrete structure of signal output unit is not limited to said structure provided in an embodiment of the present invention, can also be art technology
Other structures knowable to personnel, are not limited thereto.
The general calibrating terminal for being provided for being connected with external test arrangements in array base palte carrys out output signal, in tool
When body is implemented, in above-mentioned array base palte provided in an embodiment of the present invention, as shown in Fig. 1 a to Fig. 2 b, array base palte can also be wrapped
Include：Positioned at array base palte non-display area and correspond the calibrating terminal 400 that electrically connects with each signal transmssion line 200_n.
So can by calibrating terminal by the signal output on signal transmssion line to external test arrangements.
In the specific implementation, in above-mentioned array base palte provided in an embodiment of the present invention, as shown in Fig. 1 a and Fig. 2 a, array
Substrate can also include：One gate driving circuit GOA；Gate driving circuit GOA includes the multi-stage shift register SR of cascade
, and shift register SR (m) at different levels is connected respectively a grid line Gate_m (m).The gate driving circuit is successively to connection
Grid line input scanning signal, as shown in Figure 3 a, the scanning signal gate_ that adjacent rows grid line Gate_m and Gate_m+1 are inputted
M and gate_m+1 significant level no overlap.Wherein, as shown in Fig. 1 a and Fig. 2 a, N=1 can be made, now wrapped in array base palte
Include 2 bars transmission lines and all signal output units are divided into 2 unit groups.One grid so is set in array base palte
The number of the signal transmssion line of setting can be made minimum during the drive circuit of pole.It is of course also possible to make N=2, now in array base palte
Including 4 bars transmission lines and all signal output units are divided into 4 unit groups.Or N=3 can also be made, now
Array base palte includes 6 bars transmission lines and all signal output units are divided into 6 unit groups.Certainly, in reality
In, the setting of signal transmssion line number needs to design determination according to actual application environment, is not limited thereto.
Or, in the specific implementation, in above-mentioned array base palte provided in an embodiment of the present invention, such as Fig. 1 b and Fig. 2 b institutes
Show, array base palte can also include：Two gate driving circuit GOA_p (p=1,2)；Each gate driving circuit GOA_p includes level
The multi-stage shift register of connection
The shift register SR (1_k) at different levels of a gate driving circuit GOA_1 in two gate driving circuits are respectively
One grid line of correspondence connection odd-numbered line, another gate driving circuit GOA_1 shift register SR (2_k) at different levels are right respectively
A grid line of even number line should be connected.The two gate driving circuits input scanning signal, such as Fig. 3 b to the grid line of connection successively
Shown, scanning signal gate_m and gate_m+1 that adjacent rows grid line Gate_m and Gate_m+1 is inputted significant level have
It is overlapping, and the scanning signal gate_m and gate_m+2 for inputting the two grid line Gate_m and Gate_m+2 of one grid line in interval
Significant level no overlap.Wherein, as shown in Fig. 1 b and Fig. 2 b, N=2 can be made, now array base palte includes 4 bars biography
Defeated line and all signal output units are divided into 4 unit groups.Two gate driving circuits so are set in array base palte
When can make setting signal transmssion line number it is minimum.It is of course also possible to make N=3, now array base palte includes 6 letters
Number transmission line and all signal output units are divided into 6 unit groups.Certainly, in actual applications, signal transmssion line
Several settings needs to design determination according to actual application environment, is not limited thereto.
In the specific implementation, in above-mentioned array base palte provided in an embodiment of the present invention, first in gate driving circuit
The input signal end of Ghandler motion bit register is connected with frame trigger signal end, in addition to the first Ghandler motion bit register, remaining shifting at different levels
The output signal end that upper level shift register adjacent thereto is distinguished at the input signal end of bit register is connected.It can so adopt
The scanning signal exported with upper level has triggered next stage shift register and entered as the input signal of next stage shift register
Row displacement output.In actual applications, the effective impulse signal of the scanning signal of shift register outputs at different levels is general by clock
Signal output.When the scanning signal of upper level shift register output is normal signal, next stage shift register can be just
Often displacement output scanning signal.When the scanning signal of upper level shift register output is abnormal signal, if the abnormal signal
Effective voltage meet predetermined voltage range, error allow in the case of, will not make next stage shift register displacement output
Abnormal scanning signal；If the effective voltage of the abnormal signal is unsatisfactory for predetermined voltage range, next stage shift register output
Scanning signal can just shift the scanning signal of output abnormality or be output as the signal of no-voltage.In actual applications, shift
The structure and the course of work and shift register of the prior art of register are essentially identical, and its concrete composition part is ability
The those of ordinary skill in domain should be appreciated that what is had, will not be described here, and also should not be taken as limiting the invention.
In the specific implementation, in above-mentioned array base palte provided in an embodiment of the present invention, each gate driving circuit, each signal
Transmission line and each signal output unit may be contained within the non-display area of array base palte.
In the specific implementation, in above-mentioned array base palte provided in an embodiment of the present invention, as shown in Fig. 1 a to Fig. 2 b, array
Substrate can also include：Intersect with each grid line Gate_m and insulation set a plurality of data lines Data, each signal transmssion line 200_n
Can be with layer same material with each data wire Data.It can need not so increase and extra prepare each signal transmssion line 200_n's
Process, it is only necessary to each signal transmssion line 200_n and each data wire Data figure can be formed by a patterning processes, can
Simplify preparation technology, save production cost, improve production efficiency.
In the specific implementation, in above-mentioned array base palte provided in an embodiment of the present invention, as shown in Fig. 1 a to Fig. 2 b, each letter
Number transmission line 200_n and each data wire Data be arranged in parallel.Certainly, each signal transmssion line 200_n can not also be with data wire
Data be arranged in parallel, is not limited thereto.
In actual applications, external detection device can be oscillograph.Certainly, external detection device can also be other energy
The device of analysis and the whole scanning signals of research is enough in, is not limited thereto.
Below by taking the structure of the array base palte shown in Fig. 2 a and Fig. 2 b as an example, binding signal timing diagram is to the embodiment of the present invention
The course of work of the array base palte of offer in detection is illustrated.And be below using the effective voltage of each scanning signal as
High voltage and the effective voltage of each scanning signal are all higher than switching transistor M0 threshold voltage Vth, and grid line Gate_7 is defeated
Enter scanning signal gate_7 to illustrate exemplified by abnormal signal.
Embodiment one,
By taking the array base palte shown in Fig. 2 a as an example, each grid line Gate_m inputted in the array base palte scanning signal
Gate_m is as shown in Figure 3 a.In fig. 3 a, the signal on Sn_1 representation signals transmission line 200_1, Sn_2 representation signal transmission lines
Signal on 200_2.
It is effective due to scanning signal gate_1 when the scanning signal gate_1 that grid line Gate_1 is inputted is effective voltage
Voltage is more than switching transistor M0 threshold voltage Vth, therefore grid line Gate_1 connections switching transistor M0 by scanning signal
Gate_1, which is exported, gives signal transmssion line 200_1, so that now the signal Sn_1 on signal transmssion line 200_1 is with scanning signal
The signal of gate_1 effective voltage.When the scanning signal gate_2 that grid line Gate_2 is inputted is effective voltage, due to scanning
Signal gate_2 effective voltage is more than switching transistor M0 threshold voltage Vth, therefore the switch crystal of grid line Gate_2 connections
Scanning signal gate_2 is exported and is given signal transmssion line 200_2 by pipe M0, so that the now signal Sn_2 on signal transmssion line 200_2
For the signal of the effective voltage with scanning signal gate_2.
Similarly, when the scanning signal gate_3 that grid line Gate_3 is inputted is effective voltage, on signal transmssion line 200_1
Signal Sn_1 is the signal of the effective voltage with scanning signal gate_3.The scanning signal gate_4 inputted in grid line Gate_4
During for effective voltage, the signal Sn_2 on signal transmssion line 200_2 is the signal of the effective voltage with scanning signal gate_4.
When the scanning signal gate_5 that grid line Gate_5 is inputted is effective voltage, the signal Sn_1 on signal transmssion line 200_1 is tool
There is the signal of scanning signal gate_5 effective voltage.It is effective voltage in the grid line Gate_6 scanning signal gate_6 inputted
When, the signal Sn_2 on signal transmssion line 200_2 is the signal of the effective voltage with scanning signal gate_6.In grid line
When the scanning signal gate_7 of Gate_7 inputs is effective voltage, the signal Sn_1 on signal transmssion line 200_1 is with scanning
The signal of signal gate_7 effective voltage.When the scanning signal gate_8 that grid line Gate_8 is inputted is effective voltage, signal
Signal Sn_2 on transmission line 200_2 is the signal of the effective voltage with scanning signal gate_8.
In addition, when the scanning signal that remaining grid line is sequentially input is effective voltage, if the scanning letter of remaining grid line input
Number effective voltage be all higher than switching transistor M0 threshold voltage VthWhen, then the signal on signal transmssion line 200_n is now
The signal of effective voltage with these scanning signals.If effective electricity of the scanning signal of the grid line input in remaining grid line
Threshold voltage V of the pressure less than or equal to switching transistor M0thWhen, the signal on signal transmssion line 200_n is now no-voltage.
When whole scanning signals for above-mentioned array base palte are tested, it can be obtained and believed by external detection device
Signal Sn_1 on number transmission line 200_1 and obtain signal Sn_2 on signal transmssion line 200_2.Oscillography can be used afterwards
Device is directed to each bars transmission line 200_n, by signal Sn_n waveform on the signal transmssion line 200_n got and pre- bidding
The waveform of calibration signal is compared, and determines the unusual waveforms in signal transmssion line 200_n signals Sn_n；And it is different according to what is determined
Ordinary wave shape determines the corresponding scanning signal of unusual waveforms, and determines corresponding raster data model electricity according to the scanning signal determined
The series of shift register in road.The analysis and research to whole scanning signals so can be achieved.
Specifically, signal transmssion line 200_1 is directed to using oscillograph, by signal on the signal transmssion line 200_1 got
Sn_1 waveform is compared with the waveform of corresponding preset standard signal, is determined in signal transmssion line 200_1 signals Sn_1
Unusual waveforms；Unusual waveforms according to determining determine the unusual waveforms in the corresponding scanning signal of unusual waveforms, signal Sn_1
Correspondence scanning signal gate_7, so as to determine corresponding gate driving circuit according to the scanning signal gate_7 determined
The series of shift register in GOA, that is, correspond to the 7th grade of shift register SR (7) in gate driving circuit GOA, so as to
Go out the 7th grade of shift register SR (7) output abnormality.Also, signal transmssion line 200_2 is directed to using oscillograph, by what is got
Signal Sn_2 waveform is compared with the waveform of corresponding preset standard signal on signal transmssion line 200_2, it may be determined that letter
Waveform without exception in number transmission line 200_2 signals Sn_2.
Furthermore it is also possible to which the delay of whole scanning signals is analyzed and studied by external detection device.
Embodiment two,
By taking the array base palte shown in Fig. 2 b as an example, each grid line Gate_m inputted in the array base palte scanning signal
Gate_m is as shown in Figure 3 b.In fig 3b, the signal on Sn_1 representation signals transmission line 200_1, Sn_2 representation signal transmission lines
Letter on signal on signal on 200_2, Sn_3 representation signal transmission lines 200_3, Sn_4 representation signal transmission lines 200_4
Number.
It is effective due to scanning signal gate_1 when the scanning signal gate_1 that grid line Gate_1 is inputted is effective voltage
Voltage is more than switching transistor M0 threshold voltage Vth, therefore grid line Gate_1 connections switching transistor M0 by scanning signal
Gate_1, which is exported, gives signal transmssion line 200_1, so that now the signal Sn_1 on signal transmssion line 200_1 is with scanning signal
The signal of gate_1 effective voltage.When the scanning signal gate_2 that grid line Gate_2 is inputted is effective voltage, due to scanning
Signal gate_2 effective voltage is more than switching transistor M0 threshold voltage Vth, therefore the switch crystal of grid line Gate_2 connections
Scanning signal gate_2 is exported and is given signal transmssion line 200_2 by pipe M0, so that the now signal Sn_2 on signal transmssion line 200_2
For the signal of the effective voltage with scanning signal gate_2.It is effective electricity in the grid line Gate_3 scanning signal gate_3 inputted
During pressure, because scanning signal gate_3 effective voltage is more than switching transistor M0 threshold voltage Vth, therefore grid line Gate_3
The switching transistor M0 of connection, which exports scanning signal gate_3, gives signal transmssion line 200_3, so that now signal transmssion line
Signal Sn_3 on 200_3 is the signal of the effective voltage with scanning signal gate_3.The scanning inputted in grid line Gate_4
When signal gate_4 is effective voltage, because scanning signal gate_4 effective voltage is more than switching transistor M0 threshold voltage
Vth, therefore scanning signal gate_4 exports and gives signal transmssion line 200_4 by the switching transistor M0 of grid line Gate_4 connections, so that
Now the signal Sn_4 on signal transmssion line 200_4 is the signal of the effective voltage with scanning signal gate_4.
Similarly, when the scanning signal gate_5 that grid line Gate_5 is inputted is effective voltage, on signal transmssion line 200_1
Signal Sn_1 is the signal of the effective voltage with scanning signal gate_5.The scanning signal gate_6 inputted in grid line Gate_6
During for effective voltage, the signal Sn_2 on signal transmssion line 200_2 is the signal of the effective voltage with scanning signal gate_6.
When the scanning signal gate_7 that grid line Gate_7 is inputted is effective voltage, the signal Sn_3 on signal transmssion line 200_3 is tool
There is the signal of scanning signal gate_7 effective voltage.It is effective voltage in the grid line Gate_8 scanning signal gate_8 inputted
When, the signal Sn_4 on signal transmssion line 200_4 is the signal of the effective voltage with scanning signal gate_8.
In addition, when the scanning signal that remaining grid line is sequentially input is effective voltage, if the scanning letter of remaining grid line input
Number effective voltage be all higher than switching transistor M0 threshold voltage VthWhen, then the signal on signal transmssion line 200_n is now
The signal of effective voltage with these scanning signals.If effective electricity of the scanning signal of the grid line input in remaining grid line
Threshold voltage V of the pressure less than or equal to switching transistor M0thWhen, the signal on signal transmssion line 200_n is now no-voltage.
When whole scanning signals for above-mentioned array base palte are tested, it can be obtained and believed by external detection device
Signal Sn_1 on number transmission line 200_1, the signal Sn_2 obtained on signal transmssion line 200_2, obtain signal transmssion line 200_3
On signal Sn_3 and obtain signal Sn_4 on signal transmssion line 200_4.Each can be directed to using oscillograph afterwards
Signal transmssion line 200_n, by signal Sn_n waveform on the signal transmssion line 200_n got and the waveform of preset standard signal
It is compared, determines the unusual waveforms in signal transmssion line 200_n signals Sn_n；And determined according to the unusual waveforms determined different
The corresponding scanning signal of ordinary wave shape, and shift LD in corresponding gate driving circuit is determined according to the scanning signal determined
The series of device.The analysis and research to whole scanning signals so can be achieved.
Specifically, signal transmssion line 200_1 is directed to using oscillograph, by signal on the signal transmssion line 200_1 got
Sn_1 waveform is compared with the waveform of corresponding preset standard signal, it may be determined that signal transmssion line 200_1 signals Sn_1
In waveform without exception.Signal transmssion line 200_2 is directed to using oscillograph, by signal Sn_ on the signal transmssion line 200_2 got
2 waveform is compared with the waveform of corresponding preset standard signal, it may be determined that nothing in signal transmssion line 200_2 signals Sn_2
Unusual waveforms.Signal transmssion line 200_3 is directed to using oscillograph, by signal Sn_3 on the signal transmssion line 200_3 got
Waveform is compared with the waveform of corresponding preset standard signal, determines the extraordinary wave in signal transmssion line 200_3 signals Sn_3
Shape；Unusual waveforms according to determining determine the corresponding scanning signal of unusual waveforms, you can determine the extraordinary wave in signal Sn_3
Shape correspondence scanning signal gate_7, so as to determine corresponding gate driving circuit according to the scanning signal gate_7 determined
The series of shift register in GOA_1, that is, correspond to the fourth stage shift register SR (1_4) in gate driving circuit GOA_1, from
And the fourth stage shift register SR (1_4) output abnormality can be drawn.Also, signal transmssion line 200_4 is directed to using oscillograph,
Signal Sn_4 waveform on the signal transmssion line 200_4 got is compared with the waveform of corresponding preset standard signal,
Waveform without exception in signal transmssion line 200_4 signals Sn_4 can be determined.
Furthermore it is also possible to which the delay of whole scanning signals is analyzed and studied by external detection device.
In actual applications, the signal on each signal transmssion line corresponds a preset standard signal.Each pre- bidding
Calibration signal is respectively effective arteries and veins of the scanning signal on the corresponding grid line of switching transistor that corresponding signal transmssion line is connected
Rush the superposition of signal.
Based on same inventive concept, the embodiment of the present invention additionally provides one kind to above-mentioned array provided in an embodiment of the present invention
The detection method of substrate, as shown in figure 4, including：
S401, each external testing probe and each signal transmssion line corresponded turned on, and control gate drive circuit according to
The secondary grid line to connection inputs scanning signal, obtains corresponding signal on each signal transmssion line；Wherein, for a grid line,
When the effective voltage of scanning signal on grid line is more than predetermined threshold value voltage, the signal output unit being connected with grid line, which will be scanned, to be believed
Number export the signal transmssion line to connection.
In the specific implementation, in above-mentioned detection method provided in an embodiment of the present invention, on each signal transmssion line is obtained
Also include after corresponding signal：Each bars transmission line is directed to using oscillograph, will be believed on the signal transmssion line got
Number the waveform of waveform and preset standard signal be compared, determine the unusual waveforms in signal transmssion line signal；
Unusual waveforms according to determining determine the corresponding scanning signal of unusual waveforms, and according to the scanning signal determined
Determine the series of shift register in corresponding gate driving circuit.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of display panel, including the embodiment of the present invention is carried
Any of the above-described kind of array base palte supplied.The principle that the display panel solves problem is similar to aforementioned array substrate, therefore the display
The implementation of panel may refer to the implementation of above-mentioned array base palte, repeats part and will not be repeated here.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of display device, including the embodiment of the present invention is carried
The above-mentioned display panel supplied.The display device can be：Mobile phone, tablet personal computer, television set, display, notebook computer, number
Any product or part with display function such as photo frame, navigator.For other essential compositions of the display device
Part is that it will be apparent to an ordinarily skilled person in the art that have, will not be described here, and also be should not be used as to the present invention's
Limitation.The implementation of the display device may refer to the embodiment of above-mentioned array base palte, repeats part and repeats no more.
Array base palte provided in an embodiment of the present invention, its detection method, display panel and display device, by setting and often
The signal output unit of one grid line connection, the scanning signal inputted on each grid line is exported, and sets 2N bars letter
All signal output units are simultaneously divided into 2N unit group by number transmission line, each unit group is connected one to one bars biography
Defeated line, the scanning signal of all signal output units output in same unit group is exported by a bars transmission line
To outside detection means, i.e., all signal output units in same unit group share a bars transmission line, so as to
To set less signal transmssion line to export the scanning signal on whole grid lines to outside detection means to realize to whole
The detection of scanning signal.And because the signal transmssion line of setting is less, the cabling arrangement space of array base palte can also be saved
And reduction technique prepares difficulty.
Obviously, those skilled in the art can carry out the essence of various changes and modification without departing from the present invention to the present invention
God and scope.So, if these modifications and variations of the present invention belong to the scope of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to comprising including these changes and modification.
Claims (10)
1. a kind of array base palte, including：A plurality of grid line；Characterized in that, also including：With each one-to-one signal of grid line
Output unit and intersect with each grid line and insulation set 2N bars transmission lines, N is positive integer；By all letters
Each signal output unit that number output unit is divided into 2N unit group, same unit group connects with being spaced the grid line of 2N-1 rows respectively
Connect, and the same unit group connects same signal transmssion line, different units group connection unlike signal transmission line；
The effective voltage that each signal output unit is used for the scanning signal inputted on the grid line of connection is more than predetermined threshold value
During voltage, the scanning signal is exported into the signal transmssion line to connection.
2. array base palte as claimed in claim 1, it is characterised in that each signal output unit includes：Switching transistor,
The predetermined threshold value voltage is the threshold voltage of the switching transistor；
The grid of the switching transistor and source electrode are connected with corresponding grid line, the drain electrode of the switching transistor with it is corresponding
Signal transmssion line is connected.
3. array base palte as claimed in claim 1, it is characterised in that the array base palte also includes：Handed over each grid line
The a plurality of data lines of fork and insulation set, each signal transmssion line is with each data wire with layer same material.
4. array base palte as claimed in claim 1, it is characterised in that the array base palte also includes：Positioned at the array base
The non-display area of plate and the calibrating terminal electrically connected with each signal transmssion line one-to-one corresponding.
5. the array base palte as described in claim any one of 1-4, it is characterised in that N=1, the array base palte also includes：One
Individual gate driving circuit；The gate driving circuit includes the multi-stage shift register of cascade, and the shift register at different levels
It is connected respectively a grid line.
6. the array base palte as described in claim any one of 1-4, it is characterised in that N=2, the array base palte also includes：Two
Individual gate driving circuit；Each gate driving circuit includes the multi-stage shift register of cascade；
The shift registers at different levels of a gate driving circuit in described two gate driving circuits are connected respectively odd number
A capable grid line, the shift registers at different levels of another gate driving circuit are connected respectively a grid line of even number line.
7. a kind of display panel, it is characterised in that including the array base palte as described in claim any one of 1-6.
8. a kind of display device, it is characterised in that including display panel as claimed in claim 7.
9. a kind of detection method of array base palte to as described in claim 5 or 6, it is characterised in that including：
Each external testing probe and each signal transmssion line are corresponded and turned on, and controls the gate driving circuit successively to even
The grid line input scanning signal connect, obtains corresponding signal on each signal transmssion line；Wherein, for a grid line, in institute
When the effective voltage for stating the scanning signal on grid line is more than predetermined threshold value voltage, the signal output unit being connected with the grid line will
The scanning signal exports the signal transmssion line to connection.
10. detection method as claimed in claim 9, it is characterised in that the corresponding letter on each signal transmssion line is obtained
Also include after number：Each bars transmission line is directed to using oscillograph, by signal on the signal transmssion line got
The waveform of waveform and preset standard signal is compared, and determines the unusual waveforms in the signal transmssion line signal；
Unusual waveforms according to determining determine the corresponding scanning signal of the unusual waveforms, and according to the scanning signal determined
Determine the series of shift register in corresponding gate driving circuit.
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| CN201710571823.3A CN107167975A (en) | 2017-07-13 | 2017-07-13 | A kind of array base palte, its detection method, display panel and display device |
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| CN201710571823.3A CN107167975A (en) | 2017-07-13 | 2017-07-13 | A kind of array base palte, its detection method, display panel and display device |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108877610A (en) * | 2018-07-10 | 2018-11-23 | 京东方科技集团股份有限公司 | Array substrate and its detection method and display device |
| CN109036237A (en) * | 2018-09-30 | 2018-12-18 | 厦门天马微电子有限公司 | Display device |
| CN109859714A (en) * | 2019-03-27 | 2019-06-07 | 京东方科技集团股份有限公司 | A kind of shifting deposit unit, shift register, display device and detection method |
| CN110782833A (en) * | 2018-07-30 | 2020-02-11 | 成都京东方光电科技有限公司 | Display panel and display device |
| CN111599297A (en) * | 2020-06-19 | 2020-08-28 | 京东方科技集团股份有限公司 | Test circuit, test method and display device |
| CN114999413A (en) * | 2021-11-30 | 2022-09-02 | 荣耀终端有限公司 | Display screen and electronic equipment |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203870955U (en) * | 2014-04-15 | 2014-10-08 | 华映视讯（吴江）有限公司 | Display panel |
| CN104183225A (en) * | 2014-08-15 | 2014-12-03 | 上海天马微电子有限公司 | Driving device, array substrate and display device |
| CN105590607A (en) * | 2016-03-10 | 2016-05-18 | 京东方科技集团股份有限公司 | Gate driving circuit, testing method thereof, array substrate comprising gate driving circuit, and display device comprising array substrate |
| CN106448522A (en) * | 2016-10-20 | 2017-02-22 | 京东方科技集团股份有限公司 | Detection circuit, gate drive circuit and display panel |
-
2017
- 2017-07-13 CN CN201710571823.3A patent/CN107167975A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203870955U (en) * | 2014-04-15 | 2014-10-08 | 华映视讯（吴江）有限公司 | Display panel |
| CN104183225A (en) * | 2014-08-15 | 2014-12-03 | 上海天马微电子有限公司 | Driving device, array substrate and display device |
| CN105590607A (en) * | 2016-03-10 | 2016-05-18 | 京东方科技集团股份有限公司 | Gate driving circuit, testing method thereof, array substrate comprising gate driving circuit, and display device comprising array substrate |
| CN106448522A (en) * | 2016-10-20 | 2017-02-22 | 京东方科技集团股份有限公司 | Detection circuit, gate drive circuit and display panel |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108877610A (en) * | 2018-07-10 | 2018-11-23 | 京东方科技集团股份有限公司 | Array substrate and its detection method and display device |
| CN108877610B (en) * | 2018-07-10 | 2021-09-03 | 京东方科技集团股份有限公司 | Array substrate, detection method thereof and display device |
| CN110782833A (en) * | 2018-07-30 | 2020-02-11 | 成都京东方光电科技有限公司 | Display panel and display device |
| CN110782833B (en) * | 2018-07-30 | 2021-09-21 | 成都京东方光电科技有限公司 | Display panel and display device |
| CN109036237A (en) * | 2018-09-30 | 2018-12-18 | 厦门天马微电子有限公司 | Display device |
| CN109859714A (en) * | 2019-03-27 | 2019-06-07 | 京东方科技集团股份有限公司 | A kind of shifting deposit unit, shift register, display device and detection method |
| CN111599297A (en) * | 2020-06-19 | 2020-08-28 | 京东方科技集团股份有限公司 | Test circuit, test method and display device |
| CN111599297B (en) * | 2020-06-19 | 2023-12-15 | 京东方科技集团股份有限公司 | Test circuit, test method and display device |
| CN114999413A (en) * | 2021-11-30 | 2022-09-02 | 荣耀终端有限公司 | Display screen and electronic equipment |
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