CN107145182B - Input voltage pattern intends resistor and resistance control method - Google Patents
Input voltage pattern intends resistor and resistance control method Download PDFInfo
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- CN107145182B CN107145182B CN201710355873.8A CN201710355873A CN107145182B CN 107145182 B CN107145182 B CN 107145182B CN 201710355873 A CN201710355873 A CN 201710355873A CN 107145182 B CN107145182 B CN 107145182B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
Abstract
The present invention relates to a kind of input voltage patterns to intend resistor, it is characterised in that：Including the voltage source, voltage magnitude and impedance transformation, AD converter, processor, D/A converter and output driving part sequentially input, wherein processor receives the voltage value of AD converter input, the output that D/A converter is controlled further according to target resistance resistance value makes it export corresponding voltage signal control and generates required voltage.
Description
Technical field
The present invention relates to servo electrical equipment fields, are specifically related to a kind of quasi- resistor of input voltage pattern.
Background technology
It is manual that existing variable resistance, which has these traditional resistor casees of resistance box, mechanical potentiometer, digital regulation resistance,
Variable resistance, it is difficult to automatically adjust.In order to program-controlled adjust, also there is some program-controlled artifical resistances, most common way
For digital synthesis technology, by inputting fixed electric current, the program-controlled method for changing output voltage is carried out artifical resistance, is thus realized
The automatic conversion of resistance value.
The central principle of the program-controlled scheme be by the way that input voltage will be fixed by being sent to the reference edge of DAC after conversion,
As the reference voltage of output DAC, the deficiency of the program is the reference voltage by adjusting DAC so that DAC itself is in difference
Resistance value under the error that generates it is unstable, be difficult the error for solving thus to introduce by correcting, lead to finally obtained simulation
The stability of resistance is not satisfactory.
Because the precision of any DAC and ADC depends critically upon the performance of benchmark.If regarding input as DAC reference datas
So that entirely the precision of output DAC cannot be guaranteed.
Invention content
The problem of based on above method, this patent scheme acquires front end by ADC and fixes input voltage, according to electricity
Setting value is hindered, output end provides relevant voltage value by DAC, reaches artifical resistance purpose, by selecting appropriate reference voltage to make
Front-end A/D C and rear end DAC are operated in optimum state, cause error to evade de-regulation ADC and DAC reference voltage, though
Right front end introduces an ADC again, and conceptual design through the invention, the error that front-end A/D C is introduced is much smaller than adjusting with reference to electricity
Error caused by pressure is stablized to achieve the purpose that export artifical resistance.Also, in conjunction with error Producing reason, into the hand-manipulating of needle
Analysis and removal to property reduce the difficulty and workload of fitting.
It is realized than higher precision, more highly reliable and more low price various signal processings in analog domain also in numeric field
Function, number inhibit the ability of noise to be much larger than analog signal, in analog signal during storing and transmitting, noise and distortion
It can be accumulated, to generate undesirable effect to the processing of signal, and in numeric field, digital signal almost can be deposited nondestructively
Storage and transmission.
Specifically, the present invention provides a kind of quasi- resistor of input voltage pattern, it is characterised in that：Including what is sequentially input
Voltage source, voltage magnitude and impedance transformation, AD converter, processor, D/A converter and output driving part, wherein processor connect
The voltage value for receiving AD converter input controls the output of D/A converter further according to target resistance resistance value, makes the corresponding electricity of its output
Signal control is pressed to generate required voltage.
Further, it is characterised in that：The artifical resistance calculation carries out as follows：
Wherein UiIndicate input voltage value, RrefSample resistance value in indication circuit, U0Indicate sample resistance terminal voltage value,
I0It indicates to flow through current value in sample resistance.
Further, it is characterised in that：Wherein,D1The voltage magnitude read for processor and impedance become
Numerical value of the voltage exported after changing after AD converter converts, N1For AD converter digit, U1For the reference electricity of AD converter
Pressure.
Further, it is characterised in that：Wherein,D2For pair of output voltage needed for output driving part
Answer digital value, N2For D/A converter digit, U2For the reference voltage of D/A converter.
Further, it is characterised in that：Amendment for artifical resistance value, in the imbalance electricity for considering the operational amplifier
In the case of stream and offset voltage, the actual output voltage of operational amplifier and the error of desired output voltage are：
Wherein, UIOFor the offset voltage of the operational amplifier, offset current IB1And IB2Just for the operational amplifier
To the offset current of, negative input.
Further, it is characterised in that：Amendment for artifical resistance value, in the temperature drift for considering the operational amplifier
In the case of shifting, the actual output voltage of operational amplifier and the error of desired output voltage are：
Wherein, input offset current IB1、IB2Temperature drift be respectively TCIB1And TCIB2, input offset voltage UIOTemperature
Drift is TCV.
Further, it is characterised in that：In the case where considering the transformed error of AD converter：
Wherein, D1The input terminal voltage amplitude read for embeded processor and the voltage exported after impedance transformation pass through AD
Numerical value after converter transform, N1For AD converter digit, U1For the reference voltage of AD converter.
ΔUoppError caused by input offset current and offset voltage；
TC11Error caused by Δ T- importation temperature drifts；
NADCULSBADCTransformed error caused by AD converter；
NADCIt is determined according to actual measurement ADC error.
Further, it is characterised in that：The actual output voltage value U of the resistance simulation device0Calculation it is as follows：
Wherein, D2For the correspondence digital value of output voltage needed for output driving part, N2For D/A converter digit, U2For DA
The reference voltage of converter, TCP△ T are the output voltage error that output driving part temperature drift is brought, NDACULSBDACFor DA
Transformed error caused by converter.
Further, it is characterised in that：The calculation formula of artifical resistance value is as follows：
K1Indicate input voltage amplitude and impedance transformation part conversion coefficient；
K2Indicate output driving part conversion coefficient.
Description of the drawings
Input voltage pattern intends resistance principle figure to Fig. 1 in the prior art；
Fig. 2 is the input voltage type simulative resistance circuit block diagram of the present invention；
Fig. 3 is the input voltage type simulative resistance circuit schematic diagram of the present invention；
Fig. 4 is the voltage magnitude and impedance inverter circuit error model figure of the present invention；
Fig. 5 is the output driving part error model figure of the present invention.
Specific implementation mode
In order to make those skilled in the art be better understood from the present invention, the present invention is made with implementation below in conjunction with the accompanying drawings
It is described in further detail.
As shown in Fig. 2, showing the voltage drive resistor circuit block diagram of the present invention, first, voltage magnitude and impedance become
Change circuit (physical circuit is as shown in Figure 4) acquisition input voltage UiSignal, and signal is improved, to meet AD converter
Input requirements；Then, high-precision AD converter acquires the voltage and is input in embeded processor, embeded processor pair
Voltage is handled using filtering, error correction scheduling algorithm, further according to set combined resistance resistance value RxControl D/A converter
Output, so that its is exported corresponding voltage signal, while passing through output equipment and showing voltage, electric current and resistance value；Finally, it uses
The voltage signal that D/A converter exports is transmitted to delivery outlet by output driving circuit.
As shown in figure 3, showing the control source type simulative resistance circuit schematic diagram of the present invention, can obtain, resistor resistance value
Calculation formula it is as follows：
In formula：UiIndicate input voltage value；
RrefSample resistance value in indication circuit；
U0Indicate sample resistance terminal voltage value (relative to output reference point)；
I0It indicates to flow through current value in sample resistance；
U1Indicate ADC portion reference voltage；
U2Indicate DAC portion reference voltage；
K1Indicate input voltage amplitude and impedance transformation part conversion coefficient；
K2Indicate output driving part conversion coefficient；
D1Indicate that ADC portion exports digital quantity；
D2Indicate that DAC portion inputs digital quantity；
Can be seen that from the above expression formula, which influences the parameter that final resistance exports accuracy of measurement, has and the input relevant electricity of amplifier
Pressure amplitude value and impedance inverter circuit parameter, sample resistance precision, input ADC reference voltage precisions, output DAC reference voltage precisions
And output driving circuit parameter.
Further circuit error is analyzed, main includes input amplitude and impedance transformation part offset voltage and imbalance
The influence of electric current and temperature drift, the influence of ADC and DAC transformed errors, output driving part offset voltage and offset current
And the influence of temperature drift.The above error is mainly linearity error, it may be considered that is fitted by final calibration to eliminate.Tool
Body method is that processor receives the voltage value of AD converter input, and the output of D/A converter is controlled further according to target resistance resistance value,
So that it is exported corresponding voltage signal control and generates required voltage.By repeatedly input and repeatedly output valve adjustment, come pair
Adjusted value is fitted (for example, by using least square method), final to determine adjustment formula.
But, even if being linearity error, but it is more due to error, and the error curve integrated is also very multiple
Miscellaneous, to accurately be fitted, data volume needs are very big, in consideration of it, the present invention also provides a kind of analysis of source of error and removal and intending
The method for closing the mode that is combined to realize precise resistance value.
It 1), can be to input amplitude and impedance inverter circuit error analysis for first choice
It is as shown in Figure 4 that error separation is established to input amplitude and impedance inverter circuit, wherein two input terminal imbalances
Electric current is IB1And IB2, so-called offset current refers to that the both ends of operational amplifier in perfect condition are " void disconnected ", but in actual circuit
In, the positive-negative input end of operational amplifier has a small amount of electric current to flow into, this electric current is exactly offset current, and input offset voltage is
UIO, herein so-called offset voltage refer in the ideal situation, it is defeated when the voltage of the positive-negative input end of operational amplifier is identical
Go out voltage and is equal to 0, but in practice, operational amplifier must can just make defeated in an input terminal one small voltage of additional application
Go out voltage and be equal to 0V, which is offset voltage, it should be pointed out that offset current and offset voltage can pass through
It measures and obtains in advance, so passing through the operational amplifier input offset current and input offset voltage to the ADC stages before
Measured in advance, I can be obtainedB1、IB2And UIO, from fig. 4, it can be seen that it is respectively U+ and U-, stream to set amplifier input terminal voltage
Cross resistance R1And R2Electric current be respectively I1And I2.Following equation can be obtained by analysis：
U+=Ui+IB1·Rf+UIO
U-=I1R1
I2=I1+IB2
U+=U-
It lists solution of equation and obtains output voltage and be：
Wherein U+For the voltage value at the operational amplifier positive input terminal of importation, U-Just for importation operational amplifier
The input voltage of the voltage value of input end, input voltage type artifical resistance is Ui, resistance R1For importation operational amplifier
Sampling resistor between reverse input end and ground, resistance R2For importation operational amplifier reverse input end and output end it
Between sampling resistor, resistance RfThe input resistance connected by the positive input of importation operational amplifier, voltage UO’For
The output end voltage of importation operational amplifier.
And if the operational amplifier of importation handled as ideal operational amplifier, do not consider offset voltage
And the case where offset current, then ideally the output voltage values of the operational amplifier of importation are：
So, the presence for having operational amplifier offset voltage and offset current leads to the reality of ADC stage operational amplifiers
The error of output voltage and desired output voltage is
R1For the sampling resistor between the reverse input end and ground of importation operational amplifier
R2For the sampling resistor between the reverse input end and output end of importation operational amplifier
RfThe input resistance connected by the positive input of importation operational amplifier
UIOFor the offset voltage of importation operational amplifier
IB1For the offset current of importation operational amplifier positive input
IB2For the offset current of importation operational amplifier negative input
UIOFor the offset voltage of the operational amplifier, IB1And IB2It is positive, negative input for the operational amplifier
Offset current.
According to above-mentioned formula, revised simulation electricity can be obtained by being modified to the error in embeded processor
Resistance value, meanwhile, calibration fitting is reused to be modified.As soon as due to having lacked an error, the global error of data is relatively easy
Some, fitting is got up more quick and precisely.
2) secondly, further consider that the influence temperature drift that temperature drift brings input current type artifical resistance device is brought
Error influence
If input offset current IB1And IB2Temperature drift be respectively TCIB1And TCIB2, input offset voltage UIOTemperature is floated
It is TCV to move, and the error equation that temperature drift is brought, which can be obtained, is：
U+=Ui+TCIB1·ΔT·Rf+TCVΔT
U-=I1R1
I2=I1+TCIB2·ΔT
U+=U-
Solution of equation is listed to obtain
Ideally the output voltage values of the operational amplifier of importation are：
Analysis is it is found that with offset voltage and offset current, since temperature drift leads to ADC stage operations
Error between the actual output voltage and desired output voltage of amplifier is：
R1For the sampling resistor between the reverse input end and ground of importation operational amplifier
R2For the sampling resistor between the reverse input end and output end of importation operational amplifier
RfThe input resistance connected by the positive input of importation operational amplifier
TCV is the offset voltage temperature drift of importation operational amplifier
TCIB1For the offset current temperature drift of importation operational amplifier positive input
TCIB2For the offset current temperature drift of importation operational amplifier negative input
△ T are temperature drift amount
By the above two-part analysis it is found that the collected voltages of practical ADC are
According to above-mentioned formula, revised mould can be obtained by being modified to this two errors in embeded processor
Quasi- resistance value.Due to having lacked two errors, the global error of data is just relatively more simple, and fitting is got up more quick and precisely.
3) again, further consider the DA transformed errors of the AD converter and DAC stages in ADC stages
All there is transformed error in actually AD converter and D/A converter, be divided into static error and dynamic error.It generates quiet
The reason of state error, has, unstable, the null offset of amplifier of a reference source, the internal resistance and pressure drop when analog switch is connected and electricity
Hinder the deviation etc. of resistance value in network.Dynamic error is then the additive error generated in the dynamic process of conversion, it is due to electricity
The influence of distributed constant in road makes everybody voltage signal reach caused by the time difference of decoding network output end.Usually conversion
Error minimum output voltage ULSBMultiple indicate, i.e.,
ΔUo=NULSB
Wherein, ULSBIt is 1 to refer to ADC and DAC digital quantity lowest orders, remaining corresponding conversion voltage value when being 0, i.e.,
The maximum conversion digit that wherein n is ADC or DAC；
After being analyzed by ADC error, into the voltage value U after embeded processor actual correctioni' be
Wherein, D1The importation voltage magnitude read for embeded processor and the voltage exported after impedance transformation pass through
Numerical value after AD converter transformation, N1For AD converter digit, U1For the reference voltage of AD converter.
ΔUoppError caused by input offset current and offset voltage；
TC11Error caused by Δ T- importation temperature drifts；
NADCULSBADCTransformed error caused by AD converter；
NADCIt is determined according to actual measurement ADC error.
Further output par, c DAC errors are analyzed, analysis principle and error Producing reason are the same as above-mentioned ADC ranks
The error analysis of section is consistent.
ΔUDAC=NDACULSBDAC
Similarly, calibration fitting is carried out again by being modified to the error of these three types in embeded processor.
4) finally consider output driving part error
The error model of the part is as shown in figure 5, it is similar with Fig. 4.Following equation can be obtained by analysis：
U+'=UIO'-IB1'·Rf'
I1'=I2'+IB2'
U+'=U-'
It can obtain
Ideally
The error that can obtain output driving part output voltage is
△Uopo‘For output voltage error caused by output par, c operational amplifier offset electric current and offset voltage,
Rf’For the sampling resistor between the positive input and ground of output par, c operational amplifier
R3’The input resistance connected by the reverse input end of output par, c operational amplifier
R4’For the sampling resistor between the positive input and output end of output par, c operational amplifier
UIO’For the offset voltage of output par, c operational amplifier
IB1’For the offset current of output par, c operational amplifier positive input
IB2’For the offset current of output par, c operational amplifier negative input
UIO’For the offset voltage of the operational amplifier.
Output par, c operational amplifier temperature drift generate error expression be：
TCV ' is the offset voltage temperature drift of output par, c operational amplifier
TCIB1’For the offset current temperature drift of output par, c operational amplifier positive input
TCIB2’For the offset current temperature drift of output par, c operational amplifier negative input
△ T are temperature drift amount
It is so as to obtain the expression formula after output voltage progress error correction
D2For the correspondence digital value of output voltage needed for DAC stage voltages-electric pressure converter, N2For D/A converter digit, U2
For the reference voltage of D/A converter.
In summary each parameter error is further to expression formula of the final artifical resistance after error correction
Wherein
K1Indicate input voltage amplitude and impedance transformation part conversion coefficient；
K2Indicate output driving part conversion coefficient；
According to above-mentioned formula, the global error of circuit can be accurately calculated, then the formula is implanted into processor
It compensates, then accurately controls output voltage and be equal to setting voltage.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also answered
It is considered as protection scope of the present invention.In addition, although having used some specific terms, these terms to be only in this specification
For convenience of explanation, it does not limit the present invention in any way.
Claims (6)
1. input voltage pattern intends resistor, it is characterised in that：Including voltage source, voltage magnitude and the impedance transformation sequentially input
Circuit, AD converter, processor, D/A converter and output driving part, wherein processor receive the voltage of AD converter input
Value controls the output of D/A converter further according to target resistance resistance value, it is made to export required for corresponding voltage signal control generation
Voltage,
Wherein, the calculating of artifical resistance is carried out in the following way：
Wherein RxFor the resistor resistance value of required simulation, UiIndicate input voltage value, RrefSample resistance value in indication circuit, U0Table
Show sample resistance terminal voltage value, I0It indicates to flow through current value in sample resistance,
The voltage magnitude and impedance inverter circuit include the first operational amplifier, and positive input connects the voltage source,
It is also associated with high-precision fixed value resistance R simultaneouslyf, connect sampling resistor R between output end and ground1With R2, reverse input end connection
To sampling resistor R1With R2Between tie point,
The output driving part includes second operational amplifier, and positive input is connected with one second high-precision fixed resistance
Rf’, connect sampling resistor R between output end and output driving part input voltage3With R4, it is electric that reverse input end is connected to sampling
Hinder R3With R4Between tie point,
Amendment for artifical resistance value, it is also contemplated that the case where the offset current and offset voltage of first operational amplifier
Under, the error of the first operational amplifier, and its error is compensated in the processor, the offset current of the first operational amplifier and mistake
Error calculation formula is caused by adjusting voltage：
Wherein, Δ UoppError caused by offset current and offset voltage for the first operational amplifier, UIOFor the first operation amplifier
The offset voltage of device, IB1For the offset current of the first operational amplifier positive input, IB2It is defeated for the first operational amplifier negative sense
Enter the offset current at end,
R1For the sampling resistor between the reverse input end and ground of the first operational amplifier, R2For the reversed of the first operational amplifier
Sampling resistor between input terminal and output end, RfThe high-precision connected by the positive input of the first operational amplifier is fixed
It is worth resistance.
2. input voltage pattern according to claim 1 intends resistor, it is characterised in that：For repairing for artifical resistance value
Just, it is also contemplated that in the case of the temperature drift of first operational amplifier, the error of the first operational amplifier, and missed
Difference compensates in the processor, and error calculation formula is caused by the temperature drift of the first operational amplifier：
Wherein, TC11Δ T is error caused by the temperature drift of the first operational amplifier；R1For the reversed of the first operational amplifier
Sampling resistor between input terminal and ground, R2Sampling electricity between the reverse input end and output end of the first operational amplifier
Resistance, RfThe high-precision fixed value resistance connected by the positive input of the first operational amplifier, TCV are the first operational amplifier
Offset voltage temperature drift, TCIB1For the offset current temperature drift of the first operational amplifier positive input, TCIB2It is
The offset current temperature drift of one operational amplifier negative input, △ T are temperature drift amount.
3. input voltage pattern according to claim 2 intends resistor, it is characterised in that：It is also contemplated that AD converter and DA
The transformed error of converter, formula are respectively：
ΔUADC=NADCULSBADC；
ΔUDAC=NDACULSBDAC；
Wherein, Δ UADCFor the transformed error of AD converter；ΔUDACFor the transformed error of D/A converter；
ULSBADC、ULSBDACRespectively refer to AD converter, D/A converter input digital quantity lowest order is 1, remaining corresponding conversion when being 0
Voltage, i.e.,
Wherein n1, n2 indicate AD converter, D/A converter conversion number respectively
According to maximum number of digits, UrefFor reference voltage；
NADCIt is determined according to actual measurement AD converter error, NDACIt is determined according to actual measurement D/A converter error.
4. input voltage pattern according to claim 3 intends resistor, it is characterised in that：The voltage-type artifical resistance device
Amendment be also contemplated that error caused by second operational amplifier offset current and offset voltage, calculation is as follows：
Wherein, Δ UopoIt is error caused by second operational amplifier offset current and offset voltage,
Rf’The second high-precision fixed resistance between the positive input and ground of second operational amplifier,
R3The sampling resistor connected by the reverse input end of second operational amplifier,
R4For the sampling resistor between the positive input and output end of second operational amplifier,
UIO’For the offset voltage of second operational amplifier,
IB1’For the offset current of second operational amplifier positive input,
IB2’For the offset current of second operational amplifier negative input,
Further, it is also contemplated that the error that the second operational amplifier temperature drift of output driving part generates
Wherein, TCpΔ T is the error that second operational amplifier temperature drift generates,
R3The sampling resistor connected by the reverse input end of second operational amplifier,
R4For the sampling resistor between the positive input and output end of second operational amplifier,
TCV ' is the offset voltage temperature drift of second operational amplifier,
TCIB1’For the offset current temperature drift of second operational amplifier positive input,
TCIB2’For the offset current temperature drift of second operational amplifier negative input,
△ T are temperature drift amount.
5. input voltage pattern according to claim 4 intends resistor, it is characterised in that：Consider every error, mould
The calculation formula of quasi- resistance value is as follows：
D1The numerical value of the voltage magnitude read for processor and the voltage exported after impedance transformation after AD converter converts,
N1For AD converter digit,
U1For the reference voltage of AD converter,
D2For the correspondence digital value of output voltage needed for output driving part,
N2For D/A converter digit,
U2For the reference voltage of D/A converter,
K1Indicate input voltage amplitude and impedance transformation part conversion coefficient；
K2Indicate output driving part conversion coefficient.
6. a kind of input voltage pattern intends the resistance control method of resistor, it is characterised in that：Using any one of claim 1-5
The voltage-type artifical resistance device is controlled its resistance and is carried out using the method that fitting and error concealment combine.
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| PL3513698T3 (en) | 2018-01-17 | 2022-11-21 | Vorwerk & Co. Interholding Gmbh | Method for operating a heating element |
| CN108254702B (en) * | 2018-01-25 | 2020-05-05 | 常州同惠电子股份有限公司 | Resistor simulation device based on multiplication type digital-to-analog converter |
| CN110967548B (en) * | 2018-09-29 | 2022-03-04 | 株洲中车时代电气股份有限公司 | Program-controlled variable resistor device with current detection function and working method |
| CN109709362A (en) * | 2019-01-18 | 2019-05-03 | 南京优倍电气有限公司 | The circuit of artifical resistance is realized using DAC |
| CN110189790B (en) * | 2019-06-18 | 2021-04-09 | 北京控制与电子技术研究所 | Resistance measuring method based on nonvolatile memory |
| CN116581982A (en) * | 2021-11-26 | 2023-08-11 | 荣耀终端有限公司 | Power supply conversion circuit and electronic equipment |
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