CN107102678A - A kind of bias current generating circuit - Google Patents
A kind of bias current generating circuit Download PDFInfo
- Publication number
- CN107102678A CN107102678A CN201710395055.0A CN201710395055A CN107102678A CN 107102678 A CN107102678 A CN 107102678A CN 201710395055 A CN201710395055 A CN 201710395055A CN 107102678 A CN107102678 A CN 107102678A
- Authority
- CN
- China
- Prior art keywords
- nmos pass
- pass transistor
- grid
- bias current
- generating circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
Abstract
A kind of bias current generating circuit, belongs to semiconductor integrated circuit technical field.The circuit includes：The source electrode of first PMOS transistor connects power supply, and grid and drain electrode connect output end；The source electrode of second PMOS transistor connects power supply, and the grid of grid and the first PMOS transistor connects, and connects output end, and drain electrode connects the drain electrode of the grid and the second nmos pass transistor of the first nmos pass transistor；The drain electrode of first nmos pass transistor connects output, and source electrode connects the grid of the second nmos pass transistor and one end of first resistor；The other end ground connection of first resistor；The source ground of second nmos pass transistor.In the bias current generating circuit of the present invention, first nmos pass transistor, the second nmos pass transistor and first resistor constitute feedback loop, this loop greatly improves the anti-power supply noise ability of bias current, so that the bias current that the bias current generating circuit is provided has stronger anti-power supply noise ability.
Description
Technical field
The invention belongs to semiconductor integrated circuit technical field, and in particular to a kind of bias current generating circuit.
Background technology
Bias current is a kind of important references source in Analogous Integrated Electronic Circuits, is an indispensable part in system.
Traditional bias current generating circuit as shown in figure 1, including：By the first PMOS transistor P1, the first NMOS crystal
Start-up circuit and the second PMOS transistor P2 that pipe N1 and the second nmos pass transistor N2 are constituted, the 3rd PMOS transistor P3, the
The bias current circuit that three nmos pass transistor N3, the 4th nmos pass transistor N4 and resistance R1 are constituted；First PMOS transistor P1's
Source electrode connects power supply, and grid and drain electrode are connected and the drain electrode with the first nmos pass transistor N1 and the second nmos pass transistor N2 grid phase
Connect；First nmos pass transistor N1 source ground, grid connects with the 4th nmos pass transistor N4 grid；Second nmos pass transistor
N2 source ground, drain electrode meets voltage output end Uout；Second PMOS transistor P2 source electrode connects power supply, and grid meets the 3rd PMOS
Pipe P3 grid, grid and drain electrode are all connected to voltage output end Uout；3rd PMOS transistor P3 source electrode connects power supply, and drain electrode connects
4th nmos pass transistor N4 drain electrode, grid meets output Uout；3rd nmos pass transistor N3 drain electrode meets output voltage Uout, source
Pole is grounded, and grid connects the 4th nmos pass transistor N4 grid；4th nmos pass transistor N4 drain and gate is connected, and source electrode connects electricity
Hinder R1 one end, resistance R1 other end ground connection.
The bias current that the bias current generating circuit is produced has large change with the change of supply voltage.A lot
In the high integrated circuit modules of required precision, it may require that one changes bias current as small as possible with supply voltage.Tradition
Bias current generating circuit can not meet the requirement of High Definition Systems.
The content of the invention
To solve the bias current of existing bias current generating circuit generation with the big technical problem of mains voltage variations, sheet
Invention provides a kind of strong bias current generating circuit of anti-power supply noise ability.
A kind of bias current generating circuit, including：First PMOS transistor P1, the second PMOS transistor P2, the first NMOS
Transistor N1, the second nmos pass transistor N2 and first resistor R1；First PMOS transistor P1 source electrode connects power supply, grid and drain electrode
Meet output end UOUT；Second PMOS transistor P2 source electrode connects power supply, and grid and the first PMOS transistor P1 grid connect, and
Meet output end UOUT, the drain electrode of the drain grid and the second nmos pass transistor N2 that meet the first nmos pass transistor N1；First NMOS crystal
Pipe N1 drain electrode meets output UOUT, source electrode connects the second nmos pass transistor N2 grid and first resistor R1 one end；First resistor R1
The other end ground connection；Second nmos pass transistor N2 source ground.
In the bias current generating circuit of the present invention, the first nmos pass transistor N1, the second nmos pass transistor N2 and the first electricity
Resistance R1 constitutes feedback loop, and this loop greatly improves the anti-power supply noise ability of bias current, so that this is inclined
Putting the bias current of current generating circuit offer has stronger anti-power supply noise ability.
Brief description of the drawings
Fig. 1 is traditional bias current generating circuit structural representation；
Fig. 2 is the bias current generating circuit structural representation that embodiment of the present invention is provided.
Embodiment
To make the object, technical solutions and advantages of the present invention of greater clarity, with reference to embodiment and join
According to accompanying drawing, the present invention is described in more detail.It should be understood that these descriptions are merely illustrative, and it is not intended to limit this hair
Bright scope.In addition, in the following description, the description to known features and technology is eliminated, to avoid unnecessarily obscuring this
The concept of invention.
To solve the bias current of existing bias current generating circuit generation with the big technical problem of mains voltage variations, sheet
Invention provides a kind of strong bias current generating circuit of anti-power supply noise ability.As shown in Fig. 2 the bias current generating circuit
Including：First PMOS transistor P1, the second PMOS transistor P2, the first nmos pass transistor N1, the second nmos pass transistor N2 and
One resistance R1；First PMOS transistor P1 source electrode connects power supply, and grid and drain electrode meet output end UOUT；Second PMOS transistor P2
Source electrode connect power supply, grid and the first PMOS transistor P1 grid connect, and meet output end UOUT, it is brilliant that drain electrode meets the first NMOS
The drain electrode of body pipe N1 grid and the second nmos pass transistor N2；First nmos pass transistor N1 drain electrode meets output UOUT, source electrode connects
Bi-NMOS transistor N2 grid and first resistor R1 one end；First resistor R1 other end ground connection；Second nmos pass transistor
N2 source ground.
In the bias current generating circuit of the present invention, the first nmos pass transistor N1, the second nmos pass transistor N2 and the first electricity
Resistance R1 constitutes feedback loop, and this loop greatly improves the anti-power supply noise ability of bias current, so that this is inclined
Putting the bias current of current generating circuit offer has stronger anti-power supply noise ability.
It should be appreciated that the above-mentioned embodiment of the present invention is used only for exemplary illustration or explains the present invention's
Principle, without being construed as limiting the invention.Therefore, that is done without departing from the spirit and scope of the present invention is any
Modification, equivalent substitution, improvement etc., should be included in the scope of the protection.In addition, appended claims purport of the present invention
Covering the whole changes fallen into scope and border or this scope and the equivalents on border and repairing
Change example.
Claims (1)
1. a kind of bias current generating circuit, it is characterised in that including：First PMOS transistor P1, the second PMOS transistor P2,
First nmos pass transistor N1, the second nmos pass transistor N2 and first resistor R1；First PMOS transistor P1 source electrode connects power supply, grid
Pole and drain electrode meet output end UOUT；Second PMOS transistor P2 source electrode connects the grid of power supply, grid and the first PMOS transistor P1
Connect, and meet output end UOUT, the drain electrode of the drain grid and the second nmos pass transistor N2 that meet the first nmos pass transistor N1；First
Nmos pass transistor N1 drain electrode meets output UOUT, source electrode connects the second nmos pass transistor N2 grid and first resistor R1 one end；The
One resistance R1 other end ground connection；Second nmos pass transistor N2 source ground.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710395055.0A CN107102678A (en) | 2017-05-30 | 2017-05-30 | A kind of bias current generating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710395055.0A CN107102678A (en) | 2017-05-30 | 2017-05-30 | A kind of bias current generating circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107102678A true CN107102678A (en) | 2017-08-29 |
Family
ID=59659267
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710395055.0A Pending CN107102678A (en) | 2017-05-30 | 2017-05-30 | A kind of bias current generating circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107102678A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114610108A (en) * | 2022-03-07 | 2022-06-10 | 上海类比半导体技术有限公司 | Bias current generating circuit |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5587655A (en) * | 1994-08-22 | 1996-12-24 | Fuji Electric Co., Ltd. | Constant current circuit |
| DE19940382A1 (en) * | 1999-08-25 | 2001-03-08 | Infineon Technologies Ag | Power source for low operating voltages with high output resistance |
| US20020039044A1 (en) * | 2000-09-30 | 2002-04-04 | Kwak Choong-Keun | Reference voltage generating circuit using active resistance device |
| US20070075766A1 (en) * | 2005-09-30 | 2007-04-05 | Texas Instruments Deutschland Gmbh | Cmos reference current source |
| CN102385409A (en) * | 2011-10-14 | 2012-03-21 | 中国科学院电子学研究所 | VGS/R (Voltage Gradient Standard/Reference) type reference source capable of supplying zero-temperature coefficient voltage and current reference at the same time |
-
2017
- 2017-05-30 CN CN201710395055.0A patent/CN107102678A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5587655A (en) * | 1994-08-22 | 1996-12-24 | Fuji Electric Co., Ltd. | Constant current circuit |
| DE19940382A1 (en) * | 1999-08-25 | 2001-03-08 | Infineon Technologies Ag | Power source for low operating voltages with high output resistance |
| US20020039044A1 (en) * | 2000-09-30 | 2002-04-04 | Kwak Choong-Keun | Reference voltage generating circuit using active resistance device |
| US20070075766A1 (en) * | 2005-09-30 | 2007-04-05 | Texas Instruments Deutschland Gmbh | Cmos reference current source |
| CN102385409A (en) * | 2011-10-14 | 2012-03-21 | 中国科学院电子学研究所 | VGS/R (Voltage Gradient Standard/Reference) type reference source capable of supplying zero-temperature coefficient voltage and current reference at the same time |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114610108A (en) * | 2022-03-07 | 2022-06-10 | 上海类比半导体技术有限公司 | Bias current generating circuit |
| CN114610108B (en) * | 2022-03-07 | 2024-02-23 | 上海类比半导体技术有限公司 | Bias current generating circuit |
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| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20170829 |