CN107093988A - The controllable K-band power amplifier of a kind of 7 modal gain and power output - Google Patents
The controllable K-band power amplifier of a kind of 7 modal gain and power output Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
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- H—ELECTRICITY
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- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P5/00—Coupling devices of the waveguide type
- H01P5/08—Coupling devices of the waveguide type for linking dissimilar lines or devices
- H01P5/10—Coupling devices of the waveguide type for linking dissimilar lines or devices for coupling balanced lines or devices with unbalanced lines or devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P5/00—Coupling devices of the waveguide type
- H01P5/12—Coupling devices having more than two ports
- H01P5/16—Conjugate devices, i.e. devices having at least one port decoupled from one other port
- H01P5/18—Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3205—Modifications of amplifiers to reduce non-linear distortion in field-effect transistor amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/193—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
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Abstract
The present invention relates to millimeter wave wireless communication technology, the controllable K-band power amplifier of specifically related to a kind of 7 modal gain and power output, include power supply, control power supply, Vdd terminal, Vb ends, control end Vc1, Vc2, Vc3, input, output end and ground wire, the positive and negative terminal of Vdd terminal and ground cross in power supply, Vb ends are connected with bias voltage, control end Vc1, Vc2 and Vc3 are connected with the anode for controlling power supply respectively, also include the first balun being sequentially connected, first input matching circuit, second input matching circuit, first drive circuit, second drive circuit, intervalve matching circuit, gain control stages, interstage transformer, power stage circuit, first output matching circuit, second output matching circuit and the second balun;First balun, the second balun connect input and output end respectively.The features such as amplifier has 7 mode powers and the pseudo- digital controllable of gain, high power gain, high-output power.Transmission loss is low, phase error is small, return loss is low, interport isolation is high.
Description
Technical field
The invention belongs to millimeter wave wireless communication technology field, more particularly to a kind of 7 modal gain and power output it is controllable
K-band power amplifier.
Background technology
With developing rapidly for intelligent transportation, utilization of the radar sensor in car steering accessory system is more and more wider
General, 24GHz radar sensors rapidly become car steering with advantages such as its beam angle small, sensitivity is high, compacts and aided in
The radar sensor being most widely used in system, 24GHz power amplifiers as 24GHz radar sensors critical component,
As the afterbody amplification of emitter in sensor, the quality of its performance directly affects the signal transmission ranges of whole system
With signal antijamming capability etc..Silicon base CMOS technique is as the best technique of compatibility in semiconductor technology, but its is limited
The research and development that technique limitation result in silicon base CMOS power amplifier is slow, high-gain, high-output power, efficient silicon substrate
The research of CMOS power amplifier becomes technical barrier.Meanwhile, 24GHz radar sensors in order to ensure its application popularity
Itself needs signal transmission ranges controllable, causes the complexity of system and strengthens, and 7 modal gains and power output controlled power are put
Big utensil has the potential of reduction system complexity.Inductance element is as important in the passive part that large percentage is occupied in system
Device, its excessive area governs the process of chip miniaturization always, replaces superfluous with the less transformer of single size
Simplified system structure is reduced loss by remaining inductance.The new gain of design and power output controlled power amplifier, will be effective
Application background is expanded, is of great significance for the development tool of Hyundai Motor radar sensor system.
The content of the invention
7 kinds of different gains patterns are realized by control voltage it is an object of the invention to provide one kind, while can effectively improve
The power amplifier of Amplifier linearity and power output.
To achieve the above object, the technical solution adopted by the present invention is:A kind of controllable K of 7 modal gain and power output
Band power amplifiers, comprising power supply, control power supply, Vdd terminal, Vb ends, control end Vc1, Vc2, Vc3, input, output end and
Ground wire, Vdd terminal and ground cross are in the positive and negative terminal of power supply, and Vb ends are connected with bias voltage, control end Vc1, Vc2 and Vc3 difference
With controlling the anode of power supply be connected, in addition to the first balun for being sequentially connected, the first input matching circuit, the second input matching are electric
Road, the first drive circuit, the second drive circuit, intervalve matching circuit, gain control stages, interstage transformer, power stage circuit,
One output matching circuit, the second output matching circuit and the second balun;First balun, the second balun connect input and defeated respectively
Go out end.
In the controllable K-band power amplifier of 7 above-mentioned modal gains and power output,
First input matching circuit includes inductanceL 1 , electric capacityC 1 、C 2 The T-shaped match circuit of connection;Second input matching circuit includes
InductanceL 2 , electric capacityC 3 、C 4 The T-shaped match circuit of connection;
First drive circuit includes the MOS transistor connected by cascade modeM 1 WithM 2 , MOS transistorM 2 Connected on grid
Biasing resistorR 1 , the second drive circuit includes the MOS transistor that is connected by cascade modeM 3 WithM 4 , MOS transistorM 3 Grid
Upper connection biasing resistorR 2 ;
Intervalve matching circuit includes the first intervalve matching circuit and the second intervalve matching circuit, and the first intervalve matching circuit includes connecting
It is connected into the inductance of L-typeL 3 And electric capacityC 5 , inductance of second intervalve matching circuit including connecting l-shapedL 4 And electric capacityC 6 ;
Gain control stages includes the first gain control circuit and the second gain control circuit, and the first gain control circuit includes common source
The MOS transistor of common gate connectionM 5 WithM 6 , MOS transistorM 7 WithM 8 , MOS transistorM 9 WithM 10 , MOS transistorM 6 Connected on grid
Biasing resistorR 3 , the MOS transistor that the second gain control circuit is connected including cascadeM 11 WithM 12 , MOS transistorM 13 WithM 14 , MOS transistorM 15 WithM 16 ;MOS transistorM 11 Biasing resistor is connected on gridR 4 ;
Interstage transformer includes the first transformer and the second transformer;
Power stage circuit includes the first power stage and the second power stage, and the first power stage includes what is connected respectively in common source mode
MOS transistorM 17 WithM 18 , MOS transistorM 17 Biasing resistor is connected on gridR 5 , MOS transistorM 18 Biased electrical is connected on grid
ResistanceR 6 ;Second power stage includes the MOS transistor connected respectively in common source modeM 19 WithM 20 ;MOS transistorM 19 Connected on grid
Biasing resistorR 7 , MOS transistorM 20 Biasing resistor is connected on gridR 8 ;
First transformer is connected between gain control stages and the first power stage, and the second transformer is connected to the first power stage and
Between two power stages;Coupled capacitor is connected between first transformer and the first power stageC 7 WithC 8 ;Second transformer and the second work(
Coupled capacitor is connected between rate levelC 9 WithC 10 ;
First output matching circuit includes inductanceL 5 、L 7 Electric capacityC 11 、C 12 The match circuit of connection, the second output matching circuit includes
InductanceL 6 、L 8 Electric capacityC 13 、C 14 The match circuit of connection.
In the controllable K-band power amplifier of 7 above-mentioned modal gains and power output, the first transformer, second become
Top metal is as transformer coil a using being based in 0.13um CMOS technological designs, technique for depressor, and metal thickness is
Time top-level metallic is as transformer coil b in 2.5um, technique, and thickness is 0.534um, double layer of metal spacing 0.9um, technique
Middle bottom metal includes 2 symmetrical rf inputs mouth transformer terminals as transformer ground metal level on transformer coil a
Mouth I, transformer port II, also comprising 2 symmetrical DC port transformer DC ports, transformer dc port;Radio frequency is defeated
Inbound port is located at directly over transformer, and DC ports are located at transformer both sides, and transformer coil a midpoints metal wire is drawn;Transformation
2 symmetrical radio frequency output port transformer ports are included on device coil b, transformer port, positioned at transformer just under
Side, transformer coil b midpoints by through hole and transformer metal level be connected.
In the controllable K-band power amplifier of 7 above-mentioned modal gains and power output, the first balun, the second balun
From the change balun acted on impedance matching and power combing, and using based on 0.13um CMOS technological designs, technique
Middle top metal as balun top-level metallic coil, metal thickness be in 2.5um, technique time top-level metallic as balun time top
Layer wire coil, thickness is 0.534um, double layer of metal spacing 0.9um;There are 3 ports, balun port in each balun、
Balun port, balun port, balun portIt is used as rf inputs mouthful, balun port, balun portIt is used as radio frequency
Coil midpoint where output port, output port and balun metal level be connected.
In the controllable K-band power amplifier of 7 above-mentioned modal gains and power output, inductanceL 1 、L 2 、L 3 、L 4 、L 5 、L 6 、L 7 、L 8 Using the anistree ring-shaped inductors of 0.13um CMOS technologies individual layer, top metal is used as inductance top layer by the use of in technique
Wire coil, secondary top-level metallic is used as inductively metal level as inductance time top-level metallic coil, bottom metal;Inductance top layer
Inductance port is set on wire coil, inductance port is set on inductance time top-level metallic coil, the electricity immediately below inductance
Sense ground metal level digs the deformation trough having with the peripheral equidimension of inductance.
In the controllable K-band power amplifier of 7 above-mentioned modal gains and power output, inductance parameters are respectively:L 1
=165 pH,L 2 =165 pH,L 3 =120 pH,L 4 =120 pH,L 5 =100 pH,L 6 =100 pH,L 7 =70 pH,L 8 = 70 pH;
Capacitance parameter is respectively: C 1 =100 fF,C 2 =300 fF,C 3 =100 fF,C 4 =300 fF,C 5 =300 fF,C 6 =
300 fF,C 7 =300 fF,C 8 =300 fF,C 9 =300 fF,C 10 =300 fF,C 11 =300 fF,C 12 = 300
FF,C 13 =300 fF,C 14 = 300 fF;
MOS transistor parameter is respectively:MOS transistor length L=130nm, width is:W1=2um x 46, W2= 2um x
46, W3=2um x 46, W4=2um x 46, W5=2um x 15, W6=2um x 15, W7=2um x 30, W8=2um x 30,
W9=2um x 45, W10=2um x 45, W11=2um x 15, W12=2um x 15, W13=2um x 30, W14= 2um x
30, W15=2um x 45, W16=2um x 45, W17=2um x 42 x2, W18=2um x 42 x2, W19= 2um x 42
X2, W20= 2um x 42 x2;
Resistance parameter is respectively:R 1 = R 2 = R 3 = R 4 = R 5 = R 6 = R 7 = R 8 = 5Kohm;
Operating voltage Vdd is 1.5V;
Offset side Vb voltages are 0.95V.
The beneficial effects of the invention are as follows:With 7 mode powers and the pseudo- digital controllable of gain, high power gain, height output work(
The features such as rate.50 ohm of matching properties of each port are good, and the compatibility of system can be realized well and is built.And transmit damage
The low, phase error of consumption is small, return loss is low, interport isolation is high.
Brief description of the drawings
Fig. 1 is one embodiment of the invention circuit module schematic diagram;
Fig. 2 is one embodiment of the invention circuit diagram;
Fig. 3 is the inductance 3D model schematics of one embodiment of the invention;
Wherein, 31- inductance port, 32- inductance port, 33- inductance top-level metallics coil, 34- inductance time top wire
Circle, 35- inductively metal levels;
Fig. 4 is the transformer 3D model schematics of one embodiment of the invention;
Wherein, 41- transformers port I, 42- transformer port II, 43- transformer port, 44- transformers port、45-
Transformer dc port, 46- transformer dcs port, 47- transformer coil a, 48- transformer coil b, 49- transformers
Metal level;
Fig. 5 is the balun 3D model schematics of one embodiment of the invention;
Wherein, 51- baluns port, 52- baluns port, 53- baluns port, 54- balun top-level metallics coil, 55- bars
Coherence top-level metallic coil, 56- baluns ground metal level;
Fig. 6 is one embodiment of the invention high-gain, high-output power Mode S parameters simulation curve;
Fig. 7 is one embodiment of the invention low gain, low output power mode S parameter simulation curve;
Fig. 8 is one embodiment of the invention high-gain, high-output power pattern linearity simulation curve;
Fig. 9 is one embodiment of the invention low gain, low output power mode linearity simulation curve;
Figure 10 be under the different combinations of voltages of one embodiment of the invention 7 in mode of operation power gain simulation curve;
Figure 11 be under the different combinations of voltages of one embodiment of the invention 7 in mode of operation linearity simulation curve.
Embodiment
Embodiments of the present invention are described in detail below in conjunction with the accompanying drawings.
The example of the embodiment is shown in the drawings, wherein same or similar label represents identical or class from beginning to end
As element or the element with same or like function.The embodiments described below with reference to the accompanying drawings are exemplary, only
For explaining the present invention, and it is not construed as limiting the claims.
Following disclosure provides many different embodiments or example is used for realizing the different structure of the present invention.For letter
Change disclosure of the invention, hereinafter the part and setting of specific examples are described.They are only merely illustrative, and purpose is not
It is to limit the present invention.In addition, the present invention can in different examples repeat reference numerals and/or letter.This repetition be for
Simplify and clear purpose, the relation between discussed various embodiments and/or setting itself is not indicated.In addition, this hair
The bright example for providing various specific techniques and material, but those of ordinary skill in the art can be appreciated that other techniques
The use of applicability and/or other materials.In addition, fisrt feature described below second feature it " on " structure can be with
The embodiment for being formed as directly contacting including the first and second features, can also include other feature formation first and second
Embodiment between feature, such first and second feature may not be direct contact.
, it is necessary to explanation in description of the invention, unless otherwise prescribed and limit, term " connected " " connection " should do extensively
Reason and good sense solution, can be joined directly together for example, it may be mechanically connecting or electrical connection or the connection of two element internals,
It can also be indirectly connected to, for those of ordinary skill in the related art, can managed as the case may be by intermediary
Solve the concrete meaning of above-mentioned term.
The present embodiment is using following scheme realization, the controllable K-band power amplification of a kind of 7 modal gain and power output
Device, comprising power supply, controls power supply, Vdd terminal, Vb ends, control end Vc1, Vc2, Vc3, input, output end and ground wire, Vdd terminal and
Ground cross is in the positive and negative terminal of power supply, and Vb ends are connected with bias voltage, control end Vc1, Vc2 and Vc3 respectively with control power supply
Anode connect, in addition to be sequentially connected the first balun, the first input matching circuit, the second input matching circuit, first driving
Circuit, the second drive circuit, intervalve matching circuit, gain control stages, interstage transformer, power stage circuit, the first output matching
Circuit, the second output matching circuit and the second balun;First balun, the second balun connect input and output end respectively.
Further, the first input matching circuit includes inductanceL 1 , electric capacityC 1 、C 2 The T-shaped match circuit of connection;Second input
Match circuit includes inductanceL 2 , electric capacityC 3 、C 4 The T-shaped match circuit of connection;
First drive circuit includes the MOS transistor connected by cascade modeM 1 WithM 2 , MOS transistorM 2 Connected on grid
Biasing resistorR 1 , the second drive circuit includes the MOS transistor that is connected by cascade modeM 3 WithM 4 , MOS transistorM 3 Grid
Upper connection biasing resistorR 2 ;
Intervalve matching circuit includes the first intervalve matching circuit and the second intervalve matching circuit, and the first intervalve matching circuit includes connecting
It is connected into the inductance of L-typeL 3 And electric capacityC 5 , inductance of second intervalve matching circuit including connecting l-shapedL 4 And electric capacityC 6 ;
Gain control stages includes the first gain control circuit and the second gain control circuit, and the first gain control circuit includes common source
The MOS transistor of common gate connectionM 5 WithM 6 , MOS transistorM 7 WithM 8 , MOS transistorM 9 WithM 10 , MOS transistorM 6 Connected on grid
Biasing resistorR 3 , the MOS transistor that the second gain control circuit is connected including cascadeM 11 WithM 12 , MOS transistorM 13 WithM 14 , MOS transistorM 15 WithM 16 ;MOS transistorM 11 Biasing resistor is connected on gridR 4 ;
Interstage transformer includes the first transformer and the second transformer;
Power stage circuit includes the first power stage and the second power stage, and the first power stage includes what is connected respectively in common source mode
MOS transistorM 17 WithM 18 , MOS transistorM 17 Biasing resistor is connected on gridR 5 , MOS transistorM 18 Biased electrical is connected on grid
ResistanceR 6 ;Second power stage includes the MOS transistor connected respectively in common source modeM 19 WithM 20 ;MOS transistorM 19 Connected on grid
Biasing resistorR 7 , MOS transistorM 20 Biasing resistor is connected on gridR 8 ;
First transformer is connected between gain control stages and the first power stage, and the second transformer is connected to the first power stage and
Between two power stages;Coupled capacitor is connected between first transformer and the first power stageC 7 WithC 8 ;Second transformer and the second work(
Coupled capacitor is connected between rate levelC 9 WithC 10 ;
First output matching circuit includes inductanceL 5 、L 7 Electric capacityC 11 、C 12 The match circuit of connection, the second output matching circuit includes
InductanceL 6 、L 8 Electric capacityC 13 、C 14 The match circuit of connection.
Further, the first transformer, the second transformer, which are used, is based on most pushing up in 0.13um CMOS technological designs, technique
Layer metal is as transformer coil a, and metal thickness is that time top-level metallic is as transformer coil b in 2.5um, technique, and thickness is
Bottom metal is as transformer ground metal level in 0.534um, double layer of metal spacing 0.9um, technique, on transformer coil a
Comprising 2 symmetrical rf inputs mouthful transformer port I, transformer port II, also comprising 2 symmetrical DC port transformers
DC port, transformer dc port;Rf inputs mouthful are located at directly over transformer, and DC ports are located at transformer both sides,
Transformer coil a midpoints metal wire is drawn;2 symmetrical radio frequency output port transformer ports are included on transformer coil b, transformer port, positioned at the underface of transformer, transformer coil b midpoints pass through through hole and transformer ground metal level
Connection.
Further, the first balun, the second balun are from the change balun acted on impedance matching and power combing, and adopt
With based on 0.13um CMOS technological designs, top metal is as balun top-level metallic coil in technique, and metal thickness is
Time top-level metallic is as balun time top-level metallic coil in 2.5um, technique, and thickness is 0.534um, double layer of metal spacing
0.9um;There are 3 ports, balun port in each balun, balun port, balun port, balun portIt is used as radio frequency
Input port, balun port, balun portAs radio frequency output port, coil midpoint and balun where output port
Ground metal level is connected.
Further, inductanceL 1 、L 2 、L 3 、L 4 、L 5 、L 6 、L 7 、L 8 Using the anistree ring-shaped inductors of 0.13um CMOS technologies individual layer,
Top metal is as inductance top-level metallic coil by the use of in technique, and secondary top-level metallic is as inductance time top-level metallic coil, most
Underlying metal is used as inductively metal level;Inductance port is set on inductance top-level metallic coil, inductance time top-level metallic coil
Upper setting inductance port, inductively metal level immediately below inductance digs the deformation trough having with the peripheral equidimension of inductance.
Further, inductance parameters are respectively:L 1 =165 pH,L 2 =165 pH,L 3 =120 pH,L 4 =120
PH,L 5 =100 pH,L 6 =100 pH,L 7 =70 pH,L 8 = 70 pH;
Capacitance parameter is respectively: C 1 =100 fF,C 2 =300 fF,C 3 =100 fF,C 4 =300 fF,C 5 =300 fF,C 6 =
300 fF,C 7 =300 fF,C 8 =300 fF,C 9 =300 fF,C 10 =300 fF,C 11 =300 fF,C 12 = 300
FF,C 13 =300 fF,C 14 = 300 fF;
MOS transistor parameter is respectively:MOS transistor length L=130nm, width is:W1=2um x 46, W2= 2um x
46, W3=2um x 46, W4=2um x 46, W5=2um x 15, W6=2um x 15, W7=2um x 30, W8=2um x 30,
W9=2um x 45, W10=2um x 45, W11=2um x 15, W12=2um x 15, W13=2um x 30, W14= 2um x
30, W15=2um x 45, W16=2um x 45, W17=2um x 42 x2, W18=2um x 42 x2, W19= 2um x 42
X2, W20= 2um x 42 x2;
Resistance parameter is respectively:R 1 = R 2 = R 3 = R 4 = R 5 = R 6 = R 7 = R 8 = 5Kohm;
Operating voltage Vdd is 1.5V;
Offset side Vb voltages are 0.95V.
When it is implemented, 7 modal gains and the controllable K-band power amplifier of power output include the input being sequentially connected
End, between the first balun, the first input matching circuit, the second input matching circuit, the first drive circuit, the second drive circuit, level
Match circuit, gain control stages, interstage transformer, power stage circuit, the first output matching circuit, the second output matching circuit,
Second balun, output end.First input matching circuit is inductanceL 1 , electric capacityC 1 WithC 2 The T-shaped match circuit of composition, the second input
Match circuit is inductanceL 2 , electric capacityC 3 WithC 4 The T-shaped match circuit of composition;First input matching circuit, the second input matching circuit
The conjugate impedance match of the ohmage of input 50 and driving stage input impedance is realized with balun B1, it is ensured that the maximal efficiency of signal is passed
It is defeated, reduce loss.First output matching circuit is inductanceL 5 WithL 7 , electric capacityC 11 WithC 12 The output matching circuit of composition, second is defeated
Go out match circuit for inductanceL 6 WithL 8 , electric capacityC 13 WithC 14 The output matching circuit of composition;First output matching circuit, the second output
Match circuit and balun B2 realize the impedance matching between power stage optimum load impedance and the ohmage of output end 50, realize defeated
Go out to hold the maximum output of power, wherein, balun B1, B2 selects the balun with impedance matching and power combing effect, is based on
0.13um CMOS technological designs, balun top-level metallic coil uses top metal in technique to design, and metal thickness is
2.5um, balun time top-level metallic coil uses time top-level metallic design in technique, and thickness is 0.534um, double layer of metal spacing
0.9um, the radiofrequency signal of dual-port input is coupled to balun time top-level metallic coil through balun top-level metallic coil, realizes letter
Number both-end to single-ended conversion and power combing.By MOS transistorM 1 WithM 2 Composition first is connected by cascade mode to drive
Circuit, MOS transistorM 3 WithM 4 The second drive circuit of composition is connected by cascade mode, can guarantee that power amplifier has foot
Enough big gains.Intervalve matching circuit is respectively by inductanceL 3 And electric capacityC 5 , inductanceL 4 And electric capacityC 6 The L-type matching network of composition
Matching is realized, driving stage output impedance is completed to the conjugate impedance match of gain control stages input impedance, it is ensured that the maximization of power is passed
It is defeated.Impedance matching between gain control stages and power stage circuit and two power stages is realized using specific transformer, it is ensured that power
Maximum transmitted, wherein transformer have impedance matching, signal coupling and radio-frequency choke effect;It includes traditional transformer
Constituted with the inductance for being connected to rf inputs, the transformer is based on 0.13um CMOS technological designs, transformer coil a is used
Top metal is designed in technique, and metal thickness is 2.5um, and transformer coil b uses time top-level metallic design in technique, thick
Spend for 0.534um, double layer of metal spacing 0.9um, bottom metal is passed as transformer ground metal level near centre frequency
The low, phase error of defeated loss is small, return loss is low, interport isolation is high, realizes the letter between level well under the auxiliary of inductance
Number coupling and impedance matching, effectively reduction loss.First, second sub-gain control circuit is not brilliant by the MOS of cascode structure
Body pipeM 5 WithM 6 , MOS transistorM 7 WithM 8 , MOS transistorM 9 WithM 10 , MOS transistorM 11 WithM 12 ,、MOS transistorM 13 WithM 14 ,、
MOS transistorM 15 WithM 16 Composition, by changing MOS transistorM 5 ,M 7 ,M 9 , and MOS transistorM 12 ,M 14 ,M 16 The biasing of grid
Voltage, selects the branch road of conducting, completes the control of the mutual conductance of gain control stages, reaches the purpose of gain and output power,
Wherein in the case where the amplifier for ensureing the present embodiment can work, Vc1, Vc2 and Vc3 can realize 7 kinds of combinations of voltages sides
Formula, Vc1=1.5V, Vc2=1.5V and Vc3=1.5V;Vc1=1.5V, Vc2=1.5V and Vc3=0V;Vc1=1.5V, Vc2=0V and Vc3
=1.5V;Vc1=0V, Vc2=1.5V and Vc3=1.5V;Vc1=0V, Vc2=0V and Vc3=1.5V;Vc1=1.5V, Vc2=0V and Vc3=
10V;Vc1=0V, Vc2=1.5V and Vc3=0V;Finally realize the modal gain of power amplifier 7 and the mode of operation of power.
The implementation of the present embodiment is described in detail below in conjunction with accompanying drawing, as shown in figure 1, the modal gain of the present embodiment 7 and output
The controllable K-band power amplifier circuit frame diagram of power, includes Vdd terminal, Vb ends, Vc1, Vc2, Vc3, Input end, Output
End and ground wire, Vdd terminal and ground cross are in the positive and negative terminal of power supply, and Vb is connected with bias voltage, and control end Vc1, Vc2 and Vc3 divide
Be connected with the anode for controlling power supply, Input ends and Output ends are that the radiofrequency signal of amplifier is inputted and radiofrequency signal respectively
Output end, the first balun, the first input matching circuit, the second input matching circuit, the first driving stage circuit, the second driving stage electricity
Road, intervalve matching circuit, gain control stages, interstage transformer, power stage circuit, the first output matching circuit, the second output
With circuit, output end.Signal is by input ingoing power amplifier, by the first balun and first, second input matching circuit,
One-channel signal is converted to two-way, and maximal efficiency is transmitted to driving stage, realizes the early stage amplification of power;Signal after amplification
Enter gain control stages through intervalve matching circuit, the power that specific factor is further completed under the operation of gain-controlled voltage is put
Greatly;Signal after amplification is through interstage transformer ingoing power level circuit, and the voltage swing of signal can be effectively ensured in power stage circuit
Width intensity, and faint power gain effect is realized, the big signal of final power stage output is through first, second output matching circuit
Exported with the second balun by output end.Realize high-gain, high linearity, the high-power output of high anti-jamming capacity.
As shown in Fig. 2 the circuit diagram of the modal gain of the present embodiment 7 and the controllable K-band power amplifier of power output, bag
Containing 20 MOS transistor M1, M2, M3, M4, M5, M6, M7, M8, M9, M10, M11, M12, M13, M14, M15, M16, M17,
M18、M19、M20;14 electric capacity C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14;8 inductance L1,
L2、L3、L4、L5、L6、L7、L8;8 resistance R1, R2, R3, R4, R5, R6, R7, R8.Wherein MOS transistor M1 and M2 is by altogether
Grid mode connects into the first drive circuit altogether in source, and MOS transistor M3 and M4 connects into the second drive circuit by cascade mode;
MOS transistor M5 and M6, MOS transistor M7 and M8, MOS transistor M9 and M10 connect into first by cascade mode respectively
Gain control circuit, MOS transistor M11 and M12, MOS transistor M13 and M14, MOS transistor M15 and M16 press common source respectively
Grid mode connects into the second gain control circuit altogether;MOS transistor M17 and M18 connect into the first power by common source mode respectively
Level, MOS transistor M19 and M20 connect into the second power stage by common source mode respectively.Wherein, inductance L1, electric capacity C1 and C2 connection
Into T-shaped match circuit as the first input matching circuit, between input and the first drive circuit;Inductance L2, electric capacity
The T-shaped match circuit that C3 and C4 are connected into is as the second input matching circuit, between input and the second drive circuit;Electricity
Feel L3 and electric capacity C5 and constitute the first intervalve matching circuit, inductance L4 and electric capacity C6 constitute the second intervalve matching circuit;Electric capacity C7 and
Electric capacity C8 is as blocking condenser, between gain control stages and the first power stage, and electric capacity C9 and electric capacity C10 are as between level
Coupled capacitor, between the first power stage and the second power stage;Inductance L5, L7, the output of electric capacity C11 and C12 composition first
With circuit, inductance L6, L8, electric capacity C13 and C14 constitute the second output matching circuit.8 resistance R1, R2, R3, R4, R5, R6,
R7, R8 as biasing resistor, are connected to MOS transistor M2, M3, M6, M11, M17, M18, M19, M20 grid in circuit
On extremely.The present embodiment power amplifier also includes the first balun of passive device B1, the second balun B2, the first transformer T1,
Two transformer T2, the first balun B1 are connected between input and first, second input matching circuit, and the second balun B2 is connected to
Between first, second output matching circuit and output end, the first transformer T1 be connected to gain control stages and the first power stage it
Between, the second transformer T2 is connected between the first power stage and the second power stage.
The component and circuit parameter of the present embodiment power amplifier are as follows:
Inductance parameters are:L 1 =165 pH,L 2 =165 pH,L 3 =120 pH,L 4 =120 pH,L 5 =100 pH,L 6 =
100 pH,L 7 =70 pH,L 8 = 70 pH;
Capacitance parameter is:C 1 =100 fF,C 2 =300 fF,C 3 =100 fF,C 4 =300 fF,C 5 =300 fF,C 6 =
300 fF,C 7 =300 fF,C 8 =300 fF,C 9 =300 fF,C 10 =300 fF,C 11 =300 fF,C 12 = 300
FF,C 13 =300 fF,C 14 = 300 fF;
Transistor parameter is:Whole transistor length L=130nm, width is:W1=2um x 46, W2=2um x 46, W3=
2um x 46, W4=2um x 46, W5=2um x 15, W6=2um x 15, W7=2um x 30, W8=2um x 30, W9= 2um
X 45, W10=2um x 45, W11=2um x 15, W12=2um x 15, W13=2um x 30, W14=2um x 30, W15=
2um x 45, W16=2um x 45, W17=2um x 42 x2, W18=2um x 42 x2, W19=2um x 42 x2, W20=
2um x 42 x2;
Resistance parameter:R 1 = R 2 = R 3 = R 4 = R 5 = R 6 = R 7 = R 8 = 5Kohm;
Supply voltage Vdd is 1.5V;
1 end Vb voltages are biased for 0.95V.
As shown in figure 3, the 3D of the controllable K-band power amplifier inductance of 7 modal gains and power output of the present embodiment
Model, under specific 0.13um CMOS technologies, utilizes the anistree annular electro of the individual layer of professional 3D electromagnetic waves full-wave simulation Software for Design
Sense, inductance use top metal in technique as inductance top-level metallic coil 33, setting on inductance top-level metallic coil 33
Inductance port32, secondary top-level metallic sets electricity as inductance time top-level metallic coil 34 on the secondary top-level metallic coil 34 of inductance
Feel port31, inductively metal level 35 is using bottom metal in technique, and the distance between double layer of metal is in the process metal layer
Between it is maximum in distance, can effectively reduce the coupling loss of signal, the ground metal level immediately below inductance is dug up and electricity
The deformation trough of the peripheral equidimension of sense, can effectively reduce the eddy current effect of inductance, reduce inductor loss, improve the quality of inductance
Factor.
As shown in figure 4, with matching in the modal gain of the present embodiment 7 and the controllable K-band power amplifier of power output
The transformer 3D models of function, using the transformer acted on impedance matching, based on 0.13um CMOS technological designs, are used
Top metal is as transformer coil a47 in technique, and metal thickness is 2.5um, and change is used as using in technique top-level metallic
Transformer coil b 48, thickness is 0.534um, double layer of metal spacing 0.9um, and bottom metal is used as transformer ground metal level
49, transformer has 6 ports, and transformer coil a47 includes 2 symmetrical rf inputs mouthful transformer port I41, transformations
Device port II 42, also comprising 2 symmetrical DC port transformer DC ports45th, transformer dc port46, wherein penetrating
Frequency port is located at directly over transformer, and DC ports are located at transformer both sides, and transformer coil a midpoints metal wire is drawn;Transformation
Device coil b includes 2 symmetrical radio frequency output port transformer ports43rd, transformer port44, positioned at transformer just
Lower section, transformer coil b midpoints by through hole and transformer metal level be connected.
As shown in figure 5, in the modal gain of the present embodiment 7 and the controllable K-band power amplifier of power output balun 3D
Model, first, second balun is using the change balun acted on impedance matching and power combing, based on 0.13um CMOS works
Skill is designed, and using top metal in technique as balun top-level metallic coil, metal thickness is 2.5um, using in technique times
Top-level metallic is as balun time top-level metallic coil, and thickness is 0.534um, and double layer of metal spacing 0.9um, balun has 3 ends
Mouth balun port51st, balun port52nd, balun port53, balun port51 are used as rf inputs mouthful, balun port52nd, balun port53 are used as the coil midpoint where radio frequency output port, and output port and balun ground metal level
It is connected.
As shown in fig. 6, S21 is power small-signal in the present embodiment high-gain, high-output power Mode S parameters simulation curve
Gain, S11 is input port return loss, and S22 is output port return loss.As seen from the figure, return loss S11, S22 exists
- 15dB can be reached by being respectively less than near center frequency point at -10dB, working frequency 25GHz;Power small-signal gain S21 25dB
With a width of 22.5GHz-27.5GHz, 30dB can be reached at working frequency 25GHz.
As shown in fig. 7, S21 is power small-signal in the present embodiment low gain, low output power mode S parameter simulation curve
Gain, S11 is input port return loss, and S22 is output port return loss.As seen from the figure, return loss S11, S22 exists
- 15dB can be reached by being respectively less than near center frequency point at -10dB, working frequency 25GHz;Power small-signal gain S21 10dB
With a width of 22.5GHz-27.5GHz, 14dB can be reached at working frequency 25GHz.
As shown in figure 8, power output P in the present embodiment high-gain, high-output power pattern linearity simulation curve1dBPressure
Point reduction is 16.7 dBm, output saturation power Psat= 20.5 dBm。
As shown in figure 9, power output P in the present embodiment low gain, low output power mode linearity simulation curve1dBPressure
Point reduction is 8.7 dBm, output saturation power Psat= 12.5 dBm。
As shown in Figure 10, the present embodiment under different combinations of voltages 7 in mode of operation power gain simulation curve, work(
Mode of operation during rate amplifier has 7 under control voltage Vc1, Vc2, Vc3 various combination, as seen from the figure, the 7 pattern work(
Rate amplifier power gain ranges are 14dB -30dB.
As shown in figure 11, the present embodiment under different combinations of voltages 7 in mode of operation linearity simulation curve, power
Mode of operation during amplifier has 7 under control voltage Vc1, Vc2, Vc3 various combination, as seen from the figure, 7 mode power
Amplifier output power P1dBCompression point range is 8.7dBm -16.7dBm, output saturation power PsatScope be 12.5dBm-
20.5dBm。
It should be appreciated that the part that this specification is not elaborated belongs to prior art.
Although describing the embodiment of the present invention above in association with accompanying drawing, those of ordinary skill in the art should
Understand, these are merely illustrative of, and various deformation or modification can be made to these embodiments, without departing from the original of the present invention
Reason and essence.The scope of the present invention is only limited by the claims that follow.
Claims (6)
1. a kind of 7 modal gain and the controllable K-band power amplifier of power output, comprising power supply, control power supply, Vdd terminal, Vb
End, control end Vc1, Vc2, Vc3, input, output end and ground wire, Vdd terminal and ground cross power supply positive and negative terminal, Vb ends with
Bias voltage is connected, and control end Vc1, Vc2 and Vc3 are connected with the anode for controlling power supply respectively, it is characterized in that, in addition to connect successively
Between the first balun for connecing, the first input matching circuit, the second input matching circuit, the first drive circuit, the second drive circuit, level
Match circuit, gain control stages, interstage transformer, power stage circuit, the first output matching circuit, the second output matching circuit and
Second balun;First balun, the second balun connect input and output end respectively.
2. 7 modal gain as claimed in claim 1 and the controllable K-band power amplifier of power output, it is characterized in that,
First input matching circuit includes inductance L1, electric capacity C1、C2The T-shaped match circuit of connection;Second input matching circuit includes
Inductance L2, electric capacity C3、C4The T-shaped match circuit of connection;
First drive circuit includes the MOS transistor M connected by cascade mode1And M2, MOS transistor M2Connected on grid
Biasing resistor R1, the second drive circuit includes the MOS transistor M that is connected by cascade mode3And M4, MOS transistor M3Grid
Upper connection biasing resistor R2;
Intervalve matching circuit includes the first intervalve matching circuit and the second intervalve matching circuit, and the first intervalve matching circuit includes connecting
It is connected into the inductance L of L-type3With electric capacity C5, inductance L of second intervalve matching circuit including connecting l-shaped4With electric capacity C6;
Gain control stages includes the first gain control circuit and the second gain control circuit, and the first gain control circuit includes common source
The MOS transistor M of common gate connection5And M6, MOS transistor M7And M8, MOS transistor M9And M10, MOS transistor M6Connected on grid
Biasing resistor R3, the MOS transistor M that the second gain control circuit is connected including cascade11And M12, MOS transistor M13With
M14, MOS transistor M15And M16;MOS transistor M11Biasing resistor R is connected on grid4;
Interstage transformer includes the first transformer and the second transformer;
Power stage circuit includes the first power stage and the second power stage, and the first power stage includes what is connected respectively in common source mode
MOS transistor M17And M18, MOS transistor M17Biasing resistor R is connected on grid5, MOS transistor M18Biased electrical is connected on grid
Hinder R6;Second power stage includes the MOS transistor M connected respectively in common source mode19And M20;MOS transistor M19Connected on grid
Biasing resistor R7, MOS transistor M20Biasing resistor R is connected on grid8;
First transformer is connected between gain control stages and the first power stage, and the second transformer is connected to the first power stage and
Between two power stages;Coupled capacitor C is connected between first transformer and the first power stage7And C8;Second transformer and the second work(
Coupled capacitor C is connected between rate level9And C10;
First output matching circuit includes inductance L5、L7Electric capacity C11、C12The match circuit of connection, the second output matching circuit includes
Inductance L6、L8Electric capacity C13、C14The match circuit of connection.
3. 7 modal gain as claimed in claim 2 and the controllable K-band power amplifier of power output, it is characterized in that, first
Transformer, the second transformer are designed using based on 0.13um CMOS technologies, and top metal is used as transformer coil in technique
A, metal thickness is that time top-level metallic is as transformer coil b in 2.5um, technique, and thickness is 0.534um, double layer of metal spacing
Bottom metal includes 2 symmetrical rf inputs as transformer ground metal level on transformer coil a in 0.9um, technique
Mouth transformer port I, transformer port II, also comprising 2 symmetrical DC port transformer DC ports I, transformer dc ends
Mouth II;Rf inputs mouthful are located at directly over transformer, and DC ports are located at transformer both sides, transformer coil a midpoint metals
Line is drawn;Comprising 2 symmetrical radio frequency output port transformer port III, transformer port IV on transformer coil b, it is located at
The underface of transformer, transformer coil b midpoints by through hole and transformer metal level be connected.
4. 7 modal gain as claimed in claim 1 and the controllable K-band power amplifier of power output, it is characterized in that, first
Balun, the second balun are from the change balun acted on impedance matching and power combing, and using based on 0.13um CMOS works
Skill is designed, and top metal is as balun top-level metallic coil in technique, and metal thickness is time top-level metallic in 2.5um, technique
As balun time top-level metallic coil, thickness is 0.534um, double layer of metal spacing 0.9um;There are 3 ports in each balun,
Balun port I, balun port II, balun port III, balun port I are used as rf inputs mouthful, balun port II, balun end
Mouthful III as radio frequency output port, coil midpoint where output port and balun metal level be connected.
5. 7 modal gain as claimed in claim 2 and the controllable K-band power amplifier of power output, it is characterized in that, inductance
L1、L2、L3、L4、L5、L6、L7、L8Using the anistree ring-shaped inductors of 0.13um CMOS technologies individual layer, top gold in technique is utilized
Category is as inductance top-level metallic coil, and secondary top-level metallic is as inductance time top-level metallic coil, and bottom metal is as inductively
Metal level;Set on inductance top-level metallic coil and inductance port I, position are set on inductance port II, inductance time top-level metallic coil
Inductively metal level immediately below inductance digs the deformation trough having with the peripheral equidimension of inductance.
6. 7 modal gain as claimed in claim 2 and the controllable K-band power amplifier of power output, it is characterized in that, inductance
Parameter is respectively:L1=165pH, L2=165pH, L3=120pH, L4=120pH, L5=100pH, L6=100pH, L7=
70pH, L8=70pH;
Capacitance parameter is respectively:C1=100fF, C2=300fF, C3=100fF, C4=300fF, C5=300fF, C6=300fF,
C7=300fF, C8=300fF, C9=300fF, C10=300fF, C11=300fF, C12=300fF, C13=300fF, C14=
300fF;
MOS transistor parameter is respectively:MOS transistor length L=130nm, width is:W1=2umx46, W2=2umx46, W3
=2umx46, W4=2umx46, W5=2umx15, W6=2umx15, W7=2umx30, W8=2umx30, W9=2umx45, W10=
2umx45, W11=2umx15, W12=2umx15, W13=2umx30, W14=2umx30, W15=2umx45, W16=2umx45, W17
=2umx42x2, W18=2umx42x2, W19=2umx42x2, W20=2umx42x2;Resistance parameter is respectively:R1=R2=R3=
R4=R5=R6=R7=R8=5Kohm;
Operating voltage Vdd is 1.5V;
Offset side Vb voltages are 0.95V.
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Application publication date: 20170825 |