CN107067364B - 用于管理多个图形卡的方法和系统 - Google Patents

用于管理多个图形卡的方法和系统 Download PDF

Info

Publication number
CN107067364B
CN107067364B CN201611273156.2A CN201611273156A CN107067364B CN 107067364 B CN107067364 B CN 107067364B CN 201611273156 A CN201611273156 A CN 201611273156A CN 107067364 B CN107067364 B CN 107067364B
Authority
CN
China
Prior art keywords
graphics
resource
abstract
rendering engine
resources
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201611273156.2A
Other languages
English (en)
Chinese (zh)
Other versions
CN107067364A (zh
Inventor
V·巴谢
N·琼
N·科隆贝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dassault Systemes SE
Original Assignee
Dassault Systemes SE
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dassault Systemes SE filed Critical Dassault Systemes SE
Publication of CN107067364A publication Critical patent/CN107067364A/zh
Application granted granted Critical
Publication of CN107067364B publication Critical patent/CN107067364B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • G06T15/005—General purpose rendering architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363—Graphics controllers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2210/00—Indexing scheme for image generation or computer graphics
    • G06T2210/52—Parallel processing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/06—Use of more than one graphics processor to process data before displaying to one or more screens
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/08—Power processing, i.e. workload management for processors involved in display operations, such as CPUs or GPUs

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Graphics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • Processing Or Creating Images (AREA)
  • Advance Control (AREA)
  • Image Generation (AREA)
  • Stored Programmes (AREA)
  • Geometry (AREA)
CN201611273156.2A 2015-12-29 2016-12-28 用于管理多个图形卡的方法和系统 Active CN107067364B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP15307166.7A EP3188014B1 (en) 2015-12-29 2015-12-29 Management of a plurality of graphic cards
EP15307166.7 2015-12-29

Publications (2)

Publication Number Publication Date
CN107067364A CN107067364A (zh) 2017-08-18
CN107067364B true CN107067364B (zh) 2022-03-22

Family

ID=55129483

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201611273156.2A Active CN107067364B (zh) 2015-12-29 2016-12-28 用于管理多个图形卡的方法和系统

Country Status (4)

Country Link
US (1) US10127708B2 (enExample)
EP (1) EP3188014B1 (enExample)
JP (1) JP6981753B2 (enExample)
CN (1) CN107067364B (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3188013B1 (en) * 2015-12-29 2022-07-13 Dassault Systèmes Management of a plurality of graphic cards
CN108434742B (zh) * 2018-02-02 2019-04-30 网易（杭州）网络有限公司 游戏场景中虚拟资源的处理方法和装置
US11620795B2 (en) 2020-03-27 2023-04-04 Snap Inc. Displaying augmented reality content in messaging application

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103561293A (zh) * 2010-07-13 2014-02-05 索尼电脑娱乐公司 用于增强视频的系统和方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080211816A1 (en) * 2003-07-15 2008-09-04 Alienware Labs. Corp. Multiple parallel processor computer graphics system
US8028292B2 (en) * 2004-02-20 2011-09-27 Sony Computer Entertainment Inc. Processor task migration over a network in a multi-processor system
US9058292B2 (en) * 2004-12-29 2015-06-16 Intel Corporation System and method for one step address translation of graphics addresses in virtualization
US20070052715A1 (en) * 2005-09-07 2007-03-08 Konstantin Levit-Gurevich Device, system and method of graphics processing
US8307360B2 (en) * 2008-01-22 2012-11-06 Advanced Micro Devices, Inc. Caching binary translations for virtual machine guest
US8612633B2 (en) * 2010-03-31 2013-12-17 Microsoft Corporation Virtual machine fast emulation assist
US20120001925A1 (en) * 2010-06-30 2012-01-05 Ati Technologies, Ulc Dynamic Feedback Load Balancing
US9606936B2 (en) * 2010-12-16 2017-03-28 Advanced Micro Devices, Inc. Generalized control registers
US9672583B2 (en) * 2011-12-21 2017-06-06 Intel Corporation GPU accelerated address translation for graphics virtualization
US8941670B2 (en) * 2012-01-17 2015-01-27 Microsoft Corporation Para-virtualized high-performance computing and GDI acceleration
US9697579B2 (en) * 2013-06-07 2017-07-04 Apple Inc. Multi-processor graphics rendering
US9900378B2 (en) * 2016-02-01 2018-02-20 Sas Institute Inc. Node device function and cache aware task assignment

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103561293A (zh) * 2010-07-13 2014-02-05 索尼电脑娱乐公司 用于增强视频的系统和方法

Also Published As

Publication number Publication date
JP6981753B2 (ja) 2021-12-17
US10127708B2 (en) 2018-11-13
US20170186214A1 (en) 2017-06-29
EP3188014B1 (en) 2022-07-13
CN107067364A (zh) 2017-08-18
JP2017123171A (ja) 2017-07-13
EP3188014A1 (en) 2017-07-05

Similar Documents

Publication Publication Date Title
US11087052B2 (en) Automatic partitioning of a 3D scene into a plurality of zones processed by a computing resource
US20220269402A1 (en) Generation of a color of an object displayed on a gui
JP6721332B2 (ja) ３ｄモデル化されたアセンブリ上で境界ボックスを生成すること
US9075931B2 (en) Process and system for rendering an object in a view using a product lifecycle management database
US8812272B2 (en) Designing a modeled object within a session of a computer-aided design system interacting with a database
KR101706048B1 (ko) Ｐｌｍ 데이터베이스의 객체들의 어셈블리를 디스플레이하기 위한 프로세스, 프로그램 및 장치
KR100921357B1 (ko) 사용자 인터액티브 그래픽 툴을 가지는 제품 편집 및시뮬레이션 데이터베이스 시스템
US10417803B2 (en) Multiple-pass rendering of a digital three-dimensional model of a structure
US10719549B2 (en) Querying a database based on a parametric view function
EP3506133B1 (en) Method of assembling parts of a product
US10504271B2 (en) Method, program and system for simulating a 3D scene with a set of computing resources running in parallel
KR20160024825A (ko) 순차적 업데이트의 실행
JP2018022476A (ja) モフォロジー基準によるデータベースの照会
JP2016126795A (ja) オブジェクトのセットの視点の選択
CN107067364B (zh) 用于管理多个图形卡的方法和系统
CN107038679B (zh) 用于管理多个图形卡的方法和系统

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant