CN107037760A - A kind of input current type artifical resistance device and resistance control method - Google Patents
A kind of input current type artifical resistance device and resistance control method Download PDFInfo
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- CN107037760A CN107037760A CN201710355888.4A CN201710355888A CN107037760A CN 107037760 A CN107037760 A CN 107037760A CN 201710355888 A CN201710355888 A CN 201710355888A CN 107037760 A CN107037760 A CN 107037760A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
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Abstract
It is an object of the invention to provide a kind of input current type artifical resistance device and resistance control method, it includes the current source being sequentially connected in series, current-to-voltage convertor, AD converter, processor, D/A converter and voltage converter, during artifical resistance, the mainly current-to-voltage convertor of error can be caused in each circuit above, AD converter, D/A converter and voltage converter, realized by the error analysis of final artifical resistance and by being eliminated and combined calibration fitting to error in embeded processor and its error is eliminated, so as to improve final output artifical resistance precision and resistance stability.
Description
Technical field
The present invention relates to servo electrical equipment field, a kind of input current type artifical resistance device is specifically related to.
Background technology
Existing variable resistance has these traditional resistor casees of resistance box, mechanical potentiometer, digital regulation resistance to be manual
Variable resistance, it is difficult to automatically adjust.In order to also occur in that some program control artifical resistances, most common way with program control regulation
For digital synthesis technology, (by given input stimulus electric current) adjusts output voltage to realize the control of combined resistance resistance.
Wherein output voltage is multiplied by combined resistance, i.e. output voltage equal to exciting current and is directly proportional to exciting current, the synthesis with setting
Resistance is directly proportional, specific as shown in figure 1, measuring exciting current I by current measuring membersiSize, further according to combined resistance
Arranges value Rx, the DC voltage U for setting program-controlled voltage source to exporto, wherein Uo=Ii×Rx。
The central principle of the program control scheme is to be sent to DAC reference after voltage by the way that fixed input current is changed into
End, as output DAC reference voltage, the deficiency of the program is the reference voltage by adjusting DAC so that DAC exists in itself
The error produced under different resistance values exists non-linear, is difficult to solve the error that thus introduces by amendment, causes final
The stability of the artifical resistance arrived is not ideal.
Because any DAC and ADC precision depends critically upon the performance of benchmark.If regarding input as DAC reference datas
So that entirely output DAC precision cannot be guaranteed.
The content of the invention
Based on problem present in above method, technical scheme gathers front end by ADC and fixes input current,
According to resistance arranges value, output end provides relevant voltage value by DAC, artifical resistance purpose is reached, by selecting appropriate reference
Voltage makes front-end A/D C and rear end DAC be operated in optimum state, so as to evade caused by de-regulation ADC and DAC reference voltage
Nonlinearity erron, although front end introduces an ADC again, by reasonably designing, the error that front-end A/D C is introduced is missed to be linear
Difference, is easier to be modified to reach the purpose of output artifical resistance stabilization.In addition, the original that can be also produced in conjunction with error
Cause, targetedly analyze and remove, reduces the difficulty and workload of fitting.
And due to being realized in numeric field than at higher precision in analog domain, more highly reliable and more low price various signals
Function is managed, the ability that numeral suppresses noise is much larger than analog signal, in the storage and transmitting procedure of analog signal, noise and mistake
It can very be accumulated, so that the processing to signal produces bad effect, and in numeric field, data signal can be stored nondestructively
And transmission, this is also another advantage of technical solution of the present invention.
Specially a kind of input current type artifical resistance device, it is characterised in that：Including current source, the electricity being sequentially connected in series
Stream-electric pressure converter, AD converter, processor, D/A converter and Voltage-voltage converter, wherein processor receive AD conversion
The magnitude of voltage of device input, the output of D/A converter is controlled further according to target resistance resistance, it is exported corresponding voltage signal and is led to
Voltage required for overvoltage-electric pressure converter control generation.
Further, it is characterised in that：The current-voltage converter includes an operational amplifier, its positive input
Current source is connected with, while being also associated with high-precision fixed value resistance Rref, reverse input end is connected to the string being connected with output end
Join the tie point between sampling resistor R1 and R2.
Further, it is characterised in that：Amendment for artifical resistance value is calculated as follows mode and carried out：Wherein RxThe resistor resistance of the simulation for needed for, wherein UaRepresent input terminal voltage value, UbTable
Show output end voltage value, input current is Ii, RrefConnected by operational amplifier positive input in current-voltage converter
Sample resistance resistance.
Further, it is characterised in that：For the amendment of artifical resistance value, the imbalance electricity of the operational amplifier is being considered
In the case of stream and offset voltage, the actual output voltage of operational amplifier and the error of desired output voltage are：
Wherein, UIOFor the offset voltage of the operational amplifier, offset current is IB1And IB2For the operational amplifier just
To the offset current of, negative input,
Collect in processor and be compensated by its error.
Further, it is characterised in that：For the amendment of artifical resistance value, it is also contemplated that first operational amplifier
In the case of temperature drift, the error of the first operational amplifier, and its error is compensated within a processor, the error calculation is public
Formula is：
Input offset current IB1、IB2Temperature drift be respectively TCIB1And TCIB2, input offset voltage UIOTemperature drift
For TCV.
Further, it is characterised in that：
It is also contemplated that AD converter and the transformed error of D/A converter, its formula is respectively：
ΔUADC=NADCULSBADC；
ΔUDAC=NDACULSBDAC；
Wherein, ULSBADC、ULSBDACIt is 1 to refer to ADC, DAC input digital quantity lowest order respectively, corresponding conversion when remaining is 0
Voltage, i.e.,
Wherein n1, n2 represent that ADC, DAC change data are maximum respectively
Digit
NADCDetermined according to actual measurement ADC error, NDACDetermined according to actual measurement DAC errors.
Further, it is characterised in that：The resistance simulation device it is also contemplated that the second operational amplifier offset electric current with
Error caused by offset voltage, its calculation is as follows：
Wherein, R1' for output par, c operational amplifier negative input and ground between sampling resistor
R2' input resistance that is connected by the positive input of output par, c operational amplifier
Rf' for output par, c operational amplifier positive input and output end between sampling resistor
UIO' be output par, c operational amplifier offset voltage
IB1' be output par, c operational amplifier positive input offset current
IB2' be output par, c operational amplifier negative input offset current
Further, it is characterised in that：The resistance simulation device is also contemplated that the second operation amplifier of output driving part
The error that device temperature drift is produced
Wherein, TCV ' is the offset voltage temperature drift of output par, c operational amplifier
TCIB1’For the offset current temperature drift of output par, c operational amplifier positive input
TCIB2’For the offset current temperature drift of output par, c operational amplifier negative input
T is temperature drift amount
Further, it is characterised in that：The calculation formula of artifical resistance value is as follows：
Wherein, current-voltage transformation ratio is K1, Voltage-voltage transformation ratio is K2。
The present invention also provides a kind of resistance control method of input current type artifical resistance device, it is characterised in that：Using upper
The voltage-type artifical resistance device described in either a program is stated, its resistance is controlled using the method that fitting and error concealment are combined to enter
OK.
Brief description of the drawings
Fig. 1 artifical resistance device schematic diagrams in the prior art
The theory diagram of the input current type artifical resistance device of Fig. 2 present invention
The circuit structure diagram of the input current type artifical resistance device of Fig. 3 (a) present invention
The equivalent circuit diagram of the input current type artifical resistance device of Fig. 3 (b) present invention
The error separation of Fig. 4 current-voltage conversion portions
The error separation of Fig. 5 Voltage-voltage convenor sections
Embodiment
The present invention is specifically described in conjunction with specific embodiments as follows：
The block diagram of the present invention is as shown in Fig. 2 first, current-to-voltage convertor gathers input current IiAnd it is converted into electricity
Signal is pressed, is allowed to meet the input requirements of AD converter；High-precision AD converter gathers the voltage and is input to embedded processing
In device, embeded processor is handled using filtering, error correction scheduling algorithm voltage, is synthesized further according to set target
Resistance RxControl the output of D/A converter, its is exported corresponding voltage signal, at the same by output equipment show voltage,
Electric current and resistance value；Finally, the voltage conversion that Voltage-voltage converter exports D/A converter is voltage output Ub。
For the present invention current excitation breadboardin resistance value circuit in, electric current-electricity in current-to-voltage converter
Pressure transformation ratio is K1, front-end A/D C digits N1, ADC reference voltage is U1, the current-voltage conversion that embeded processor is read
Numerical value of the voltage exported afterwards after AD converter is converted is D1；Rear end DAC digits are N2, DAC reference voltage is U2, electricity
The corresponding digital value of output voltage needed for piezo-electric pressure converter is D2, Voltage-voltage transformation ratio is K2, calculating simulation resistance Rx
Method it is as follows：
The digital value D obtained according to front-end A/D C1The digital value D to rear end DAC is exported with processor2And the electricity of input
Flow valuve IiCarry out calculating simulation resistance value.Fig. 5 is the output voltage driving electricity of embeded processor connection in technical solution of the present invention
Road, it comprises DAC and Voltage-voltage converter, the voltage of output voltage drive circuit final output is Ub, output current is
Ii, after being gathered by front-end A/D C, rear end is by setting resistance value, using embeded processor control output DAC digital signal values
D2, by exporting buffering drive circuit, so as to realize artifical resistance.
By further analyzing circuit error, mainly including input current-voltage conversion circuit offset voltage and imbalance
Electric current and the influence of temperature drift, the influence of ADC and DAC transformed errors, output voltage-voltage conversion circuit offset voltage and
Offset current and the influence of temperature drift.Above error is mainly linearity error, it may be considered that be fitted by final calibration
To eliminate.Specific method is that processor receives the magnitude of voltage of AD converter input, further according to the control DA conversions of target resistance resistance
The output of device, makes it export the voltage required for corresponding voltage signal control generation.By repeatedly input and repeatedly output valve
Adjustment, it is final to determine adjustment formula to be fitted (for example with least square method) to adjusted value.
But, even if for linearity error, but more the reason for be due to error, the error curve that it is integrated is also very multiple
It is miscellaneous, accurate fitting is wanted, data volume needs are very big, in consideration of it, the present invention also provides a kind of source of error analysis and removed and plan
The method for closing the mode that is combined to realize precise resistance value.
Wherein, input includes the error of a sample resistance method current measurement circuit, sets up error separation such as Fig. 4
It is shown, if two input offset currents are IB1And IB2, so-called offset current refers to the two ends of operational amplifier in perfect condition
For " void disconnected ", but in actual circuit, the positive-negative input end of operational amplifier has a small amount of electric current to flow into, and this electric current is exactly to lack of proper care
Electric current, input offset voltage is UIO, herein so-called offset voltage refer in the ideal situation, the positive negative input of operational amplifier
When the voltage at end is identical, output voltage is equal to 0, but in practice, operational amplifier must additionally be applied in an input
Plus a small voltage can just make output voltage be equal to 0V, the small voltage is offset voltage, it should be pointed out that offset current
With offset voltage can by measuring acquisition in advance, so, using it is preceding passing through to input the operational amplifier in ADC stages lose
The measured in advance of electric current and input offset voltage is adjusted, I can be obtainedB1、IB2And UIO, from fig. 4, it can be seen that setting amplifier input
Terminal voltage is respectively U+And U-, flow through resistance R1And R2Electric current be respectively I1And I2.Below equation can be obtained by analysis：
U+=(Ii-IB1)·Rref+UIO
U-=I1R1
I2=I1+IB2
U+=U-
It can be obtained by above formula
Wherein U+For the magnitude of voltage at the first operational amplifier positive input terminal of current-voltage conversion portion, U-For electric current-
Magnitude of voltage at first operational amplifier negative input end of voltage conversion portion, the input current of input current type artifical resistance device
For Ii, resistance R1For the sampling resistor between the reverse input end and ground of the first operational amplifier of current-voltage conversion portion,
Resistance R2For the sampling resistor between the reverse input end and output end of the first operational amplifier of current-voltage conversion portion,
Resistance RrefThe high-precision fixed value electricity connected by the positive input of the first operational amplifier of current-voltage conversion portion
Resistance, voltage Uo' for current-voltage conversion portion the first operational amplifier output end voltage.
And if the first operational amplifier of current-voltage conversion portion handled as preferable operational amplifier,
The situation of offset voltage and offset current is not considered, then the output voltage values that this luck first calculates amplifier are
For output voltage values ideally.
So, there is the presence of operational amplifier offset voltage and offset current, cause the first of current-voltage conversion portion
The actual output voltage of operational amplifier and the error of desired output voltage are
It can be obtained to input current-voltage conversion circuit amendment by being modified in embeded processor to the error
Cross to obtain artifical resistance value.
Meanwhile, on the basis of above-mentioned error correction, further consider temperature drift to input current type artifical resistance device
The influence brought.
If input offset current IB1、IB2Temperature drift be respectively TCIB1And TCIB2, input offset voltage UIOTemperature is floated
Move as TCV, the error equation that can obtain bringing due to temperature drift is
U+=(Ii-TCIB1ΔT)·Rref+TCVΔT
U-=I1R1
I2=I1+TCIB2ΔT
U+=U-
Obtained it is possible thereby to calculate in the case of with temperature drift, the output voltage of the operational amplifier in ADC stages
For：
Ideally the output voltage values of the first operational amplifier of current-voltage conversion portion are：
So, in the case of with offset voltage and offset current, because temperature drift causes ADC stage operation amplifiers
Error between the actual output voltage and desired output voltage of device is：
The voltage that actual ADC is collected is
By in embeded processor to actually measured Uo' be modified, so as to improve output artifical resistance precision.
Next, analyzing AD converter and DA transformed errors
All there is transformed error in actually AD converter and D/A converter, be divided into static error and dynamic error.Produce quiet
The reason for state error, has, unstable, the null offset of amplifier of a reference source, internal resistance and pressure drop and electricity when analog switch is turned on
Hinder deviation of resistance etc. in network.Dynamic error is then the additive error produced in the dynamic process of conversion, and it is due to electricity
The influence of distributed constant in road, caused by making the time of everybody voltage signal arrival decoding network output end different.Generally conversion
Error minimum output voltage ULSBMultiple represent, i.e.,
ΔUo=NULSB
Wherein, ULSBIt is 1 to refer to ADC and DAC digital quantities lowest order, corresponding conversion voltage value when remaining is 0, i.e.,
Wherein n changes digit for the maximum of ADC or DAC；
After being analyzed by ADC error, into after embeded processor, the magnitude of voltage U after actual correctiona' be
Wherein, D1Carry out what is exported after current-voltage conversion for the ADC stages operational amplifier that embeded processor is read
Numerical value of the voltage after AD converter is converted, N1For AD converter digit, U1For the reference voltage of AD converter.
ΔUOP11Error caused by-input offset current and offset voltage；
TC11Error caused by Δ T- importation temperature drifts；
NADCULSBADCTransformed error caused by-AD converter；
NADCDetermined according to actual measurement ADC error.
Further output par, c DAC errors are analyzed, analysis principle and error Producing reason are with above-mentioned ADC ranks
The error analysis of section is consistent.
ΔUDAC=NDACULSBDAC
Further to output voltage-voltage conversion portion error analysis, the fractional error illustraton of model is as shown in Figure 5
The error that Voltage-voltage conversion portion output voltage can be obtained is
ΔUOPP- output par, c Voltage-voltage partially due to output voltage error caused by offset current and offset voltage,
I in above-mentioned formulaB1’、IB2’、UIO’、R1’、R2' be all parameter at the operational amplifier of output par, c second, its implication with it is defeated
Enter the parameter correspondence that partial arithmetic amplifier goes out, be specially.
R1' for output par, c operational amplifier negative input and ground between sampling resistor
R2' input resistance that is connected by the positive input of output par, c operational amplifier
Rf' for output par, c operational amplifier positive input and output end between sampling resistor
UIO' be output par, c operational amplifier offset voltage
IB1' be output par, c operational amplifier positive input offset current
IB2' be output par, c operational amplifier negative input offset current
Temperature drift produce error expression be
TCPIt is each in the output voltage error that Δ T- output par, c Voltage-voltage conversion portion temperature drifts are brought, above formula
Parameter is meant that similar expression of the parameter corresponding with importation in output par, c.
The expression formula after error correction is carried out so as to obtain output voltage
D2The corresponding digital value of output voltage, N for needed for DAC stage voltages-electric pressure converter2For D/A converter digit, U2
For the reference voltage of D/A converter.
The further expression formula to final artifical resistance after error correction：
Wherein, current-voltage transformation ratio is K1, Voltage-voltage transformation ratio is K2。
, but those skilled in the art once know basic creation although preferred embodiments of the present invention have been described
Property concept, then can make other change and modification to these embodiments.So, appended claims are intended to be construed to include excellent
Select embodiment and fall into having altered and changing for the scope of the invention.
Obviously, those skilled in the art can carry out the essence of various changes and modification without departing from the present invention to the present invention
God and scope.So, if these modifications and variations of the present invention belong to the scope of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to comprising including these changes and modification.
Claims (10)
1. a kind of input current type artifical resistance device, it is characterised in that：Including current source, the current-voltage being sequentially connected in series
Converter, AD converter, processor, D/A converter and Voltage-voltage converter, wherein processor receive AD converter input
Magnitude of voltage, the output of D/A converter is controlled further according to target resistance resistance, it is exported corresponding voltage signal and is passed through electric piezo-electric
Voltage required for pressure converter control generation.
2. such as claim 1 input current type artifical resistance device, it is characterised in that：The current-voltage converter includes a fortune
Amplifier is calculated, its positive input is connected with current source, while being also associated with high-precision fixed value resistance Rref, reverse input end
It is connected to the tie point between series connection the sampling resistor R1 and R2 being connected with output end.
3. input current type artifical resistance device as claimed in claim 2, it is characterised in that：For artifical resistance value amendment according to such as
Lower calculation is carried out：Wherein RxThe resistor resistance of the simulation for needed for, wherein UaRepresent defeated
Enter terminal voltage value, UbOutput end voltage value is represented, input current is Ii, RrefFor operational amplifier in current-voltage converter just
The sample resistance resistance connected to input.
4. input current type artifical resistance device as claimed in claim 2, it is characterised in that：For the amendment of artifical resistance value, examining
In the case of the offset current and offset voltage of considering the operational amplifier, the actual output voltage and ideal of operational amplifier are defeated
The error for going out voltage is：
Wherein, UIOFor the offset voltage of the operational amplifier, offset current is IB1And IB2For the operational amplifier it is positive,
The offset current of negative input,
Collect in processor and be compensated by its error.
5. input current type artifical resistance device as claimed in claim 4, it is characterised in that：For the amendment of artifical resistance value, also
In the case of the temperature drift for considering first operational amplifier, the error of the first operational amplifier, and its error is existed
Compensated in processor, the error calculation formula is：
Input offset current IB1、IB2Temperature drift be respectively TCIB1And TCIB2, input offset voltage UIOTemperature drift is TCV.
6. input current type artifical resistance device as claimed in claim 5, it is characterised in that：
It is also contemplated that AD converter and the transformed error of D/A converter, its formula is respectively：
ΔUADC=NADCULSBADC；
ΔUDAC=NDACULSBDAC；
Wherein, ULSBADC、ULSBDACIt is 1 to refer to ADC, DAC input digital quantity lowest order respectively, corresponding conversion voltage when remaining is 0,
I.e.
Wherein n1, n2 represent ADC, DAC change data maximum number of digits respectively
NADCDetermined according to actual measurement ADC error, NDACDetermined according to actual measurement DAC errors.
7. input current type artifical resistance device as claimed in claim 6, it is characterised in that：The resistance simulation device it is also contemplated that the
Two operational amplifier offset electric currents and error caused by offset voltage, its calculation are as follows：
Wherein, R1' for output par, c operational amplifier negative input and ground between sampling resistor
R2' input resistance that is connected by the positive input of output par, c operational amplifier
Rf' for output par, c operational amplifier positive input and output end between sampling resistor
UIO' be output par, c operational amplifier offset voltage
IB1' be output par, c operational amplifier positive input offset current
IB2' be output par, c operational amplifier negative input offset current.
8. input current type artifical resistance device as claimed in claim 6, it is characterised in that：The resistance simulation device is also contemplated that output
The error that second operational amplifier temperature drift of drive part is produced
Wherein, TCV ' is the offset voltage temperature drift of output par, c operational amplifier
TCIB1’For the offset current temperature drift of output par, c operational amplifier positive input
TCIB2’For the offset current temperature drift of output par, c operational amplifier negative input
△ T are temperature drift amount.
9. input current type artifical resistance device as claimed in claim 8, it is characterised in that：The calculation formula of artifical resistance value is as follows：
Wherein, current-voltage transformation ratio is K1, Voltage-voltage transformation ratio is K2。
10. a kind of resistance control method of input current type artifical resistance device, it is characterised in that：It is any using claim 1-9
Voltage-type artifical resistance device described in, controls its resistance to carry out using the method that fitting and error concealment are combined.
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| CN113687125A (en) * | 2020-05-18 | 2021-11-23 | 广州汽车集团股份有限公司 | Offset voltage correction method and system for operational amplifier in current detection circuit |
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| CN107037760B (en) | 2019-07-26 |
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